| /openbmc/linux/drivers/gpu/drm/meson/ |
| H A D | meson_crtc.c | 158 priv->viu.osd1_enabled = false; in meson_g12a_crtc_atomic_disable()
159 priv->viu.osd1_commit = false; in meson_g12a_crtc_atomic_disable()
161 priv->viu.vd1_enabled = false; in meson_g12a_crtc_atomic_disable()
162 priv->viu.vd1_commit = false; in meson_g12a_crtc_atomic_disable()
183 priv->viu.osd1_enabled = false; in meson_crtc_atomic_disable()
184 priv->viu.osd1_commit = false; in meson_crtc_atomic_disable()
186 priv->viu.vd1_enabled = false; in meson_crtc_atomic_disable()
187 priv->viu.vd1_commit = false; in meson_crtc_atomic_disable()
225 priv->viu.osd1_commit = true; in meson_crtc_atomic_flush()
226 priv->viu.vd1_commit = true; in meson_crtc_atomic_flush()
[all …]
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| H A D | meson_overlay.c | 366 priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1; in meson_overlay_setup_scaler_params()
387 priv->viu.vpp_vsc_start_phase_step = ratio_y << 6; in meson_overlay_setup_scaler_params()
389 priv->viu.vpp_vsc_ini_phase = vphase << 8; in meson_overlay_setup_scaler_params()
390 priv->viu.vpp_vsc_phase_ctrl = (1 << 13) | (4 << 8) | in meson_overlay_setup_scaler_params()
393 priv->viu.vd1_if0_luma_x0 = VD_X_START(hd_start_lines) | in meson_overlay_setup_scaler_params()
395 priv->viu.vd1_if0_chroma_x0 = VD_X_START(hd_start_lines >> 1) | in meson_overlay_setup_scaler_params()
398 priv->viu.viu_vd1_fmt_w = in meson_overlay_setup_scaler_params()
402 priv->viu.vd1_afbc_vd_cfmt_w = in meson_overlay_setup_scaler_params()
406 priv->viu.vd1_afbc_vd_cfmt_h = in meson_overlay_setup_scaler_params()
409 priv->viu.vd1_afbc_mif_hor_scope = AFBC_MIF_BLK_BGN_H(afbc_left / 32) | in meson_overlay_setup_scaler_params()
[all …]
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| H A D | meson_plane.c | 119 line_stride = ((priv->viu.osd1_width << 4) + 127) >> 7; in meson_g12a_afbcd_line_stride()
126 line_stride = ((priv->viu.osd1_width << 5) + 127) >> 7; in meson_g12a_afbcd_line_stride()
166 priv->viu.osd1_afbcd = true; in meson_plane_atomic_update()
168 priv->viu.osd1_afbcd = false; in meson_plane_atomic_update()
171 priv->viu.osd1_ctrl_stat = OSD_ENABLE | in meson_plane_atomic_update()
175 priv->viu.osd1_ctrl_stat2 = readl(priv->io_base + in meson_plane_atomic_update()
181 priv->viu.osd1_blk0_cfg[0] = canvas_id_osd1 << OSD_CANVAS_SEL; in meson_plane_atomic_update()
183 if (priv->viu.osd1_afbcd) { in meson_plane_atomic_update()
186 priv->viu.osd1_blk1_cfg4 = MESON_G12A_AFBCD_OUT_ADDR; in meson_plane_atomic_update()
187 priv->viu.osd1_blk0_cfg[0] |= OSD_ENDIANNESS_BE; in meson_plane_atomic_update()
[all …]
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| H A D | meson_osd_afbcd.c | 136 priv->viu.osd1_width) | in meson_gxm_afbcd_setup()
138 priv->viu.osd1_height), in meson_gxm_afbcd_setup()
141 writel_relaxed(priv->viu.osd1_addr >> 4, in meson_gxm_afbcd_setup()
143 writel_relaxed(priv->viu.osd1_addr >> 4, in meson_gxm_afbcd_setup()
146 writel_relaxed((0xe4 << 24) | (priv->viu.osd1_addr & 0xffffff), in meson_gxm_afbcd_setup()
149 if (priv->viu.osd1_width <= 128) in meson_gxm_afbcd_setup()
151 else if (priv->viu.osd1_width <= 256) in meson_gxm_afbcd_setup()
153 else if (priv->viu.osd1_width <= 512) in meson_gxm_afbcd_setup()
155 else if (priv->viu.osd1_width <= 1024) in meson_gxm_afbcd_setup()
157 else if (priv->viu.osd1_width <= 2048) in meson_gxm_afbcd_setup()
[all …]
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| H A D | meson_vpp.h | 15 /* Mux VIU/VPP to ENCL */
17 /* Mux VIU/VPP to ENCI */
19 /* Mux VIU/VPP to ENCP */
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| H A D | meson_viu.c | 21 * VIU Handles the Pixel scanout and the basic Colorspace conversions
314 /* VIU OSD1 Reset as workaround for GXL+ Alpha OSD Bug */
503 priv->viu.osd1_enabled = false; in meson_viu_init()
504 priv->viu.osd1_commit = false; in meson_viu_init()
505 priv->viu.osd1_interlace = false; in meson_viu_init()
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| H A D | meson_osd_afbcd.h | 12 /* This is an internal address used to transfer pixel from AFBC to the VIU */
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| H A D | meson_drv.h | 157 } viu; member
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| H A D | meson_vpp.c | 18 * VPP Handles all the Post Processing after the Scanout from the VIU
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| H A D | meson_venc.c | 40 * vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|-|
1148 /* Select ENCI for VIU */ in meson_venc_hdmi_mode_set()
1516 /* Select ENCP for VIU */ in meson_venc_hdmi_mode_set()
1844 /* Internal Venc, Internal VIU Sync, Internal Vencoder */ in meson_venci_cvbs_mode_set()
1903 /* Select ENCI for VIU */ in meson_venci_cvbs_mode_set()
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| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | amlogic,meson-ee-pwrc.yaml | 78 - const: viu
94 - const: viu
119 - const: viu
138 - const: viu
179 reset-names = "viu", "venc", "vcbus", "bt656",
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| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | amlogic,meson-vpu.yaml | 20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
29 VIU: Video Input Unit
54 tree and provides the scanout clock to the VPP and VIU.
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| /openbmc/u-boot/drivers/video/meson/ |
| H A D | meson_vpu.h | 82 /* Mux VIU/VPP to ENCI */
84 /* Mux VIU/VPP to ENCP */
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| H A D | meson_venc.c | 927 /* Select ENCI for VIU */ in meson_venc_hdmi_mode_set()
1301 /* Select ENCP for VIU */ in meson_venc_hdmi_mode_set()
1384 /* Internal Venc, Internal VIU Sync, Internal Vencoder */ in meson_venci_cvbs_mode_set()
1409 /* Select ENCI for VIU */ in meson_venci_cvbs_mode_set()
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| H A D | meson_registers.h | 135 /* viu */
265 /* VIU Matrix Registers */
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| /openbmc/linux/arch/arm/boot/dts/amlogic/ |
| H A D | meson8m2.dtsi | 78 "vencp", "vdac", "vencl", "viu", "venc", "rdma";
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| /openbmc/linux/Documentation/gpu/ |
| H A D | meson.rst | 19 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
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| /openbmc/linux/Documentation/devicetree/bindings/soc/amlogic/ |
| H A D | amlogic,meson-gx-hhi-sysctrl.yaml | 132 reset-names = "viu", "venc", "vcbus", "bt656", "dvin",
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| /openbmc/linux/arch/powerpc/platforms/512x/ |
| H A D | clock-commonclk.c | 85 * MPC5125 has many more differences: no MBX, no AXE, no VIU, no SPDIF,
886 "viu", "csb", &clkregs->sccr2, 18); in mpc512x_clk_setup_clock_tree()
1102 FOR_NODES("fsl,mpc5121-viu") { in mpc5121_clk_provide_backwards_compat()
1104 NODE_CHK("ipg", clks[MPC512x_CLK_VIU], 0, VIU); in mpc5121_clk_provide_backwards_compat()
1164 (did_register & DID_REG_VIU) ? " VIU" : "", in mpc5121_clk_provide_backwards_compat()
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | mpc5121ads.dts | 115 viu@2400 {
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| H A D | mpc5121.dtsi | 265 viu@2400 {
266 compatible = "fsl,mpc5121-viu";
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| H A D | ac14xx.dts | 274 viu@2400 {
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| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-imx7ulp.c | 213 hws[IMX7ULP_CLK_VIU] = imx_clk_hw_gate("viu", "nic1_clk", base + 0xa0, 30); in imx7ulp_clk_pcc3_init()
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| /openbmc/linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-gxbb.dtsi | 755 reset-names = "viu", "venc", "vcbus", "bt656",
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| /openbmc/linux/drivers/comedi/drivers/ni_routing/tools/ |
| H A D | convert_csv_to_c.py | 47 if not re.match('[VIU]\([^)]*\)', value):
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