/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 26 host-only mode. [all …]
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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-g12b-s922x-khadas-vim3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-s922x.dtsi" 11 #include "meson-khadas-vim3.dtsi" 12 #include "meson-g12b-khadas-vim3.dtsi" 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential 21 * an USB3.0 Type A connector and a M.2 Key M slot. 23 * the USB3.0 controller and the PCIe Controller, thus only 25 * If the MCU is configured to mux the PCIe/USB3.0 differential lines 27 * USB3.0 from the USB Complex and enable the PCIe controller. [all …]
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H A D | meson-g12b-a311d-khadas-vim3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-a311d.dtsi" 11 #include "meson-khadas-vim3.dtsi" 12 #include "meson-g12b-khadas-vim3.dtsi" 19 * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential 21 * an USB3.0 Type A connector and a M.2 Key M slot. 23 * the USB3.0 controller and the PCIe Controller, thus only 25 * If the MCU is configured to mux the PCIe/USB3.0 differential lines 27 * USB3.0 from the USB Complex and enable the PCIe controller. [all …]
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H A D | meson-sm1-khadas-vim3l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "meson-sm1.dtsi" 10 #include "meson-khadas-vim3.dtsi" 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 vddcpu: regulator-vddcpu { 21 compatible = "pwm-regulator"; 23 regulator-name = "VDDCPU"; 24 regulator-min-microvolt = <690000>; 25 regulator-max-microvolt = <1050000>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-zc1751-xm017-dc3.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm017-dc3 5 * (C) Copyright 2016 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/phy/phy.h> 17 model = "ZynqMP zc1751-xm017-dc3 RevA"; 18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 34 stdout-path = "serial0:115200n8"; 43 compatible = "fixed-clock"; [all …]
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H A D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 si5332_0: si5332-0 { /* u17 */ 21 compatible = "fixed-clock"; [all …]
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H A D | zynqmp-sck-kv-g-revA.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 9 * "A" - A01 board un-modified (NXP) 10 * "Y" - A01 board modified with legacy interposer (Nexperia) 11 * "Z" - A01 board modified with Diode interposer 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/net/ti-dp83867.h> 18 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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H A D | zynqmp-zcu104-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2017 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> 21 compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp"; 38 stdout-path = "serial0:115200n8"; [all …]
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H A D | zynqmp-zcu104-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> 21 compatible = "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104", "xlnx,zynqmp"; 38 stdout-path = "serial0:115200n8"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-3720-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F3720-DDR3) 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 14 /dts-v1/; 16 #include <dt-bindings/gpio/gpio.h> 17 #include "armada-372x.dtsi" 20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3"; 21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3700"; 24 stdout-path = "serial0:115200n8"; 32 exp_usb3_vbus: usb3-vbus { [all …]
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H A D | armada-7040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include "armada-7040.dtsi" 13 compatible = "marvell,armada7040-db", "marvell,armada7040", 14 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 17 stdout-path = "serial0:115200n8"; 31 cp0_exp_usb3_0_current_regulator: gpio-regulator { 32 compatible = "regulator-gpio"; 33 regulator-name = "cp0-usb3-0-current-regulator"; 34 regulator-type = "current"; [all …]
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H A D | armada-8040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include "armada-8040.dtsi" 13 compatible = "marvell,armada8040-db", "marvell,armada8040", 14 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 17 stdout-path = "serial0:115200n8"; 34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { 35 compatible = "regulator-fixed"; 36 regulator-name = "cp0-usb3h0-vbus"; 37 regulator-min-microvolt = <5000000>; [all …]
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-synology-ds116.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include "armada-385.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 14 compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380"; 17 stdout-path = "serial0:115200n8"; 32 internal-regs { 34 pinctrl-names = "default"; 35 pinctrl-0 = <&i2c0_pins>; 37 clock-frequency = <100000>; [all …]
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H A D | armada-388-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F6820) 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 /dts-v1/; 12 #include "armada-388.dtsi" 16 compatible = "marvell,a385-db", "marvell,armada388", 20 stdout-path = "serial0:115200n8"; 35 internal-regs { 38 clock-frequency = <100000>; 39 audio_codec: audio-codec@4a { [all …]
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H A D | armada-388-rd.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (RD-88F6820-AP) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 /dts-v1/; 13 #include "armada-388.dtsi" 17 compatible = "marvell,a385-rd", "marvell,armada388", 21 stdout-path = "serial0:115200n8"; 35 internal-regs { 38 clock-frequency = <100000>; [all …]
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H A D | armada-388-gp.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * (RD-88F6820-GP) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 11 /dts-v1/; 12 #include "armada-388.dtsi" 13 #include <dt-bindings/gpio/gpio.h> 16 model = "Marvell Armada 388 DB-88F6820-GP"; 17 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380"; 20 stdout-path = "serial0:115200n8"; 35 internal-regs { [all …]
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H A D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | armada-388-gp.dts | 3 * (RD-88F6820-GP) 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * This file is dual-licensed: you can use it either under the terms 42 /dts-v1/; 43 #include "armada-388.dtsi" 44 #include <dt-bindings/gpio/gpio.h> 48 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; 51 stdout-path = "serial0:115200n8"; 69 internal-regs { 71 pinctrl-names = "default"; [all …]
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H A D | armada-3720-turris-mox.dts | 1 // SPDX-License-Identifier: GPL-2.0+ or X11 6 * Based on armada-3720-espressobin.dts by: 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 11 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include "armada-372x.dtsi" 18 compatible = "cznic,turris-mox", "marvell,armada3720", 22 stdout-path = "serial0:115200n8"; 38 compatible = "regulator-fixed"; 39 regulator-name = "usb3-vbus"; [all …]
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H A D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
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H A D | armada-8040-clearfog-gt-8k.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 #include "armada-8040.dtsi" 9 model = "ClearFog-GT-8K"; 10 compatible = "solidrun,clearfog-gt-8k", 14 stdout-path = "serial0:115200n8"; 28 simple-bus { 29 compatible = "simple-bus"; 31 reg_usb3h0_vbus: usb3-vbus0 { 32 compatible = "regulator-fixed"; 33 pinctrl-names = "default"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,ipq9574-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Anusha Rao <quic_anusha@quicinc.com> 18 include/dt-bindings/clock/qcom,ipq9574-gcc.h 19 include/dt-bindings/reset/qcom,ipq9574-gcc.h 23 const: qcom,ipq9574-gcc 27 - description: Board XO source [all …]
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H A D | qcom,ipq5018-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sricharan Ramabadhran <quic_srichara@quicinc.com> 17 include/dt-bindings/clock/qcom,ipq5018-gcc.h 18 include/dt-bindings/reset/qcom,ipq5018-gcc.h 22 const: qcom,gcc-ipq5018 26 - description: Board XO source 27 - description: Sleep clock source [all …]
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/openbmc/linux/drivers/reset/ |
H A D | reset-uniphier.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 12 #include <linux/reset-controller.h> 22 #define UNIPHIER_RESET_ID_END ((unsigned int)(-1)) 53 UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */ 58 UNIPHIER_RESETX(30, 0x2000, 19), /* SATA-PHY */ 66 UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (PCIe, USB3) */ 80 UNIPHIER_RESETX(16, 0x2014, 4), /* USB30-PHY0 */ 81 UNIPHIER_RESETX(17, 0x2014, 0), /* USB30-PHY1 */ 82 UNIPHIER_RESETX(18, 0x2014, 2), /* USB30-PHY2 */ 83 UNIPHIER_RESETX(20, 0x2014, 5), /* USB31-PHY0 */ [all …]
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