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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Datmel,at91-usart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
11 - Richard Genoud <richard.genoud@gmail.com>
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
[all …]
/openbmc/qemu/hw/char/
H A Davr_usart.c2 * AVR USART
19 * <http://www.gnu.org/licenses/lgpl-2.1.html>
26 #include "hw/qdev-properties.h"
27 #include "hw/qdev-properties-system.h"
31 AVRUsartState *usart = opaque; in avr_usart_can_receive() local
33 if (usart->data_valid || !(usart->csrb & USART_CSRB_RXEN)) { in avr_usart_can_receive()
41 AVRUsartState *usart = opaque; in avr_usart_receive() local
43 assert(!usart->data_valid); in avr_usart_receive()
44 usart->data = buffer[0]; in avr_usart_receive()
45 usart->data_valid = true; in avr_usart_receive()
[all …]
H A Dstm32l4x5_usart.c2 * STM32L4X5 USART (Universal Synchronous Asynchronous Receiver Transmitter)
4 * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr>
5 * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr>
7 * SPDX-License-Identifier: GPL-2.0-or-later
10 * See the COPYING file in the top-level directory.
12 * The STM32L4X5 USART is heavily inspired by the stm32f2xx_usart
15 * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
22 #include "chardev/char-fe.h"
23 #include "chardev/char-serial.h"
28 #include "hw/qdev-clock.h"
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsam9x60.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
[all …]
H A Dsama5d3_uart.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
24 pinctrl_uart0: uart0-0 {
32 pinctrl_uart1: uart1-0 {
41 compatible = "atmel,at91sam9260-usart";
43 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
[all …]
H A Dat91sam9260.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
H A Dsama5d2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
13 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
20 interrupt-parent = <&aic>;
[all …]
H A Dat91rm9200.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
[all …]
H A Dat91sam9x5_usart3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
4 * 4 USART.
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mfd/at91-usart.h>
22 pinctrl_usart3: usart3-0 {
28 pinctrl_usart3_rts: usart3_rts-0 {
33 pinctrl_usart3_cts: usart3_cts-0 {
38 pinctrl_usart3_sck: usart3_sck-0 {
[all …]
H A Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
[all …]
H A Dat91sam9n12.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
H A Dat91sam9261.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
H A Dsama5d4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/mfd/at91-usart.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
H A Dsama5d3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
H A Dat91sam9g45.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dat91sam9263.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
[all …]
/openbmc/linux/drivers/mfd/
H A Dat91-usart.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for AT91 USART
11 #include <dt-bindings/mfd/at91-usart.h>
29 device_property_read_u32(&pdev->dev, "atmel,usart-mode", &opmode); in at91_usart_mode_probe()
39 dev_err(&pdev->dev, "atmel,usart-mode has an invalid value %u\n", in at91_usart_mode_probe()
41 return -EINVAL; in at91_usart_mode_probe()
44 return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, cell, 1, in at91_usart_mode_probe()
49 { .compatible = "atmel,at91rm9200-usart" },
50 { .compatible = "atmel,at91sam9260-usart" },
67 MODULE_DESCRIPTION("AT91 USART MFD driver");
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Datmel-flexcom.txt4 controller and an USART. Only one function can be used at a time and is chosen
8 - compatible: Should be "atmel,sama5d2-flexcom"
9 or "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom"
10 - reg: Should be the offset/length value for Flexcom dedicated
11 I/O registers (without USART, TWI or SPI registers).
12 - clocks: Should be the Flexcom peripheral clock from PMC.
13 - #address-cells: Should be <1>
14 - #size-cells: Should be <1>
15 - ranges: Should be one range for the full I/O register region
16 (including USART, TWI and SPI registers).
[all …]
/openbmc/linux/drivers/tty/serial/
H A Datmel_serial.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/clk-provider.h>
24 #include <linux/dma-mapping.h>
62 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
71 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
96 * can contain up to 1024 characters in PIO mode and up to 4096 characters in
97 * DMA mode.
165 bool hd_start_rx; /* can start RX during half-duplex operation */
195 { .compatible = "atmel,at91rm9200-usart-serial" },
208 return __raw_readl(port->membase + reg); in atmel_uart_readl()
[all …]
H A Datmel_serial.h1 /* SPDX-License-Identifier: GPL-2.0+ */
8 * USART registers.
27 #define ATMEL_US_STTTO BIT(11) /* Start Time-out */
31 #define ATMEL_US_RETTO BIT(15) /* Rearm Time-out */
42 #define ATMEL_US_MR 0x04 /* Mode Register */
43 #define ATMEL_US_USMODE GENMASK(3, 0) /* Mode of the USART */
62 #define ATMEL_US_SYNC BIT(8) /* Synchronous Mode Select */
75 #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */
81 #define ATMEL_US_MODE9 BIT(17) /* 9-bit Character Length */
83 #define ATMEL_US_OVER BIT(19) /* Oversampling Mode */
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-at91-usart.c1 // SPDX-License-Identifier: GPL-2.0
3 // Driver for AT91 USART Controllers as SPI
12 #include <linux/dma-direction.h>
69 readl_relaxed((port)->regs + US_##reg)
71 writel_relaxed((value), (port)->regs + US_##reg)
74 readb_relaxed((port)->regs + US_##reg)
76 writeb_relaxed((value), (port)->regs + US_##reg)
109 aus->current_rx_remaining_bytes = 0; in dma_callback()
110 complete(&aus->xfer_completion); in dma_callback()
119 return aus->use_dma && xfer->len >= US_DMA_MIN_BYTES; in at91_usart_spi_can_dma()
[all …]
/openbmc/u-boot/drivers/serial/
H A DKconfig11 Select a default baudrate, where "default" has a driver-specific
19 # non-dm serial code
34 in U-Boot.
41 In very space-constrained devices even the full UART driver is too
43 This option enables the full UART in U-Boot, so if is it disabled,
51 In very space-constrained devices even the full UART driver is too
61 In very space-constrained devices even the full UART driver is too
159 The debug UART is intended for use very early in U-Boot to debug
163 - Make sure your UART supports this interface
164 - Enable CONFIG_DEBUG_UART
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
27 0x1: offset size is fixed to 4 (32-bit alignment)
[all …]

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