1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2012 Atmel, 6*724ba675SRob Herring * 2012 Hong Xu <hong.xu@atmel.com> 7*724ba675SRob Herring */ 8*724ba675SRob Herring 9*724ba675SRob Herring#include <dt-bindings/dma/at91.h> 10*724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h> 11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 12*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 13*724ba675SRob Herring#include <dt-bindings/clock/at91.h> 14*724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h> 15*724ba675SRob Herring 16*724ba675SRob Herring/ { 17*724ba675SRob Herring #address-cells = <1>; 18*724ba675SRob Herring #size-cells = <1>; 19*724ba675SRob Herring model = "Atmel AT91SAM9N12 SoC"; 20*724ba675SRob Herring compatible = "atmel,at91sam9n12"; 21*724ba675SRob Herring interrupt-parent = <&aic>; 22*724ba675SRob Herring 23*724ba675SRob Herring aliases { 24*724ba675SRob Herring serial0 = &dbgu; 25*724ba675SRob Herring serial1 = &usart0; 26*724ba675SRob Herring serial2 = &usart1; 27*724ba675SRob Herring serial3 = &usart2; 28*724ba675SRob Herring serial4 = &usart3; 29*724ba675SRob Herring gpio0 = &pioA; 30*724ba675SRob Herring gpio1 = &pioB; 31*724ba675SRob Herring gpio2 = &pioC; 32*724ba675SRob Herring gpio3 = &pioD; 33*724ba675SRob Herring tcb0 = &tcb0; 34*724ba675SRob Herring tcb1 = &tcb1; 35*724ba675SRob Herring i2c0 = &i2c0; 36*724ba675SRob Herring i2c1 = &i2c1; 37*724ba675SRob Herring ssc0 = &ssc0; 38*724ba675SRob Herring pwm0 = &pwm0; 39*724ba675SRob Herring }; 40*724ba675SRob Herring cpus { 41*724ba675SRob Herring #address-cells = <1>; 42*724ba675SRob Herring #size-cells = <0>; 43*724ba675SRob Herring 44*724ba675SRob Herring cpu@0 { 45*724ba675SRob Herring compatible = "arm,arm926ej-s"; 46*724ba675SRob Herring device_type = "cpu"; 47*724ba675SRob Herring reg = <0>; 48*724ba675SRob Herring }; 49*724ba675SRob Herring }; 50*724ba675SRob Herring 51*724ba675SRob Herring memory@20000000 { 52*724ba675SRob Herring device_type = "memory"; 53*724ba675SRob Herring reg = <0x20000000 0x10000000>; 54*724ba675SRob Herring }; 55*724ba675SRob Herring 56*724ba675SRob Herring clocks { 57*724ba675SRob Herring slow_xtal: slow_xtal { 58*724ba675SRob Herring compatible = "fixed-clock"; 59*724ba675SRob Herring #clock-cells = <0>; 60*724ba675SRob Herring clock-frequency = <0>; 61*724ba675SRob Herring }; 62*724ba675SRob Herring 63*724ba675SRob Herring main_xtal: main_xtal { 64*724ba675SRob Herring compatible = "fixed-clock"; 65*724ba675SRob Herring #clock-cells = <0>; 66*724ba675SRob Herring clock-frequency = <0>; 67*724ba675SRob Herring }; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring sram: sram@300000 { 71*724ba675SRob Herring compatible = "mmio-sram"; 72*724ba675SRob Herring reg = <0x00300000 0x8000>; 73*724ba675SRob Herring #address-cells = <1>; 74*724ba675SRob Herring #size-cells = <1>; 75*724ba675SRob Herring ranges = <0 0x00300000 0x8000>; 76*724ba675SRob Herring }; 77*724ba675SRob Herring 78*724ba675SRob Herring ahb { 79*724ba675SRob Herring compatible = "simple-bus"; 80*724ba675SRob Herring #address-cells = <1>; 81*724ba675SRob Herring #size-cells = <1>; 82*724ba675SRob Herring ranges; 83*724ba675SRob Herring 84*724ba675SRob Herring apb { 85*724ba675SRob Herring compatible = "simple-bus"; 86*724ba675SRob Herring #address-cells = <1>; 87*724ba675SRob Herring #size-cells = <1>; 88*724ba675SRob Herring ranges; 89*724ba675SRob Herring 90*724ba675SRob Herring aic: interrupt-controller@fffff000 { 91*724ba675SRob Herring #interrupt-cells = <3>; 92*724ba675SRob Herring compatible = "atmel,at91rm9200-aic"; 93*724ba675SRob Herring interrupt-controller; 94*724ba675SRob Herring reg = <0xfffff000 0x200>; 95*724ba675SRob Herring atmel,external-irqs = <31>; 96*724ba675SRob Herring }; 97*724ba675SRob Herring 98*724ba675SRob Herring matrix: matrix@ffffde00 { 99*724ba675SRob Herring compatible = "atmel,at91sam9n12-matrix", "syscon"; 100*724ba675SRob Herring reg = <0xffffde00 0x100>; 101*724ba675SRob Herring }; 102*724ba675SRob Herring 103*724ba675SRob Herring pmecc: ecc-engine@ffffe000 { 104*724ba675SRob Herring compatible = "atmel,at91sam9g45-pmecc"; 105*724ba675SRob Herring reg = <0xffffe000 0x600>, 106*724ba675SRob Herring <0xffffe600 0x200>; 107*724ba675SRob Herring }; 108*724ba675SRob Herring 109*724ba675SRob Herring ramc0: ramc@ffffe800 { 110*724ba675SRob Herring compatible = "atmel,at91sam9g45-ddramc"; 111*724ba675SRob Herring reg = <0xffffe800 0x200>; 112*724ba675SRob Herring clocks = <&pmc PMC_TYPE_SYSTEM 2>; 113*724ba675SRob Herring clock-names = "ddrck"; 114*724ba675SRob Herring }; 115*724ba675SRob Herring 116*724ba675SRob Herring smc: smc@ffffea00 { 117*724ba675SRob Herring compatible = "atmel,at91sam9260-smc", "syscon"; 118*724ba675SRob Herring reg = <0xffffea00 0x200>; 119*724ba675SRob Herring }; 120*724ba675SRob Herring 121*724ba675SRob Herring pmc: clock-controller@fffffc00 { 122*724ba675SRob Herring compatible = "atmel,at91sam9n12-pmc", "syscon"; 123*724ba675SRob Herring reg = <0xfffffc00 0x200>; 124*724ba675SRob Herring #clock-cells = <2>; 125*724ba675SRob Herring clocks = <&clk32k>, <&main_xtal>; 126*724ba675SRob Herring clock-names = "slow_clk", "main_xtal"; 127*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 128*724ba675SRob Herring }; 129*724ba675SRob Herring 130*724ba675SRob Herring reset-controller@fffffe00 { 131*724ba675SRob Herring compatible = "atmel,at91sam9g45-rstc"; 132*724ba675SRob Herring reg = <0xfffffe00 0x10>; 133*724ba675SRob Herring clocks = <&clk32k>; 134*724ba675SRob Herring }; 135*724ba675SRob Herring 136*724ba675SRob Herring pit: timer@fffffe30 { 137*724ba675SRob Herring compatible = "atmel,at91sam9260-pit"; 138*724ba675SRob Herring reg = <0xfffffe30 0xf>; 139*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 140*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 141*724ba675SRob Herring }; 142*724ba675SRob Herring 143*724ba675SRob Herring poweroff@fffffe10 { 144*724ba675SRob Herring compatible = "atmel,at91sam9x5-shdwc"; 145*724ba675SRob Herring reg = <0xfffffe10 0x10>; 146*724ba675SRob Herring clocks = <&clk32k>; 147*724ba675SRob Herring }; 148*724ba675SRob Herring 149*724ba675SRob Herring clk32k: clock-controller@fffffe50 { 150*724ba675SRob Herring compatible = "atmel,at91sam9x5-sckc"; 151*724ba675SRob Herring reg = <0xfffffe50 0x4>; 152*724ba675SRob Herring clocks = <&slow_xtal>; 153*724ba675SRob Herring #clock-cells = <0>; 154*724ba675SRob Herring }; 155*724ba675SRob Herring 156*724ba675SRob Herring mmc0: mmc@f0008000 { 157*724ba675SRob Herring compatible = "atmel,hsmci"; 158*724ba675SRob Herring reg = <0xf0008000 0x600>; 159*724ba675SRob Herring interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 160*724ba675SRob Herring dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 161*724ba675SRob Herring dma-names = "rxtx"; 162*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 163*724ba675SRob Herring clock-names = "mci_clk"; 164*724ba675SRob Herring #address-cells = <1>; 165*724ba675SRob Herring #size-cells = <0>; 166*724ba675SRob Herring status = "disabled"; 167*724ba675SRob Herring }; 168*724ba675SRob Herring 169*724ba675SRob Herring tcb0: timer@f8008000 { 170*724ba675SRob Herring compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 171*724ba675SRob Herring #address-cells = <1>; 172*724ba675SRob Herring #size-cells = <0>; 173*724ba675SRob Herring reg = <0xf8008000 0x100>; 174*724ba675SRob Herring interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 175*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 176*724ba675SRob Herring clock-names = "t0_clk", "slow_clk"; 177*724ba675SRob Herring }; 178*724ba675SRob Herring 179*724ba675SRob Herring tcb1: timer@f800c000 { 180*724ba675SRob Herring compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 181*724ba675SRob Herring #address-cells = <1>; 182*724ba675SRob Herring #size-cells = <0>; 183*724ba675SRob Herring reg = <0xf800c000 0x100>; 184*724ba675SRob Herring interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 185*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; 186*724ba675SRob Herring clock-names = "t0_clk", "slow_clk"; 187*724ba675SRob Herring }; 188*724ba675SRob Herring 189*724ba675SRob Herring hlcdc: hlcdc@f8038000 { 190*724ba675SRob Herring compatible = "atmel,at91sam9n12-hlcdc"; 191*724ba675SRob Herring reg = <0xf8038000 0x2000>; 192*724ba675SRob Herring interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; 193*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 194*724ba675SRob Herring clock-names = "periph_clk", "sys_clk", "slow_clk"; 195*724ba675SRob Herring status = "disabled"; 196*724ba675SRob Herring 197*724ba675SRob Herring hlcdc-display-controller { 198*724ba675SRob Herring compatible = "atmel,hlcdc-display-controller"; 199*724ba675SRob Herring #address-cells = <1>; 200*724ba675SRob Herring #size-cells = <0>; 201*724ba675SRob Herring 202*724ba675SRob Herring port@0 { 203*724ba675SRob Herring #address-cells = <1>; 204*724ba675SRob Herring #size-cells = <0>; 205*724ba675SRob Herring reg = <0>; 206*724ba675SRob Herring }; 207*724ba675SRob Herring }; 208*724ba675SRob Herring 209*724ba675SRob Herring hlcdc_pwm: hlcdc-pwm { 210*724ba675SRob Herring compatible = "atmel,hlcdc-pwm"; 211*724ba675SRob Herring pinctrl-names = "default"; 212*724ba675SRob Herring pinctrl-0 = <&pinctrl_lcd_pwm>; 213*724ba675SRob Herring #pwm-cells = <3>; 214*724ba675SRob Herring }; 215*724ba675SRob Herring }; 216*724ba675SRob Herring 217*724ba675SRob Herring dma: dma-controller@ffffec00 { 218*724ba675SRob Herring compatible = "atmel,at91sam9g45-dma"; 219*724ba675SRob Herring reg = <0xffffec00 0x200>; 220*724ba675SRob Herring interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 221*724ba675SRob Herring #dma-cells = <2>; 222*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 223*724ba675SRob Herring clock-names = "dma_clk"; 224*724ba675SRob Herring }; 225*724ba675SRob Herring 226*724ba675SRob Herring pinctrl@fffff400 { 227*724ba675SRob Herring #address-cells = <1>; 228*724ba675SRob Herring #size-cells = <1>; 229*724ba675SRob Herring compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; 230*724ba675SRob Herring ranges = <0xfffff400 0xfffff400 0x800>; 231*724ba675SRob Herring 232*724ba675SRob Herring atmel,mux-mask = < 233*724ba675SRob Herring /* A B C */ 234*724ba675SRob Herring 0xffffffff 0xffe07983 0x00000000 /* pioA */ 235*724ba675SRob Herring 0x00040000 0x00047e0f 0x00000000 /* pioB */ 236*724ba675SRob Herring 0xfdffffff 0x07c00000 0xb83fffff /* pioC */ 237*724ba675SRob Herring 0x003fffff 0x003f8000 0x00000000 /* pioD */ 238*724ba675SRob Herring >; 239*724ba675SRob Herring 240*724ba675SRob Herring /* shared pinctrl settings */ 241*724ba675SRob Herring dbgu { 242*724ba675SRob Herring pinctrl_dbgu: dbgu-0 { 243*724ba675SRob Herring atmel,pins = 244*724ba675SRob Herring <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 245*724ba675SRob Herring AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 246*724ba675SRob Herring }; 247*724ba675SRob Herring }; 248*724ba675SRob Herring 249*724ba675SRob Herring lcd { 250*724ba675SRob Herring pinctrl_lcd_base: lcd-base-0 { 251*724ba675SRob Herring atmel,pins = 252*724ba675SRob Herring <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ 253*724ba675SRob Herring AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ 254*724ba675SRob Herring AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */ 255*724ba675SRob Herring AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ 256*724ba675SRob Herring AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ 257*724ba675SRob Herring }; 258*724ba675SRob Herring 259*724ba675SRob Herring pinctrl_lcd_pwm: lcd-pwm-0 { 260*724ba675SRob Herring atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ 261*724ba675SRob Herring }; 262*724ba675SRob Herring 263*724ba675SRob Herring pinctrl_lcd_rgb888: lcd-rgb-3 { 264*724ba675SRob Herring atmel,pins = 265*724ba675SRob Herring <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 266*724ba675SRob Herring AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 267*724ba675SRob Herring AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 268*724ba675SRob Herring AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 269*724ba675SRob Herring AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 270*724ba675SRob Herring AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 271*724ba675SRob Herring AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 272*724ba675SRob Herring AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 273*724ba675SRob Herring AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 274*724ba675SRob Herring AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 275*724ba675SRob Herring AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 276*724ba675SRob Herring AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 277*724ba675SRob Herring AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 278*724ba675SRob Herring AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 279*724ba675SRob Herring AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 280*724ba675SRob Herring AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 281*724ba675SRob Herring AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ 282*724ba675SRob Herring AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ 283*724ba675SRob Herring AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 284*724ba675SRob Herring AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 285*724ba675SRob Herring AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 286*724ba675SRob Herring AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 287*724ba675SRob Herring AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 288*724ba675SRob Herring AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 289*724ba675SRob Herring }; 290*724ba675SRob Herring }; 291*724ba675SRob Herring 292*724ba675SRob Herring usart0 { 293*724ba675SRob Herring pinctrl_usart0: usart0-0 { 294*724ba675SRob Herring atmel,pins = 295*724ba675SRob Herring <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 296*724ba675SRob Herring AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */ 297*724ba675SRob Herring }; 298*724ba675SRob Herring 299*724ba675SRob Herring pinctrl_usart0_rts: usart0_rts-0 { 300*724ba675SRob Herring atmel,pins = 301*724ba675SRob Herring <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ 302*724ba675SRob Herring }; 303*724ba675SRob Herring 304*724ba675SRob Herring pinctrl_usart0_cts: usart0_cts-0 { 305*724ba675SRob Herring atmel,pins = 306*724ba675SRob Herring <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ 307*724ba675SRob Herring }; 308*724ba675SRob Herring }; 309*724ba675SRob Herring 310*724ba675SRob Herring usart1 { 311*724ba675SRob Herring pinctrl_usart1: usart1-0 { 312*724ba675SRob Herring atmel,pins = 313*724ba675SRob Herring <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ 314*724ba675SRob Herring AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ 315*724ba675SRob Herring }; 316*724ba675SRob Herring }; 317*724ba675SRob Herring 318*724ba675SRob Herring usart2 { 319*724ba675SRob Herring pinctrl_usart2: usart2-0 { 320*724ba675SRob Herring atmel,pins = 321*724ba675SRob Herring <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ 322*724ba675SRob Herring AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */ 323*724ba675SRob Herring }; 324*724ba675SRob Herring 325*724ba675SRob Herring pinctrl_usart2_rts: usart2_rts-0 { 326*724ba675SRob Herring atmel,pins = 327*724ba675SRob Herring <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ 328*724ba675SRob Herring }; 329*724ba675SRob Herring 330*724ba675SRob Herring pinctrl_usart2_cts: usart2_cts-0 { 331*724ba675SRob Herring atmel,pins = 332*724ba675SRob Herring <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ 333*724ba675SRob Herring }; 334*724ba675SRob Herring }; 335*724ba675SRob Herring 336*724ba675SRob Herring usart3 { 337*724ba675SRob Herring pinctrl_usart3: usart3-0 { 338*724ba675SRob Herring atmel,pins = 339*724ba675SRob Herring <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */ 340*724ba675SRob Herring AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */ 341*724ba675SRob Herring }; 342*724ba675SRob Herring 343*724ba675SRob Herring pinctrl_usart3_rts: usart3_rts-0 { 344*724ba675SRob Herring atmel,pins = 345*724ba675SRob Herring <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ 346*724ba675SRob Herring }; 347*724ba675SRob Herring 348*724ba675SRob Herring pinctrl_usart3_cts: usart3_cts-0 { 349*724ba675SRob Herring atmel,pins = 350*724ba675SRob Herring <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ 351*724ba675SRob Herring }; 352*724ba675SRob Herring }; 353*724ba675SRob Herring 354*724ba675SRob Herring uart0 { 355*724ba675SRob Herring pinctrl_uart0: uart0-0 { 356*724ba675SRob Herring atmel,pins = 357*724ba675SRob Herring <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */ 358*724ba675SRob Herring AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */ 359*724ba675SRob Herring }; 360*724ba675SRob Herring }; 361*724ba675SRob Herring 362*724ba675SRob Herring uart1 { 363*724ba675SRob Herring pinctrl_uart1: uart1-0 { 364*724ba675SRob Herring atmel,pins = 365*724ba675SRob Herring <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE 366*724ba675SRob Herring AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; 367*724ba675SRob Herring }; 368*724ba675SRob Herring }; 369*724ba675SRob Herring 370*724ba675SRob Herring nand { 371*724ba675SRob Herring pinctrl_nand_rb: nand-rb-0 { 372*724ba675SRob Herring atmel,pins = 373*724ba675SRob Herring <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 374*724ba675SRob Herring }; 375*724ba675SRob Herring 376*724ba675SRob Herring pinctrl_nand_cs: nand-cs-0 { 377*724ba675SRob Herring atmel,pins = 378*724ba675SRob Herring <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 379*724ba675SRob Herring }; 380*724ba675SRob Herring }; 381*724ba675SRob Herring 382*724ba675SRob Herring mmc0 { 383*724ba675SRob Herring pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 384*724ba675SRob Herring atmel,pins = 385*724ba675SRob Herring <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ 386*724ba675SRob Herring AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 387*724ba675SRob Herring AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ 388*724ba675SRob Herring }; 389*724ba675SRob Herring 390*724ba675SRob Herring pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 391*724ba675SRob Herring atmel,pins = 392*724ba675SRob Herring <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 393*724ba675SRob Herring AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 394*724ba675SRob Herring AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 395*724ba675SRob Herring }; 396*724ba675SRob Herring 397*724ba675SRob Herring pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 398*724ba675SRob Herring atmel,pins = 399*724ba675SRob Herring <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ 400*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ 401*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */ 402*724ba675SRob Herring AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */ 403*724ba675SRob Herring }; 404*724ba675SRob Herring }; 405*724ba675SRob Herring 406*724ba675SRob Herring ssc0 { 407*724ba675SRob Herring pinctrl_ssc0_tx: ssc0_tx-0 { 408*724ba675SRob Herring atmel,pins = 409*724ba675SRob Herring <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ 410*724ba675SRob Herring AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ 411*724ba675SRob Herring AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ 412*724ba675SRob Herring }; 413*724ba675SRob Herring 414*724ba675SRob Herring pinctrl_ssc0_rx: ssc0_rx-0 { 415*724ba675SRob Herring atmel,pins = 416*724ba675SRob Herring <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ 417*724ba675SRob Herring AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ 418*724ba675SRob Herring AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ 419*724ba675SRob Herring }; 420*724ba675SRob Herring }; 421*724ba675SRob Herring 422*724ba675SRob Herring spi0 { 423*724ba675SRob Herring pinctrl_spi0: spi0-0 { 424*724ba675SRob Herring atmel,pins = 425*724ba675SRob Herring <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ 426*724ba675SRob Herring AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ 427*724ba675SRob Herring AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ 428*724ba675SRob Herring }; 429*724ba675SRob Herring }; 430*724ba675SRob Herring 431*724ba675SRob Herring spi1 { 432*724ba675SRob Herring pinctrl_spi1: spi1-0 { 433*724ba675SRob Herring atmel,pins = 434*724ba675SRob Herring <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ 435*724ba675SRob Herring AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ 436*724ba675SRob Herring AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ 437*724ba675SRob Herring }; 438*724ba675SRob Herring }; 439*724ba675SRob Herring 440*724ba675SRob Herring i2c0 { 441*724ba675SRob Herring pinctrl_i2c0: i2c0-0 { 442*724ba675SRob Herring atmel,pins = 443*724ba675SRob Herring <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE 444*724ba675SRob Herring AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 445*724ba675SRob Herring }; 446*724ba675SRob Herring }; 447*724ba675SRob Herring 448*724ba675SRob Herring i2c1 { 449*724ba675SRob Herring pinctrl_i2c1: i2c1-0 { 450*724ba675SRob Herring atmel,pins = 451*724ba675SRob Herring <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE 452*724ba675SRob Herring AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; 453*724ba675SRob Herring }; 454*724ba675SRob Herring }; 455*724ba675SRob Herring 456*724ba675SRob Herring tcb0 { 457*724ba675SRob Herring pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 458*724ba675SRob Herring atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; 459*724ba675SRob Herring }; 460*724ba675SRob Herring 461*724ba675SRob Herring pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 462*724ba675SRob Herring atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 463*724ba675SRob Herring }; 464*724ba675SRob Herring 465*724ba675SRob Herring pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 466*724ba675SRob Herring atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 467*724ba675SRob Herring }; 468*724ba675SRob Herring 469*724ba675SRob Herring pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 470*724ba675SRob Herring atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 471*724ba675SRob Herring }; 472*724ba675SRob Herring 473*724ba675SRob Herring pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 474*724ba675SRob Herring atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 475*724ba675SRob Herring }; 476*724ba675SRob Herring 477*724ba675SRob Herring pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 478*724ba675SRob Herring atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 479*724ba675SRob Herring }; 480*724ba675SRob Herring 481*724ba675SRob Herring pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 482*724ba675SRob Herring atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 483*724ba675SRob Herring }; 484*724ba675SRob Herring 485*724ba675SRob Herring pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 486*724ba675SRob Herring atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 487*724ba675SRob Herring }; 488*724ba675SRob Herring 489*724ba675SRob Herring pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 490*724ba675SRob Herring atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 491*724ba675SRob Herring }; 492*724ba675SRob Herring }; 493*724ba675SRob Herring 494*724ba675SRob Herring tcb1 { 495*724ba675SRob Herring pinctrl_tcb1_tclk0: tcb1_tclk0-0 { 496*724ba675SRob Herring atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; 497*724ba675SRob Herring }; 498*724ba675SRob Herring 499*724ba675SRob Herring pinctrl_tcb1_tclk1: tcb1_tclk1-0 { 500*724ba675SRob Herring atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; 501*724ba675SRob Herring }; 502*724ba675SRob Herring 503*724ba675SRob Herring pinctrl_tcb1_tclk2: tcb1_tclk2-0 { 504*724ba675SRob Herring atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>; 505*724ba675SRob Herring }; 506*724ba675SRob Herring 507*724ba675SRob Herring pinctrl_tcb1_tioa0: tcb1_tioa0-0 { 508*724ba675SRob Herring atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>; 509*724ba675SRob Herring }; 510*724ba675SRob Herring 511*724ba675SRob Herring pinctrl_tcb1_tioa1: tcb1_tioa1-0 { 512*724ba675SRob Herring atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; 513*724ba675SRob Herring }; 514*724ba675SRob Herring 515*724ba675SRob Herring pinctrl_tcb1_tioa2: tcb1_tioa2-0 { 516*724ba675SRob Herring atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>; 517*724ba675SRob Herring }; 518*724ba675SRob Herring 519*724ba675SRob Herring pinctrl_tcb1_tiob0: tcb1_tiob0-0 { 520*724ba675SRob Herring atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; 521*724ba675SRob Herring }; 522*724ba675SRob Herring 523*724ba675SRob Herring pinctrl_tcb1_tiob1: tcb1_tiob1-0 { 524*724ba675SRob Herring atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; 525*724ba675SRob Herring }; 526*724ba675SRob Herring 527*724ba675SRob Herring pinctrl_tcb1_tiob2: tcb1_tiob2-0 { 528*724ba675SRob Herring atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; 529*724ba675SRob Herring }; 530*724ba675SRob Herring }; 531*724ba675SRob Herring 532*724ba675SRob Herring pioA: gpio@fffff400 { 533*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 534*724ba675SRob Herring reg = <0xfffff400 0x200>; 535*724ba675SRob Herring interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 536*724ba675SRob Herring #gpio-cells = <2>; 537*724ba675SRob Herring gpio-controller; 538*724ba675SRob Herring interrupt-controller; 539*724ba675SRob Herring #interrupt-cells = <2>; 540*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 541*724ba675SRob Herring }; 542*724ba675SRob Herring 543*724ba675SRob Herring pioB: gpio@fffff600 { 544*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 545*724ba675SRob Herring reg = <0xfffff600 0x200>; 546*724ba675SRob Herring interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 547*724ba675SRob Herring #gpio-cells = <2>; 548*724ba675SRob Herring gpio-controller; 549*724ba675SRob Herring interrupt-controller; 550*724ba675SRob Herring #interrupt-cells = <2>; 551*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 552*724ba675SRob Herring }; 553*724ba675SRob Herring 554*724ba675SRob Herring pioC: gpio@fffff800 { 555*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 556*724ba675SRob Herring reg = <0xfffff800 0x200>; 557*724ba675SRob Herring interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 558*724ba675SRob Herring #gpio-cells = <2>; 559*724ba675SRob Herring gpio-controller; 560*724ba675SRob Herring interrupt-controller; 561*724ba675SRob Herring #interrupt-cells = <2>; 562*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 563*724ba675SRob Herring }; 564*724ba675SRob Herring 565*724ba675SRob Herring pioD: gpio@fffffa00 { 566*724ba675SRob Herring compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 567*724ba675SRob Herring reg = <0xfffffa00 0x200>; 568*724ba675SRob Herring interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 569*724ba675SRob Herring #gpio-cells = <2>; 570*724ba675SRob Herring gpio-controller; 571*724ba675SRob Herring interrupt-controller; 572*724ba675SRob Herring #interrupt-cells = <2>; 573*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 574*724ba675SRob Herring }; 575*724ba675SRob Herring }; 576*724ba675SRob Herring 577*724ba675SRob Herring dbgu: serial@fffff200 { 578*724ba675SRob Herring compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 579*724ba675SRob Herring reg = <0xfffff200 0x200>; 580*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 581*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 582*724ba675SRob Herring pinctrl-names = "default"; 583*724ba675SRob Herring pinctrl-0 = <&pinctrl_dbgu>; 584*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 585*724ba675SRob Herring clock-names = "usart"; 586*724ba675SRob Herring status = "disabled"; 587*724ba675SRob Herring }; 588*724ba675SRob Herring 589*724ba675SRob Herring ssc0: ssc@f0010000 { 590*724ba675SRob Herring compatible = "atmel,at91sam9g45-ssc"; 591*724ba675SRob Herring reg = <0xf0010000 0x4000>; 592*724ba675SRob Herring interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; 593*724ba675SRob Herring dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>, 594*724ba675SRob Herring <&dma 0 AT91_DMA_CFG_PER_ID(22)>; 595*724ba675SRob Herring dma-names = "tx", "rx"; 596*724ba675SRob Herring pinctrl-names = "default"; 597*724ba675SRob Herring pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 598*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 599*724ba675SRob Herring clock-names = "pclk"; 600*724ba675SRob Herring status = "disabled"; 601*724ba675SRob Herring }; 602*724ba675SRob Herring 603*724ba675SRob Herring usart0: serial@f801c000 { 604*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 605*724ba675SRob Herring reg = <0xf801c000 0x4000>; 606*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 607*724ba675SRob Herring interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; 608*724ba675SRob Herring pinctrl-names = "default"; 609*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart0>; 610*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 611*724ba675SRob Herring clock-names = "usart"; 612*724ba675SRob Herring status = "disabled"; 613*724ba675SRob Herring }; 614*724ba675SRob Herring 615*724ba675SRob Herring usart1: serial@f8020000 { 616*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 617*724ba675SRob Herring reg = <0xf8020000 0x4000>; 618*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 619*724ba675SRob Herring interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 620*724ba675SRob Herring pinctrl-names = "default"; 621*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart1>; 622*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 623*724ba675SRob Herring clock-names = "usart"; 624*724ba675SRob Herring status = "disabled"; 625*724ba675SRob Herring }; 626*724ba675SRob Herring 627*724ba675SRob Herring usart2: serial@f8024000 { 628*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 629*724ba675SRob Herring reg = <0xf8024000 0x4000>; 630*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 631*724ba675SRob Herring interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 632*724ba675SRob Herring pinctrl-names = "default"; 633*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart2>; 634*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 635*724ba675SRob Herring clock-names = "usart"; 636*724ba675SRob Herring status = "disabled"; 637*724ba675SRob Herring }; 638*724ba675SRob Herring 639*724ba675SRob Herring usart3: serial@f8028000 { 640*724ba675SRob Herring compatible = "atmel,at91sam9260-usart"; 641*724ba675SRob Herring reg = <0xf8028000 0x4000>; 642*724ba675SRob Herring atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 643*724ba675SRob Herring interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 644*724ba675SRob Herring pinctrl-names = "default"; 645*724ba675SRob Herring pinctrl-0 = <&pinctrl_usart3>; 646*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 647*724ba675SRob Herring clock-names = "usart"; 648*724ba675SRob Herring status = "disabled"; 649*724ba675SRob Herring }; 650*724ba675SRob Herring 651*724ba675SRob Herring i2c0: i2c@f8010000 { 652*724ba675SRob Herring compatible = "atmel,at91sam9x5-i2c"; 653*724ba675SRob Herring reg = <0xf8010000 0x100>; 654*724ba675SRob Herring interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; 655*724ba675SRob Herring dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>, 656*724ba675SRob Herring <&dma 1 AT91_DMA_CFG_PER_ID(14)>; 657*724ba675SRob Herring dma-names = "tx", "rx"; 658*724ba675SRob Herring #address-cells = <1>; 659*724ba675SRob Herring #size-cells = <0>; 660*724ba675SRob Herring pinctrl-names = "default"; 661*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c0>; 662*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 663*724ba675SRob Herring status = "disabled"; 664*724ba675SRob Herring }; 665*724ba675SRob Herring 666*724ba675SRob Herring i2c1: i2c@f8014000 { 667*724ba675SRob Herring compatible = "atmel,at91sam9x5-i2c"; 668*724ba675SRob Herring reg = <0xf8014000 0x100>; 669*724ba675SRob Herring interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; 670*724ba675SRob Herring dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>, 671*724ba675SRob Herring <&dma 1 AT91_DMA_CFG_PER_ID(16)>; 672*724ba675SRob Herring dma-names = "tx", "rx"; 673*724ba675SRob Herring #address-cells = <1>; 674*724ba675SRob Herring #size-cells = <0>; 675*724ba675SRob Herring pinctrl-names = "default"; 676*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 677*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 678*724ba675SRob Herring status = "disabled"; 679*724ba675SRob Herring }; 680*724ba675SRob Herring 681*724ba675SRob Herring spi0: spi@f0000000 { 682*724ba675SRob Herring #address-cells = <1>; 683*724ba675SRob Herring #size-cells = <0>; 684*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 685*724ba675SRob Herring reg = <0xf0000000 0x100>; 686*724ba675SRob Herring interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 687*724ba675SRob Herring dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>, 688*724ba675SRob Herring <&dma 1 AT91_DMA_CFG_PER_ID(2)>; 689*724ba675SRob Herring dma-names = "tx", "rx"; 690*724ba675SRob Herring pinctrl-names = "default"; 691*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi0>; 692*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 693*724ba675SRob Herring clock-names = "spi_clk"; 694*724ba675SRob Herring status = "disabled"; 695*724ba675SRob Herring }; 696*724ba675SRob Herring 697*724ba675SRob Herring spi1: spi@f0004000 { 698*724ba675SRob Herring #address-cells = <1>; 699*724ba675SRob Herring #size-cells = <0>; 700*724ba675SRob Herring compatible = "atmel,at91rm9200-spi"; 701*724ba675SRob Herring reg = <0xf0004000 0x100>; 702*724ba675SRob Herring interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 703*724ba675SRob Herring dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>, 704*724ba675SRob Herring <&dma 1 AT91_DMA_CFG_PER_ID(4)>; 705*724ba675SRob Herring dma-names = "tx", "rx"; 706*724ba675SRob Herring pinctrl-names = "default"; 707*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi1>; 708*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 709*724ba675SRob Herring clock-names = "spi_clk"; 710*724ba675SRob Herring status = "disabled"; 711*724ba675SRob Herring }; 712*724ba675SRob Herring 713*724ba675SRob Herring watchdog@fffffe40 { 714*724ba675SRob Herring compatible = "atmel,at91sam9260-wdt"; 715*724ba675SRob Herring reg = <0xfffffe40 0x10>; 716*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 717*724ba675SRob Herring clocks = <&clk32k>; 718*724ba675SRob Herring atmel,watchdog-type = "hardware"; 719*724ba675SRob Herring atmel,reset-type = "all"; 720*724ba675SRob Herring atmel,dbg-halt; 721*724ba675SRob Herring status = "disabled"; 722*724ba675SRob Herring }; 723*724ba675SRob Herring 724*724ba675SRob Herring rtc@fffffeb0 { 725*724ba675SRob Herring compatible = "atmel,at91rm9200-rtc"; 726*724ba675SRob Herring reg = <0xfffffeb0 0x40>; 727*724ba675SRob Herring interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 728*724ba675SRob Herring clocks = <&clk32k>; 729*724ba675SRob Herring status = "disabled"; 730*724ba675SRob Herring }; 731*724ba675SRob Herring 732*724ba675SRob Herring pwm0: pwm@f8034000 { 733*724ba675SRob Herring compatible = "atmel,at91sam9rl-pwm"; 734*724ba675SRob Herring reg = <0xf8034000 0x300>; 735*724ba675SRob Herring interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; 736*724ba675SRob Herring #pwm-cells = <3>; 737*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 738*724ba675SRob Herring status = "disabled"; 739*724ba675SRob Herring }; 740*724ba675SRob Herring 741*724ba675SRob Herring usb1: gadget@f803c000 { 742*724ba675SRob Herring compatible = "atmel,at91sam9260-udc"; 743*724ba675SRob Herring reg = <0xf803c000 0x4000>; 744*724ba675SRob Herring interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; 745*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>; 746*724ba675SRob Herring clock-names = "pclk", "hclk"; 747*724ba675SRob Herring status = "disabled"; 748*724ba675SRob Herring }; 749*724ba675SRob Herring }; 750*724ba675SRob Herring 751*724ba675SRob Herring usb0: ohci@500000 { 752*724ba675SRob Herring compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 753*724ba675SRob Herring reg = <0x00500000 0x00100000>; 754*724ba675SRob Herring interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 755*724ba675SRob Herring clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; 756*724ba675SRob Herring clock-names = "ohci_clk", "hclk", "uhpck"; 757*724ba675SRob Herring status = "disabled"; 758*724ba675SRob Herring }; 759*724ba675SRob Herring 760*724ba675SRob Herring ebi: ebi@10000000 { 761*724ba675SRob Herring compatible = "atmel,at91sam9x5-ebi"; 762*724ba675SRob Herring #address-cells = <2>; 763*724ba675SRob Herring #size-cells = <1>; 764*724ba675SRob Herring atmel,smc = <&smc>; 765*724ba675SRob Herring atmel,matrix = <&matrix>; 766*724ba675SRob Herring reg = <0x10000000 0x60000000>; 767*724ba675SRob Herring ranges = <0x0 0x0 0x10000000 0x10000000 768*724ba675SRob Herring 0x1 0x0 0x20000000 0x10000000 769*724ba675SRob Herring 0x2 0x0 0x30000000 0x10000000 770*724ba675SRob Herring 0x3 0x0 0x40000000 0x10000000 771*724ba675SRob Herring 0x4 0x0 0x50000000 0x10000000 772*724ba675SRob Herring 0x5 0x0 0x60000000 0x10000000>; 773*724ba675SRob Herring clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 774*724ba675SRob Herring status = "disabled"; 775*724ba675SRob Herring 776*724ba675SRob Herring nand_controller: nand-controller { 777*724ba675SRob Herring compatible = "atmel,at91sam9g45-nand-controller"; 778*724ba675SRob Herring ecc-engine = <&pmecc>; 779*724ba675SRob Herring #address-cells = <2>; 780*724ba675SRob Herring #size-cells = <1>; 781*724ba675SRob Herring ranges; 782*724ba675SRob Herring status = "disabled"; 783*724ba675SRob Herring }; 784*724ba675SRob Herring }; 785*724ba675SRob Herring }; 786*724ba675SRob Herring 787*724ba675SRob Herring i2c-gpio-0 { 788*724ba675SRob Herring compatible = "i2c-gpio"; 789*724ba675SRob Herring gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ 790*724ba675SRob Herring &pioA 31 GPIO_ACTIVE_HIGH /* scl */ 791*724ba675SRob Herring >; 792*724ba675SRob Herring i2c-gpio,sda-open-drain; 793*724ba675SRob Herring i2c-gpio,scl-open-drain; 794*724ba675SRob Herring i2c-gpio,delay-us = <2>; /* ~100 kHz */ 795*724ba675SRob Herring #address-cells = <1>; 796*724ba675SRob Herring #size-cells = <0>; 797*724ba675SRob Herring status = "disabled"; 798*724ba675SRob Herring }; 799*724ba675SRob Herring}; 800