1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2*724ba675SRob Herring/*
3*724ba675SRob Herring * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4*724ba675SRob Herring *
5*724ba675SRob Herring *  Copyright (C) 2014 Microchip
6*724ba675SRob Herring *  Alexandre Belloni <alexandre.belloni@free-electrons.com>
7*724ba675SRob Herring */
8*724ba675SRob Herring
9*724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h>
10*724ba675SRob Herring#include <dt-bindings/clock/at91.h>
11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
12*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
13*724ba675SRob Herring#include <dt-bindings/pwm/pwm.h>
14*724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h>
15*724ba675SRob Herring
16*724ba675SRob Herring/ {
17*724ba675SRob Herring	#address-cells = <1>;
18*724ba675SRob Herring	#size-cells = <1>;
19*724ba675SRob Herring	model = "Atmel AT91SAM9RL family SoC";
20*724ba675SRob Herring	compatible = "atmel,at91sam9rl", "atmel,at91sam9";
21*724ba675SRob Herring	interrupt-parent = <&aic>;
22*724ba675SRob Herring
23*724ba675SRob Herring	aliases {
24*724ba675SRob Herring		serial0 = &dbgu;
25*724ba675SRob Herring		serial1 = &usart0;
26*724ba675SRob Herring		serial2 = &usart1;
27*724ba675SRob Herring		serial3 = &usart2;
28*724ba675SRob Herring		serial4 = &usart3;
29*724ba675SRob Herring		gpio0 = &pioA;
30*724ba675SRob Herring		gpio1 = &pioB;
31*724ba675SRob Herring		gpio2 = &pioC;
32*724ba675SRob Herring		gpio3 = &pioD;
33*724ba675SRob Herring		tcb0 = &tcb0;
34*724ba675SRob Herring		i2c0 = &i2c0;
35*724ba675SRob Herring		i2c1 = &i2c1;
36*724ba675SRob Herring		ssc0 = &ssc0;
37*724ba675SRob Herring		ssc1 = &ssc1;
38*724ba675SRob Herring		pwm0 = &pwm0;
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	cpus {
42*724ba675SRob Herring		#address-cells = <1>;
43*724ba675SRob Herring		#size-cells = <0>;
44*724ba675SRob Herring
45*724ba675SRob Herring		cpu@0 {
46*724ba675SRob Herring			compatible = "arm,arm926ej-s";
47*724ba675SRob Herring			device_type = "cpu";
48*724ba675SRob Herring			reg = <0>;
49*724ba675SRob Herring		};
50*724ba675SRob Herring	};
51*724ba675SRob Herring
52*724ba675SRob Herring	memory@20000000 {
53*724ba675SRob Herring		device_type = "memory";
54*724ba675SRob Herring		reg = <0x20000000 0x04000000>;
55*724ba675SRob Herring	};
56*724ba675SRob Herring
57*724ba675SRob Herring	clocks {
58*724ba675SRob Herring		slow_xtal: slow_xtal {
59*724ba675SRob Herring			compatible = "fixed-clock";
60*724ba675SRob Herring			#clock-cells = <0>;
61*724ba675SRob Herring			clock-frequency = <0>;
62*724ba675SRob Herring		};
63*724ba675SRob Herring
64*724ba675SRob Herring		main_xtal: main_xtal {
65*724ba675SRob Herring			compatible = "fixed-clock";
66*724ba675SRob Herring			#clock-cells = <0>;
67*724ba675SRob Herring			clock-frequency = <0>;
68*724ba675SRob Herring		};
69*724ba675SRob Herring
70*724ba675SRob Herring		adc_op_clk: adc_op_clk {
71*724ba675SRob Herring			compatible = "fixed-clock";
72*724ba675SRob Herring			#clock-cells = <0>;
73*724ba675SRob Herring			clock-frequency = <1000000>;
74*724ba675SRob Herring		};
75*724ba675SRob Herring	};
76*724ba675SRob Herring
77*724ba675SRob Herring	sram: sram@300000 {
78*724ba675SRob Herring		compatible = "mmio-sram";
79*724ba675SRob Herring		reg = <0x00300000 0x10000>;
80*724ba675SRob Herring		#address-cells = <1>;
81*724ba675SRob Herring		#size-cells = <1>;
82*724ba675SRob Herring		ranges = <0 0x00300000 0x10000>;
83*724ba675SRob Herring	};
84*724ba675SRob Herring
85*724ba675SRob Herring	ahb {
86*724ba675SRob Herring		compatible = "simple-bus";
87*724ba675SRob Herring		#address-cells = <1>;
88*724ba675SRob Herring		#size-cells = <1>;
89*724ba675SRob Herring		ranges;
90*724ba675SRob Herring
91*724ba675SRob Herring		fb0: fb@500000 {
92*724ba675SRob Herring			compatible = "atmel,at91sam9rl-lcdc";
93*724ba675SRob Herring			reg = <0x00500000 0x1000>;
94*724ba675SRob Herring			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
95*724ba675SRob Herring			pinctrl-names = "default";
96*724ba675SRob Herring			pinctrl-0 = <&pinctrl_fb>;
97*724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
98*724ba675SRob Herring			clock-names = "hclk", "lcdc_clk";
99*724ba675SRob Herring			status = "disabled";
100*724ba675SRob Herring		};
101*724ba675SRob Herring
102*724ba675SRob Herring		ebi: ebi@10000000 {
103*724ba675SRob Herring			compatible = "atmel,at91sam9rl-ebi";
104*724ba675SRob Herring			#address-cells = <2>;
105*724ba675SRob Herring			#size-cells = <1>;
106*724ba675SRob Herring			atmel,smc = <&smc>;
107*724ba675SRob Herring			atmel,matrix = <&matrix>;
108*724ba675SRob Herring			reg = <0x10000000 0x80000000>;
109*724ba675SRob Herring			ranges = <0x0 0x0 0x10000000 0x10000000
110*724ba675SRob Herring				  0x1 0x0 0x20000000 0x10000000
111*724ba675SRob Herring				  0x2 0x0 0x30000000 0x10000000
112*724ba675SRob Herring				  0x3 0x0 0x40000000 0x10000000
113*724ba675SRob Herring				  0x4 0x0 0x50000000 0x10000000
114*724ba675SRob Herring				  0x5 0x0 0x60000000 0x10000000>;
115*724ba675SRob Herring			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
116*724ba675SRob Herring			status = "disabled";
117*724ba675SRob Herring
118*724ba675SRob Herring			nand_controller: nand-controller {
119*724ba675SRob Herring				compatible = "atmel,at91sam9g45-nand-controller";
120*724ba675SRob Herring				#address-cells = <2>;
121*724ba675SRob Herring				#size-cells = <1>;
122*724ba675SRob Herring				ranges;
123*724ba675SRob Herring				status = "disabled";
124*724ba675SRob Herring			};
125*724ba675SRob Herring		};
126*724ba675SRob Herring
127*724ba675SRob Herring		apb {
128*724ba675SRob Herring			compatible = "simple-bus";
129*724ba675SRob Herring			#address-cells = <1>;
130*724ba675SRob Herring			#size-cells = <1>;
131*724ba675SRob Herring			ranges;
132*724ba675SRob Herring
133*724ba675SRob Herring			tcb0: timer@fffa0000 {
134*724ba675SRob Herring				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
135*724ba675SRob Herring				#address-cells = <1>;
136*724ba675SRob Herring				#size-cells = <0>;
137*724ba675SRob Herring				reg = <0xfffa0000 0x100>;
138*724ba675SRob Herring				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
139*724ba675SRob Herring					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
140*724ba675SRob Herring					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
141*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
142*724ba675SRob Herring				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
143*724ba675SRob Herring			};
144*724ba675SRob Herring
145*724ba675SRob Herring			mmc0: mmc@fffa4000 {
146*724ba675SRob Herring				compatible = "atmel,hsmci";
147*724ba675SRob Herring				reg = <0xfffa4000 0x600>;
148*724ba675SRob Herring				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
149*724ba675SRob Herring				#address-cells = <1>;
150*724ba675SRob Herring				#size-cells = <0>;
151*724ba675SRob Herring				pinctrl-names = "default";
152*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
153*724ba675SRob Herring				clock-names = "mci_clk";
154*724ba675SRob Herring				status = "disabled";
155*724ba675SRob Herring			};
156*724ba675SRob Herring
157*724ba675SRob Herring			i2c0: i2c@fffa8000 {
158*724ba675SRob Herring				compatible = "atmel,at91sam9260-i2c";
159*724ba675SRob Herring				reg = <0xfffa8000 0x100>;
160*724ba675SRob Herring				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
161*724ba675SRob Herring				#address-cells = <1>;
162*724ba675SRob Herring				#size-cells = <0>;
163*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
164*724ba675SRob Herring				status = "disabled";
165*724ba675SRob Herring			};
166*724ba675SRob Herring
167*724ba675SRob Herring			i2c1: i2c@fffac000 {
168*724ba675SRob Herring				compatible = "atmel,at91sam9260-i2c";
169*724ba675SRob Herring				reg = <0xfffac000 0x100>;
170*724ba675SRob Herring				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
171*724ba675SRob Herring				#address-cells = <1>;
172*724ba675SRob Herring				#size-cells = <0>;
173*724ba675SRob Herring				status = "disabled";
174*724ba675SRob Herring			};
175*724ba675SRob Herring
176*724ba675SRob Herring			usart0: serial@fffb0000 {
177*724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
178*724ba675SRob Herring				reg = <0xfffb0000 0x200>;
179*724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
180*724ba675SRob Herring				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
181*724ba675SRob Herring				atmel,use-dma-rx;
182*724ba675SRob Herring				atmel,use-dma-tx;
183*724ba675SRob Herring				pinctrl-names = "default";
184*724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart0>;
185*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
186*724ba675SRob Herring				clock-names = "usart";
187*724ba675SRob Herring				status = "disabled";
188*724ba675SRob Herring			};
189*724ba675SRob Herring
190*724ba675SRob Herring			usart1: serial@fffb4000 {
191*724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
192*724ba675SRob Herring				reg = <0xfffb4000 0x200>;
193*724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
194*724ba675SRob Herring				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
195*724ba675SRob Herring				atmel,use-dma-rx;
196*724ba675SRob Herring				atmel,use-dma-tx;
197*724ba675SRob Herring				pinctrl-names = "default";
198*724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart1>;
199*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
200*724ba675SRob Herring				clock-names = "usart";
201*724ba675SRob Herring				status = "disabled";
202*724ba675SRob Herring			};
203*724ba675SRob Herring
204*724ba675SRob Herring			usart2: serial@fffb8000 {
205*724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
206*724ba675SRob Herring				reg = <0xfffb8000 0x200>;
207*724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
208*724ba675SRob Herring				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
209*724ba675SRob Herring				atmel,use-dma-rx;
210*724ba675SRob Herring				atmel,use-dma-tx;
211*724ba675SRob Herring				pinctrl-names = "default";
212*724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart2>;
213*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
214*724ba675SRob Herring				clock-names = "usart";
215*724ba675SRob Herring				status = "disabled";
216*724ba675SRob Herring			};
217*724ba675SRob Herring
218*724ba675SRob Herring			usart3: serial@fffbc000 {
219*724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
220*724ba675SRob Herring				reg = <0xfffbc000 0x200>;
221*724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
222*724ba675SRob Herring				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
223*724ba675SRob Herring				atmel,use-dma-rx;
224*724ba675SRob Herring				atmel,use-dma-tx;
225*724ba675SRob Herring				pinctrl-names = "default";
226*724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart3>;
227*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
228*724ba675SRob Herring				clock-names = "usart";
229*724ba675SRob Herring				status = "disabled";
230*724ba675SRob Herring			};
231*724ba675SRob Herring
232*724ba675SRob Herring			ssc0: ssc@fffc0000 {
233*724ba675SRob Herring				compatible = "atmel,at91sam9rl-ssc";
234*724ba675SRob Herring				reg = <0xfffc0000 0x4000>;
235*724ba675SRob Herring				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
236*724ba675SRob Herring				pinctrl-names = "default";
237*724ba675SRob Herring				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
238*724ba675SRob Herring				status = "disabled";
239*724ba675SRob Herring			};
240*724ba675SRob Herring
241*724ba675SRob Herring			ssc1: ssc@fffc4000 {
242*724ba675SRob Herring				compatible = "atmel,at91sam9rl-ssc";
243*724ba675SRob Herring				reg = <0xfffc4000 0x4000>;
244*724ba675SRob Herring				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
245*724ba675SRob Herring				pinctrl-names = "default";
246*724ba675SRob Herring				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
247*724ba675SRob Herring				status = "disabled";
248*724ba675SRob Herring			};
249*724ba675SRob Herring
250*724ba675SRob Herring			pwm0: pwm@fffc8000 {
251*724ba675SRob Herring				compatible = "atmel,at91sam9rl-pwm";
252*724ba675SRob Herring				reg = <0xfffc8000 0x300>;
253*724ba675SRob Herring				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
254*724ba675SRob Herring				#pwm-cells = <3>;
255*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
256*724ba675SRob Herring				clock-names = "pwm_clk";
257*724ba675SRob Herring				status = "disabled";
258*724ba675SRob Herring			};
259*724ba675SRob Herring
260*724ba675SRob Herring			spi0: spi@fffcc000 {
261*724ba675SRob Herring				#address-cells = <1>;
262*724ba675SRob Herring				#size-cells = <0>;
263*724ba675SRob Herring				compatible = "atmel,at91rm9200-spi";
264*724ba675SRob Herring				reg = <0xfffcc000 0x200>;
265*724ba675SRob Herring				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
266*724ba675SRob Herring				pinctrl-names = "default";
267*724ba675SRob Herring				pinctrl-0 = <&pinctrl_spi0>;
268*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
269*724ba675SRob Herring				clock-names = "spi_clk";
270*724ba675SRob Herring				status = "disabled";
271*724ba675SRob Herring			};
272*724ba675SRob Herring
273*724ba675SRob Herring			adc0: adc@fffd0000 {
274*724ba675SRob Herring				compatible = "atmel,at91sam9rl-adc";
275*724ba675SRob Herring				reg = <0xfffd0000 0x100>;
276*724ba675SRob Herring				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
277*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
278*724ba675SRob Herring				clock-names = "adc_clk", "adc_op_clk";
279*724ba675SRob Herring				atmel,adc-use-external-triggers;
280*724ba675SRob Herring				atmel,adc-channels-used = <0x3f>;
281*724ba675SRob Herring				atmel,adc-vref = <3300>;
282*724ba675SRob Herring				atmel,adc-startup-time = <40>;
283*724ba675SRob Herring			};
284*724ba675SRob Herring
285*724ba675SRob Herring			usb0: gadget@fffd4000 {
286*724ba675SRob Herring				compatible = "atmel,at91sam9rl-udc";
287*724ba675SRob Herring				reg = <0x00600000 0x100000>,
288*724ba675SRob Herring				      <0xfffd4000 0x4000>;
289*724ba675SRob Herring				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
290*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
291*724ba675SRob Herring				clock-names = "pclk", "hclk";
292*724ba675SRob Herring				status = "disabled";
293*724ba675SRob Herring			};
294*724ba675SRob Herring
295*724ba675SRob Herring			dma0: dma-controller@ffffe600 {
296*724ba675SRob Herring				compatible = "atmel,at91sam9rl-dma";
297*724ba675SRob Herring				reg = <0xffffe600 0x200>;
298*724ba675SRob Herring				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
299*724ba675SRob Herring				#dma-cells = <2>;
300*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
301*724ba675SRob Herring				clock-names = "dma_clk";
302*724ba675SRob Herring			};
303*724ba675SRob Herring
304*724ba675SRob Herring			ramc0: ramc@ffffea00 {
305*724ba675SRob Herring				compatible = "atmel,at91sam9260-sdramc";
306*724ba675SRob Herring				reg = <0xffffea00 0x200>;
307*724ba675SRob Herring			};
308*724ba675SRob Herring
309*724ba675SRob Herring			smc: smc@ffffec00 {
310*724ba675SRob Herring				compatible = "atmel,at91sam9260-smc", "syscon";
311*724ba675SRob Herring				reg = <0xffffec00 0x200>;
312*724ba675SRob Herring			};
313*724ba675SRob Herring
314*724ba675SRob Herring			matrix: matrix@ffffee00 {
315*724ba675SRob Herring				compatible = "atmel,at91sam9rl-matrix", "syscon";
316*724ba675SRob Herring				reg = <0xffffee00 0x200>;
317*724ba675SRob Herring			};
318*724ba675SRob Herring
319*724ba675SRob Herring			aic: interrupt-controller@fffff000 {
320*724ba675SRob Herring				#interrupt-cells = <3>;
321*724ba675SRob Herring				compatible = "atmel,at91rm9200-aic";
322*724ba675SRob Herring				interrupt-controller;
323*724ba675SRob Herring				reg = <0xfffff000 0x200>;
324*724ba675SRob Herring				atmel,external-irqs = <31>;
325*724ba675SRob Herring			};
326*724ba675SRob Herring
327*724ba675SRob Herring			dbgu: serial@fffff200 {
328*724ba675SRob Herring				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
329*724ba675SRob Herring				reg = <0xfffff200 0x200>;
330*724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
331*724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
332*724ba675SRob Herring				pinctrl-names = "default";
333*724ba675SRob Herring				pinctrl-0 = <&pinctrl_dbgu>;
334*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
335*724ba675SRob Herring				clock-names = "usart";
336*724ba675SRob Herring				status = "disabled";
337*724ba675SRob Herring			};
338*724ba675SRob Herring
339*724ba675SRob Herring			pinctrl@fffff400 {
340*724ba675SRob Herring				#address-cells = <1>;
341*724ba675SRob Herring				#size-cells = <1>;
342*724ba675SRob Herring				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
343*724ba675SRob Herring				ranges = <0xfffff400 0xfffff400 0x800>;
344*724ba675SRob Herring
345*724ba675SRob Herring				atmel,mux-mask =
346*724ba675SRob Herring					/*    A         B     */
347*724ba675SRob Herring					<0xffffffff 0xe05c6738>,  /* pioA */
348*724ba675SRob Herring					<0xffffffff 0x0000c780>,  /* pioB */
349*724ba675SRob Herring					<0xffffffff 0xe3ffff0e>,  /* pioC */
350*724ba675SRob Herring					<0x003fffff 0x0001ff3c>;  /* pioD */
351*724ba675SRob Herring
352*724ba675SRob Herring				/* shared pinctrl settings */
353*724ba675SRob Herring				adc0 {
354*724ba675SRob Herring					pinctrl_adc0_ts: adc0_ts-0 {
355*724ba675SRob Herring						atmel,pins =
356*724ba675SRob Herring							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
357*724ba675SRob Herring							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
358*724ba675SRob Herring							<AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
359*724ba675SRob Herring							<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
360*724ba675SRob Herring					};
361*724ba675SRob Herring
362*724ba675SRob Herring					pinctrl_adc0_ad0: adc0_ad0-0 {
363*724ba675SRob Herring						atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
364*724ba675SRob Herring					};
365*724ba675SRob Herring
366*724ba675SRob Herring					pinctrl_adc0_ad1: adc0_ad1-0 {
367*724ba675SRob Herring						atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
368*724ba675SRob Herring					};
369*724ba675SRob Herring
370*724ba675SRob Herring					pinctrl_adc0_ad2: adc0_ad2-0 {
371*724ba675SRob Herring						atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
372*724ba675SRob Herring					};
373*724ba675SRob Herring
374*724ba675SRob Herring					pinctrl_adc0_ad3: adc0_ad3-0 {
375*724ba675SRob Herring						atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
376*724ba675SRob Herring					};
377*724ba675SRob Herring
378*724ba675SRob Herring					pinctrl_adc0_ad4: adc0_ad4-0 {
379*724ba675SRob Herring						atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
380*724ba675SRob Herring					};
381*724ba675SRob Herring
382*724ba675SRob Herring					pinctrl_adc0_ad5: adc0_ad5-0 {
383*724ba675SRob Herring						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
384*724ba675SRob Herring					};
385*724ba675SRob Herring
386*724ba675SRob Herring					pinctrl_adc0_adtrg: adc0_adtrg-0 {
387*724ba675SRob Herring						atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
388*724ba675SRob Herring					};
389*724ba675SRob Herring				};
390*724ba675SRob Herring
391*724ba675SRob Herring				dbgu {
392*724ba675SRob Herring					pinctrl_dbgu: dbgu-0 {
393*724ba675SRob Herring						atmel,pins =
394*724ba675SRob Herring							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
395*724ba675SRob Herring							<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
396*724ba675SRob Herring					};
397*724ba675SRob Herring				};
398*724ba675SRob Herring
399*724ba675SRob Herring				ebi {
400*724ba675SRob Herring					pinctrl_ebi_addr_nand: ebi-addr-0 {
401*724ba675SRob Herring						atmel,pins =
402*724ba675SRob Herring							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
403*724ba675SRob Herring							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
404*724ba675SRob Herring					};
405*724ba675SRob Herring				};
406*724ba675SRob Herring
407*724ba675SRob Herring				fb {
408*724ba675SRob Herring					pinctrl_fb: fb-0 {
409*724ba675SRob Herring						atmel,pins =
410*724ba675SRob Herring							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
411*724ba675SRob Herring							<AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
412*724ba675SRob Herring							<AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
413*724ba675SRob Herring							<AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
414*724ba675SRob Herring							<AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
415*724ba675SRob Herring							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
416*724ba675SRob Herring							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
417*724ba675SRob Herring							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
418*724ba675SRob Herring							<AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
419*724ba675SRob Herring							<AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
420*724ba675SRob Herring							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
421*724ba675SRob Herring							<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
422*724ba675SRob Herring							<AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
423*724ba675SRob Herring							<AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
424*724ba675SRob Herring							<AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
425*724ba675SRob Herring							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
426*724ba675SRob Herring							<AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
427*724ba675SRob Herring							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
428*724ba675SRob Herring							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
429*724ba675SRob Herring							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
430*724ba675SRob Herring							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
431*724ba675SRob Herring					};
432*724ba675SRob Herring				};
433*724ba675SRob Herring
434*724ba675SRob Herring				i2c_gpio0 {
435*724ba675SRob Herring					pinctrl_i2c_gpio0: i2c_gpio0-0 {
436*724ba675SRob Herring						atmel,pins =
437*724ba675SRob Herring							<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
438*724ba675SRob Herring							<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
439*724ba675SRob Herring					};
440*724ba675SRob Herring				};
441*724ba675SRob Herring
442*724ba675SRob Herring				i2c_gpio1 {
443*724ba675SRob Herring					pinctrl_i2c_gpio1: i2c_gpio1-0 {
444*724ba675SRob Herring						atmel,pins =
445*724ba675SRob Herring							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
446*724ba675SRob Herring							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
447*724ba675SRob Herring					};
448*724ba675SRob Herring				};
449*724ba675SRob Herring
450*724ba675SRob Herring				mmc0 {
451*724ba675SRob Herring					pinctrl_mmc0_clk: mmc0_clk-0 {
452*724ba675SRob Herring						atmel,pins =
453*724ba675SRob Herring							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454*724ba675SRob Herring					};
455*724ba675SRob Herring
456*724ba675SRob Herring					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
457*724ba675SRob Herring						atmel,pins =
458*724ba675SRob Herring							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
459*724ba675SRob Herring							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
460*724ba675SRob Herring					};
461*724ba675SRob Herring
462*724ba675SRob Herring					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
463*724ba675SRob Herring						atmel,pins =
464*724ba675SRob Herring							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
465*724ba675SRob Herring							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
466*724ba675SRob Herring							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
467*724ba675SRob Herring					};
468*724ba675SRob Herring				};
469*724ba675SRob Herring
470*724ba675SRob Herring				nand {
471*724ba675SRob Herring					pinctrl_nand_rb: nand-rb-0 {
472*724ba675SRob Herring						atmel,pins =
473*724ba675SRob Herring							<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
474*724ba675SRob Herring					};
475*724ba675SRob Herring
476*724ba675SRob Herring					pinctrl_nand_cs: nand-cs-0 {
477*724ba675SRob Herring						atmel,pins =
478*724ba675SRob Herring							<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
479*724ba675SRob Herring					};
480*724ba675SRob Herring
481*724ba675SRob Herring					pinctrl_nand_oe_we: nand-oe-we-0 {
482*724ba675SRob Herring						atmel,pins =
483*724ba675SRob Herring							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
484*724ba675SRob Herring							<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
485*724ba675SRob Herring					};
486*724ba675SRob Herring				};
487*724ba675SRob Herring
488*724ba675SRob Herring				pwm0 {
489*724ba675SRob Herring					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
490*724ba675SRob Herring						atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491*724ba675SRob Herring					};
492*724ba675SRob Herring
493*724ba675SRob Herring					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
494*724ba675SRob Herring						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495*724ba675SRob Herring					};
496*724ba675SRob Herring
497*724ba675SRob Herring					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
498*724ba675SRob Herring						atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
499*724ba675SRob Herring					};
500*724ba675SRob Herring
501*724ba675SRob Herring					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
502*724ba675SRob Herring						atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503*724ba675SRob Herring					};
504*724ba675SRob Herring
505*724ba675SRob Herring					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
506*724ba675SRob Herring						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
507*724ba675SRob Herring					};
508*724ba675SRob Herring
509*724ba675SRob Herring					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
510*724ba675SRob Herring						atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
511*724ba675SRob Herring					};
512*724ba675SRob Herring
513*724ba675SRob Herring					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
514*724ba675SRob Herring						atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
515*724ba675SRob Herring					};
516*724ba675SRob Herring
517*724ba675SRob Herring					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
518*724ba675SRob Herring						atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
519*724ba675SRob Herring					};
520*724ba675SRob Herring
521*724ba675SRob Herring					pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
522*724ba675SRob Herring						atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
523*724ba675SRob Herring					};
524*724ba675SRob Herring
525*724ba675SRob Herring					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
526*724ba675SRob Herring						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
527*724ba675SRob Herring					};
528*724ba675SRob Herring
529*724ba675SRob Herring					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
530*724ba675SRob Herring						atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
531*724ba675SRob Herring					};
532*724ba675SRob Herring				};
533*724ba675SRob Herring
534*724ba675SRob Herring				spi0 {
535*724ba675SRob Herring					pinctrl_spi0: spi0-0 {
536*724ba675SRob Herring						atmel,pins =
537*724ba675SRob Herring							<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
538*724ba675SRob Herring							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
539*724ba675SRob Herring							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
540*724ba675SRob Herring					};
541*724ba675SRob Herring				};
542*724ba675SRob Herring
543*724ba675SRob Herring				ssc0 {
544*724ba675SRob Herring					pinctrl_ssc0_tx: ssc0_tx-0 {
545*724ba675SRob Herring						atmel,pins =
546*724ba675SRob Herring							<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547*724ba675SRob Herring							<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548*724ba675SRob Herring							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
549*724ba675SRob Herring					};
550*724ba675SRob Herring
551*724ba675SRob Herring					pinctrl_ssc0_rx: ssc0_rx-0 {
552*724ba675SRob Herring						atmel,pins =
553*724ba675SRob Herring							<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
554*724ba675SRob Herring							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
555*724ba675SRob Herring							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
556*724ba675SRob Herring					};
557*724ba675SRob Herring				};
558*724ba675SRob Herring
559*724ba675SRob Herring				ssc1 {
560*724ba675SRob Herring					pinctrl_ssc1_tx: ssc1_tx-0 {
561*724ba675SRob Herring						atmel,pins =
562*724ba675SRob Herring							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
563*724ba675SRob Herring							<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
564*724ba675SRob Herring							<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
565*724ba675SRob Herring					};
566*724ba675SRob Herring
567*724ba675SRob Herring					pinctrl_ssc1_rx: ssc1_rx-0 {
568*724ba675SRob Herring						atmel,pins =
569*724ba675SRob Herring							<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
570*724ba675SRob Herring							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
571*724ba675SRob Herring							<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
572*724ba675SRob Herring					};
573*724ba675SRob Herring				};
574*724ba675SRob Herring
575*724ba675SRob Herring				tcb0 {
576*724ba675SRob Herring					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
577*724ba675SRob Herring						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
578*724ba675SRob Herring					};
579*724ba675SRob Herring
580*724ba675SRob Herring					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
581*724ba675SRob Herring						atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
582*724ba675SRob Herring					};
583*724ba675SRob Herring
584*724ba675SRob Herring					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
585*724ba675SRob Herring						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
586*724ba675SRob Herring					};
587*724ba675SRob Herring
588*724ba675SRob Herring					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
589*724ba675SRob Herring						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
590*724ba675SRob Herring					};
591*724ba675SRob Herring
592*724ba675SRob Herring					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
593*724ba675SRob Herring						atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
594*724ba675SRob Herring					};
595*724ba675SRob Herring
596*724ba675SRob Herring					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
597*724ba675SRob Herring						atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
598*724ba675SRob Herring					};
599*724ba675SRob Herring
600*724ba675SRob Herring					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
601*724ba675SRob Herring						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
602*724ba675SRob Herring					};
603*724ba675SRob Herring
604*724ba675SRob Herring					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
605*724ba675SRob Herring						atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
606*724ba675SRob Herring					};
607*724ba675SRob Herring
608*724ba675SRob Herring					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
609*724ba675SRob Herring						atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
610*724ba675SRob Herring					};
611*724ba675SRob Herring				};
612*724ba675SRob Herring
613*724ba675SRob Herring				usart0 {
614*724ba675SRob Herring					pinctrl_usart0: usart0-0 {
615*724ba675SRob Herring						atmel,pins =
616*724ba675SRob Herring							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
617*724ba675SRob Herring							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
618*724ba675SRob Herring					};
619*724ba675SRob Herring
620*724ba675SRob Herring					pinctrl_usart0_rts: usart0_rts-0 {
621*724ba675SRob Herring						atmel,pins =
622*724ba675SRob Herring							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
623*724ba675SRob Herring					};
624*724ba675SRob Herring
625*724ba675SRob Herring					pinctrl_usart0_cts: usart0_cts-0 {
626*724ba675SRob Herring						atmel,pins =
627*724ba675SRob Herring							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
628*724ba675SRob Herring					};
629*724ba675SRob Herring
630*724ba675SRob Herring					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
631*724ba675SRob Herring						atmel,pins =
632*724ba675SRob Herring							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
633*724ba675SRob Herring							<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
634*724ba675SRob Herring					};
635*724ba675SRob Herring
636*724ba675SRob Herring					pinctrl_usart0_dcd: usart0_dcd-0 {
637*724ba675SRob Herring						atmel,pins =
638*724ba675SRob Herring							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
639*724ba675SRob Herring					};
640*724ba675SRob Herring
641*724ba675SRob Herring					pinctrl_usart0_ri: usart0_ri-0 {
642*724ba675SRob Herring						atmel,pins =
643*724ba675SRob Herring							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
644*724ba675SRob Herring					};
645*724ba675SRob Herring
646*724ba675SRob Herring					pinctrl_usart0_sck: usart0_sck-0 {
647*724ba675SRob Herring						atmel,pins =
648*724ba675SRob Herring							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
649*724ba675SRob Herring					};
650*724ba675SRob Herring				};
651*724ba675SRob Herring
652*724ba675SRob Herring				usart1 {
653*724ba675SRob Herring					pinctrl_usart1: usart1-0 {
654*724ba675SRob Herring						atmel,pins =
655*724ba675SRob Herring							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
656*724ba675SRob Herring							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
657*724ba675SRob Herring					};
658*724ba675SRob Herring
659*724ba675SRob Herring					pinctrl_usart1_rts: usart1_rts-0 {
660*724ba675SRob Herring						atmel,pins =
661*724ba675SRob Herring							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
662*724ba675SRob Herring					};
663*724ba675SRob Herring
664*724ba675SRob Herring					pinctrl_usart1_cts: usart1_cts-0 {
665*724ba675SRob Herring						atmel,pins =
666*724ba675SRob Herring							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
667*724ba675SRob Herring					};
668*724ba675SRob Herring
669*724ba675SRob Herring					pinctrl_usart1_sck: usart1_sck-0 {
670*724ba675SRob Herring						atmel,pins =
671*724ba675SRob Herring							<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
672*724ba675SRob Herring					};
673*724ba675SRob Herring				};
674*724ba675SRob Herring
675*724ba675SRob Herring				usart2 {
676*724ba675SRob Herring					pinctrl_usart2: usart2-0 {
677*724ba675SRob Herring						atmel,pins =
678*724ba675SRob Herring							<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
679*724ba675SRob Herring							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
680*724ba675SRob Herring					};
681*724ba675SRob Herring
682*724ba675SRob Herring					pinctrl_usart2_rts: usart2_rts-0 {
683*724ba675SRob Herring						atmel,pins =
684*724ba675SRob Herring							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
685*724ba675SRob Herring					};
686*724ba675SRob Herring
687*724ba675SRob Herring					pinctrl_usart2_cts: usart2_cts-0 {
688*724ba675SRob Herring						atmel,pins =
689*724ba675SRob Herring							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
690*724ba675SRob Herring					};
691*724ba675SRob Herring
692*724ba675SRob Herring					pinctrl_usart2_sck: usart2_sck-0 {
693*724ba675SRob Herring						atmel,pins =
694*724ba675SRob Herring							<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
695*724ba675SRob Herring					};
696*724ba675SRob Herring				};
697*724ba675SRob Herring
698*724ba675SRob Herring				usart3 {
699*724ba675SRob Herring					pinctrl_usart3: usart3-0 {
700*724ba675SRob Herring						atmel,pins =
701*724ba675SRob Herring							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
702*724ba675SRob Herring							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
703*724ba675SRob Herring					};
704*724ba675SRob Herring
705*724ba675SRob Herring					pinctrl_usart3_rts: usart3_rts-0 {
706*724ba675SRob Herring						atmel,pins =
707*724ba675SRob Herring							<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
708*724ba675SRob Herring					};
709*724ba675SRob Herring
710*724ba675SRob Herring					pinctrl_usart3_cts: usart3_cts-0 {
711*724ba675SRob Herring						atmel,pins =
712*724ba675SRob Herring							<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
713*724ba675SRob Herring					};
714*724ba675SRob Herring
715*724ba675SRob Herring					pinctrl_usart3_sck: usart3_sck-0 {
716*724ba675SRob Herring						atmel,pins =
717*724ba675SRob Herring							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
718*724ba675SRob Herring					};
719*724ba675SRob Herring				};
720*724ba675SRob Herring
721*724ba675SRob Herring				pioA: gpio@fffff400 {
722*724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
723*724ba675SRob Herring					reg = <0xfffff400 0x200>;
724*724ba675SRob Herring					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
725*724ba675SRob Herring					#gpio-cells = <2>;
726*724ba675SRob Herring					gpio-controller;
727*724ba675SRob Herring					interrupt-controller;
728*724ba675SRob Herring					#interrupt-cells = <2>;
729*724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
730*724ba675SRob Herring				};
731*724ba675SRob Herring
732*724ba675SRob Herring				pioB: gpio@fffff600 {
733*724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
734*724ba675SRob Herring					reg = <0xfffff600 0x200>;
735*724ba675SRob Herring					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
736*724ba675SRob Herring					#gpio-cells = <2>;
737*724ba675SRob Herring					gpio-controller;
738*724ba675SRob Herring					interrupt-controller;
739*724ba675SRob Herring					#interrupt-cells = <2>;
740*724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
741*724ba675SRob Herring				};
742*724ba675SRob Herring
743*724ba675SRob Herring				pioC: gpio@fffff800 {
744*724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
745*724ba675SRob Herring					reg = <0xfffff800 0x200>;
746*724ba675SRob Herring					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
747*724ba675SRob Herring					#gpio-cells = <2>;
748*724ba675SRob Herring					gpio-controller;
749*724ba675SRob Herring					interrupt-controller;
750*724ba675SRob Herring					#interrupt-cells = <2>;
751*724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
752*724ba675SRob Herring				};
753*724ba675SRob Herring
754*724ba675SRob Herring				pioD: gpio@fffffa00 {
755*724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
756*724ba675SRob Herring					reg = <0xfffffa00 0x200>;
757*724ba675SRob Herring					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
758*724ba675SRob Herring					#gpio-cells = <2>;
759*724ba675SRob Herring					gpio-controller;
760*724ba675SRob Herring					interrupt-controller;
761*724ba675SRob Herring					#interrupt-cells = <2>;
762*724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
763*724ba675SRob Herring				};
764*724ba675SRob Herring			};
765*724ba675SRob Herring
766*724ba675SRob Herring			pmc: clock-controller@fffffc00 {
767*724ba675SRob Herring				compatible = "atmel,at91sam9rl-pmc", "syscon";
768*724ba675SRob Herring				reg = <0xfffffc00 0x100>;
769*724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
770*724ba675SRob Herring				#clock-cells = <2>;
771*724ba675SRob Herring				clocks = <&clk32k>, <&main_xtal>;
772*724ba675SRob Herring				clock-names = "slow_clk", "main_xtal";
773*724ba675SRob Herring			};
774*724ba675SRob Herring
775*724ba675SRob Herring			reset-controller@fffffd00 {
776*724ba675SRob Herring				compatible = "atmel,at91sam9260-rstc";
777*724ba675SRob Herring				reg = <0xfffffd00 0x10>;
778*724ba675SRob Herring				clocks = <&clk32k>;
779*724ba675SRob Herring			};
780*724ba675SRob Herring
781a4bd03e7SArnd Bergmann			poweroff@fffffd10 {
782*724ba675SRob Herring				compatible = "atmel,at91sam9260-shdwc";
783*724ba675SRob Herring				reg = <0xfffffd10 0x10>;
784*724ba675SRob Herring				clocks = <&clk32k>;
785*724ba675SRob Herring			};
786*724ba675SRob Herring
787*724ba675SRob Herring			pit: timer@fffffd30 {
788*724ba675SRob Herring				compatible = "atmel,at91sam9260-pit";
789*724ba675SRob Herring				reg = <0xfffffd30 0xf>;
790*724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
791*724ba675SRob Herring				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
792*724ba675SRob Herring			};
793*724ba675SRob Herring
794*724ba675SRob Herring			watchdog@fffffd40 {
795*724ba675SRob Herring				compatible = "atmel,at91sam9260-wdt";
796*724ba675SRob Herring				reg = <0xfffffd40 0x10>;
797*724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
798*724ba675SRob Herring				clocks = <&clk32k>;
799*724ba675SRob Herring				status = "disabled";
800*724ba675SRob Herring			};
801*724ba675SRob Herring
802*724ba675SRob Herring			clk32k: clock-controller@fffffd50 {
803*724ba675SRob Herring				compatible = "atmel,at91sam9x5-sckc";
804*724ba675SRob Herring				reg = <0xfffffd50 0x4>;
805*724ba675SRob Herring				clocks = <&slow_xtal>;
806*724ba675SRob Herring				#clock-cells = <0>;
807*724ba675SRob Herring			};
808*724ba675SRob Herring
809*724ba675SRob Herring			rtc@fffffd20 {
810*724ba675SRob Herring				compatible = "atmel,at91sam9260-rtt";
811*724ba675SRob Herring				reg = <0xfffffd20 0x10>;
812*724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
813*724ba675SRob Herring				clocks = <&clk32k>;
814*724ba675SRob Herring				status = "disabled";
815*724ba675SRob Herring			};
816*724ba675SRob Herring
817*724ba675SRob Herring			gpbr: syscon@fffffd60 {
818*724ba675SRob Herring				compatible = "atmel,at91sam9260-gpbr", "syscon";
819*724ba675SRob Herring				reg = <0xfffffd60 0x10>;
820*724ba675SRob Herring				status = "disabled";
821*724ba675SRob Herring			};
822*724ba675SRob Herring
823*724ba675SRob Herring			rtc@fffffe00 {
824*724ba675SRob Herring				compatible = "atmel,at91rm9200-rtc";
825*724ba675SRob Herring				reg = <0xfffffe00 0x40>;
826*724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
827*724ba675SRob Herring				clocks = <&clk32k>;
828*724ba675SRob Herring				status = "disabled";
829*724ba675SRob Herring			};
830*724ba675SRob Herring
831*724ba675SRob Herring		};
832*724ba675SRob Herring	};
833*724ba675SRob Herring
834*724ba675SRob Herring	i2c-gpio-0 {
835*724ba675SRob Herring		compatible = "i2c-gpio";
836*724ba675SRob Herring		gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
837*724ba675SRob Herring			<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
838*724ba675SRob Herring		i2c-gpio,sda-open-drain;
839*724ba675SRob Herring		i2c-gpio,scl-open-drain;
840*724ba675SRob Herring		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
841*724ba675SRob Herring		#address-cells = <1>;
842*724ba675SRob Herring		#size-cells = <0>;
843*724ba675SRob Herring		pinctrl-names = "default";
844*724ba675SRob Herring		pinctrl-0 = <&pinctrl_i2c_gpio0>;
845*724ba675SRob Herring		status = "disabled";
846*724ba675SRob Herring	};
847*724ba675SRob Herring
848*724ba675SRob Herring	i2c-gpio-1 {
849*724ba675SRob Herring		compatible = "i2c-gpio";
850*724ba675SRob Herring		gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
851*724ba675SRob Herring			<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
852*724ba675SRob Herring		i2c-gpio,sda-open-drain;
853*724ba675SRob Herring		i2c-gpio,scl-open-drain;
854*724ba675SRob Herring		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
855*724ba675SRob Herring		#address-cells = <1>;
856*724ba675SRob Herring		#size-cells = <0>;
857*724ba675SRob Herring		pinctrl-names = "default";
858*724ba675SRob Herring		pinctrl-0 = <&pinctrl_i2c_gpio1>;
859*724ba675SRob Herring		status = "disabled";
860*724ba675SRob Herring	};
861*724ba675SRob Herring};
862