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/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dmediatek,mtk-timer.txt1 MediaTek Timers
4 MediaTek SoCs have different timers on different platforms,
14 * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
15 * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
16 * "mediatek,mt6582-timer" for MT6582 compatible timers (GPT)
17 * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
18 * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
19 * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)
20 * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT)
21 * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT)
[all …]
H A Dsamsung,exynos4210-mct.yaml14 global timer and CPU local timers. The global timer is a 64-bit free running
16 four preset counter values. The CPU local timers are 32-bit free running
55 samsung,local-timers:
60 List of indices of local timers usable from this processor.
76 For MCT block that uses a per-processor interrupt for local timers, such
78 interrupt might be specified, meaning that all local timers use the same
100 samsung,local-timers: false
156 // In this example, the IP contains two local timers, using separate
197 // In this example, the IP contains four local timers, but using
217 // In this example, the IP contains four local timers, but using
/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Dgp_timer_defs.h24 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(time… argument
25 …efine HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers… argument
26 …e HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
27 …HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq, timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
28 …IVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument
29 …e HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
/openbmc/linux/arch/powerpc/sysdev/
H A Dfsl_gtm.c3 * Freescale General-purpose Timers Module
72 struct gtm_timer timers[4]; member
95 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { in gtm_get_timer16()
96 if (!gtm->timers[i].requested) { in gtm_get_timer16()
97 gtm->timers[i].requested = true; in gtm_get_timer16()
99 return &gtm->timers[i]; in gtm_get_timer16()
132 if (gtm->timers[timer].requested) in gtm_get_specific_timer16()
135 ret = &gtm->timers[timer]; in gtm_get_specific_timer16()
169 int num = tmr - &gtm->timers[0]; in gtm_set_ref_timer16()
206 * Properly reset timers: stop, reset, set up prescalers, reference in gtm_set_ref_timer16()
[all …]
/openbmc/qemu/hw/misc/
H A Dmos6522.c256 MOS6522Timer *ti = &s->timers[0]; in mos6522_timer1()
266 MOS6522Timer *ti = &s->timers[1]; in mos6522_timer2()
303 if (now >= s->timers[0].next_irq_time) { in mos6522_read()
304 mos6522_timer1_update(s, &s->timers[0], now); in mos6522_read()
307 if (now >= s->timers[1].next_irq_time) { in mos6522_read()
308 mos6522_timer2_update(s, &s->timers[1], now); in mos6522_read()
340 val = get_counter(s, &s->timers[0]) & 0xff; in mos6522_read()
345 val = get_counter(s, &s->timers[0]) >> 8; in mos6522_read()
349 val = s->timers[0].latch & 0xff; in mos6522_read()
353 val = (s->timers[0].latch >> 8) & 0xff; in mos6522_read()
[all …]
/openbmc/linux/Documentation/timers/
H A Dhrtimers.rst2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
8 (kernel/timers.c), why do we need two timer subsystems? After a lot of
18 - the forced handling of low-resolution and high-resolution timers in
20 mess. The timers.c code is very "tightly coded" around jiffies and
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
34 degrading other portions of the timers.c code in an unacceptable way.
38 the required readjusting of absolute CLOCK_REALTIME timers at
41 timers.
[all …]
/openbmc/qemu/hw/timer/
H A Dgrlib_gptimer.c83 uint32_t nr_timers; /* Number of timers available */
87 GPTimer *timers; member
155 ptimer_transaction_begin(unit->timers[i].ptimer); in grlib_gptimer_set_scaler()
156 ptimer_set_freq(unit->timers[i].ptimer, value); in grlib_gptimer_set_scaler()
157 ptimer_transaction_commit(unit->timers[i].ptimer); in grlib_gptimer_set_scaler()
217 value = ptimer_get_count(unit->timers[id].ptimer); in grlib_gptimer_read()
222 value = unit->timers[id].reload; in grlib_gptimer_read()
227 trace_grlib_gptimer_readl(id, addr, unit->timers[id].config); in grlib_gptimer_read()
228 return unit->timers[id].config; in grlib_gptimer_read()
282 grlib_gptimer_tx_begin(&unit->timers[id]); in grlib_gptimer_write()
[all …]
H A Dxilinx_timer.c76 struct xlx_timer *timers; member
86 /* Timers get a 4x32bit control reg area each. */ in timer_from_addr()
96 csr = t->timers[i].regs[R_TCSR]; in timer_update_irq()
100 /* All timers within the same slave share a single IRQ line. */ in timer_update_irq()
114 xt = &t->timers[timer]; in timer_read()
115 /* Further decoding to address a specific timers reg. */ in timer_read()
165 xt = &t->timers[timer]; in timer_write()
168 /* Further decoding to address a specific timers reg. */ in timer_write()
220 t->timers = g_malloc0(sizeof t->timers[0] * num_timers(t)); in xilinx_timer_realize()
222 struct xlx_timer *xt = &t->timers[i]; in xilinx_timer_realize()
[all …]
/openbmc/linux/drivers/clocksource/
H A Dbcm_kona_timer.c32 static struct kona_bcm_timers timers; variable
37 * We use the peripheral timers for system tick, the cpu global timer for
100 * timer-interrupt->set_next_event. CPU local timers, when in kona_timer_set_next_event()
108 ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
113 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
116 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
118 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
125 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_shutdown()
148 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
171 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timer_init()
[all …]
H A Dtimer-probe.c21 unsigned timers = 0; in timer_probe() local
38 timers++; in timer_probe()
41 timers += acpi_probe_device_table(timer); in timer_probe()
43 if (!timers) in timer_probe()
44 pr_crit("%s: no matching timers found\n", __func__); in timer_probe()
/openbmc/linux/drivers/remoteproc/
H A Domap_remoteproc.c93 * @num_wd_timers: number of rproc watchdog timers
94 * @timers: timer(s) info used by rproc
111 struct omap_rproc_timer *timers; member
263 * timers associated with a rproc (like IPUs which have 2 watchdog timers,
277 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_watchdog_isr() local
283 if (timers[i].irq > 0 && irq == timers[i].irq) { in omap_rproc_watchdog_isr()
284 wd_timer = &timers[i]; in omap_rproc_watchdog_isr()
302 * omap_rproc_enable_timers() - enable the timers for a remoteproc
306 * This function is used primarily to enable the timers associated with
321 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_enable_timers() local
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml37 'timers', 'watchdog-timers' etc.
142 ti,timers:
148 as System/Tick timers for the OS running on the remote
152 to reserve specific timers to be dedicated to the
157 features. The timers to be used should match with the
158 timers used in the firmware image.
160 ti,watchdog-timers:
166 serve as Watchdog timers for the processor cores. This
170 The timers to be used should match with the watchdog
171 timers used in the firmware image.
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi78 timers2: timers@40000000 {
81 compatible = "st,stm32-timers";
100 timers3: timers@40000400 {
103 compatible = "st,stm32-timers";
122 timers4: timers@40000800 {
125 compatible = "st,stm32-timers";
144 timers5: timers@40000c00 {
147 compatible = "st,stm32-timers";
166 timers6: timers@40001000 {
169 compatible = "st,stm32-timers";
[all …]
H A Dstm32f429.dtsi96 timers2: timers@40000000 {
99 compatible = "st,stm32-timers";
118 timers3: timers@40000400 {
121 compatible = "st,stm32-timers";
140 timers4: timers@40000800 {
143 compatible = "st,stm32-timers";
162 timers5: timers@40000c00 {
165 compatible = "st,stm32-timers";
184 timers6: timers@40001000 {
187 compatible = "st,stm32-timers";
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7-ipu-dsp-common.dtsi25 ti,timers = <&timer3>;
26 ti,watchdog-timers = <&timer4>, <&timer9>;
31 ti,timers = <&timer11>;
32 ti,watchdog-timers = <&timer7>, <&timer8>;
37 ti,timers = <&timer5>;
38 ti,watchdog-timers = <&timer10>;
/openbmc/linux/Documentation/devicetree/bindings/mips/brcm/
H A Dsoc.txt145 == Timers
148 timers that can be used.
153 "brcm,bcm7425-timers"
154 "brcm,bcm7429-timers"
155 "brcm,bcm7435-timers" and
156 "brcm,brcmstb-timers"
157 - reg : the timers register range
162 timers: timer@4067c0 {
163 compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
/openbmc/u-boot/arch/arm/dts/
H A Dstm32f429.dtsi85 timers2: timers@40000000 {
88 compatible = "st,stm32-timers";
114 timers3: timers@40000400 {
117 compatible = "st,stm32-timers";
143 timers4: timers@40000800 {
146 compatible = "st,stm32-timers";
171 timers5: timers@40000c00 {
174 compatible = "st,stm32-timers";
200 timers6: timers@40001000 {
203 compatible = "st,stm32-timers";
[all …]
/openbmc/linux/drivers/misc/
H A Dcs5535-mfgpt.c3 * Driver for the CS5535/CS5536 Multi-Function General Purpose Timers (MFGPT)
24 MODULE_PARM_DESC(mfgptfix, "Try to reset the MFGPT timers during init; "
27 "2 = perform a soft reset by unconfiguring all timers); "
62 * XXX: According to the docs, we cannot reset timers above in cs5535_mfgpt_toggle_event()
155 /* only allocate timers from the working domain if requested */ in cs5535_mfgpt_alloc_timer()
173 /* set timer_nr to -1 if no timers available */ in cs5535_mfgpt_alloc_timer()
242 * This is a sledgehammer that resets all MFGPT timers. This is required by
245 * whether or not this secret MSR can be used to release individual timers.
253 /* The following undocumented bit resets the MFGPT timers */ in reset_all_timers()
259 * This is another sledgehammer to reset all MFGPT timers.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-samsung.yaml7 title: Samsung SoC PWM timers
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
45 - "timers" - PWM base clock used to generate PWM signals,
54 - const: timers
56 - const: timers
59 - const: timers
62 - const: timers
122 clock-names = "timers";
H A Dpwm-omap-dmtimer.txt1 * OMAP PWM for dual-mode timers
5 - ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer-dm.yaml for info
6 about these timers.
11 - ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
20 ti,timers = <&timer9>;
H A Dsnps,dw-apb-timers-pwm2.yaml5 $id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#
8 title: Synopsys DW-APB timers PWM controller
14 This describes the DesignWare APB timers module when used in the PWM
28 const: snps,dw-apb-timers-pwm2
63 compatible = "snps,dw-apb-timers-pwm2";
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-kernel/kernel-selftest/kernel-selftest/
H A D0001-selftests-timers-Fix-clock_adjtime-for-newer-32-bit-.patch4 Subject: [PATCH] selftests: timers: Fix clock_adjtime for newer 32-bit arches
16 tools/testing/selftests/timers/valid-adjtimex.c | 4 ++++
19 diff --git a/tools/testing/selftests/timers/valid-adjtimex.c b/tools/testing/selftests/timers/valid…
21 --- a/tools/testing/selftests/timers/valid-adjtimex.c
22 +++ b/tools/testing/selftests/timers/valid-adjtimex.c
/openbmc/phosphor-fan-presence/control/
H A Dactions.cpp24 auto& timers = it->second; in call_actions_based_on_timer() local
25 auto timerIter = zone.findTimer(group, actions, timers); in call_actions_based_on_timer()
26 if (timerIter == timers.end()) in call_actions_based_on_timer()
31 else if (timerIter != timers.end()) in call_actions_based_on_timer()
34 timers.erase(timerIter); in call_actions_based_on_timer()
35 if (timers.empty()) in call_actions_based_on_timer()
49 // Group not found, no timers set in call_actions_based_on_timer()
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-timers.yaml4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
7 title: STMicroelectronics STM32 Timers
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
24 const: st,stm32-timers
152 compatible = "st,stm32-timers";
/openbmc/linux/include/kvm/
H A Darm_arch_timer.h88 struct arch_timer_context timers[NR_KVM_TIMERS]; member
123 #define vcpu_get_timer(v,t) (&vcpu_timer(v)->timers[(t)])
124 #define vcpu_vtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_VTIMER])
125 #define vcpu_ptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_PTIMER])
126 #define vcpu_hvtimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HVTIMER])
127 #define vcpu_hptimer(v) (&(v)->arch.timer_cpu.timers[TIMER_HPTIMER])
129 #define arch_timer_ctx_index(ctx) ((ctx) - vcpu_timer((ctx)->vcpu)->timers)

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