10f03bf30SBen Dooks# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 20f03bf30SBen Dooks# Copyright (C) 2022 SiFive, Inc. 30f03bf30SBen Dooks%YAML 1.2 40f03bf30SBen Dooks--- 50f03bf30SBen Dooks$id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml# 60f03bf30SBen Dooks$schema: http://devicetree.org/meta-schemas/core.yaml# 70f03bf30SBen Dooks 80f03bf30SBen Dookstitle: Synopsys DW-APB timers PWM controller 90f03bf30SBen Dooks 100f03bf30SBen Dooksmaintainers: 110f03bf30SBen Dooks - Ben Dooks <ben.dooks@sifive.com> 120f03bf30SBen Dooks 130f03bf30SBen Dooksdescription: 140f03bf30SBen Dooks This describes the DesignWare APB timers module when used in the PWM 150f03bf30SBen Dooks mode. The IP core can be generated with various options which can 160f03bf30SBen Dooks control the functionality, the number of PWMs available and other 170f03bf30SBen Dooks internal controls the designer requires. 180f03bf30SBen Dooks 190f03bf30SBen Dooks The IP block has a version register so this can be used for detection 200f03bf30SBen Dooks instead of having to encode the IP version number in the device tree 21*47aab533SBjorn Helgaas compatible. 220f03bf30SBen Dooks 230f03bf30SBen DooksallOf: 240f03bf30SBen Dooks - $ref: pwm.yaml# 250f03bf30SBen Dooks 260f03bf30SBen Dooksproperties: 270f03bf30SBen Dooks compatible: 280f03bf30SBen Dooks const: snps,dw-apb-timers-pwm2 290f03bf30SBen Dooks 300f03bf30SBen Dooks reg: 310f03bf30SBen Dooks maxItems: 1 320f03bf30SBen Dooks 330f03bf30SBen Dooks "#pwm-cells": 340f03bf30SBen Dooks const: 3 350f03bf30SBen Dooks 360f03bf30SBen Dooks clocks: 370f03bf30SBen Dooks items: 380f03bf30SBen Dooks - description: Interface bus clock 390f03bf30SBen Dooks - description: PWM reference clock 400f03bf30SBen Dooks 410f03bf30SBen Dooks clock-names: 420f03bf30SBen Dooks items: 430f03bf30SBen Dooks - const: bus 440f03bf30SBen Dooks - const: timer 450f03bf30SBen Dooks 460f03bf30SBen Dooks snps,pwm-number: 470f03bf30SBen Dooks $ref: /schemas/types.yaml#/definitions/uint32 480f03bf30SBen Dooks description: The number of PWM channels configured for this instance 490f03bf30SBen Dooks enum: [1, 2, 3, 4, 5, 6, 7, 8] 500f03bf30SBen Dooks 510f03bf30SBen Dooksrequired: 520f03bf30SBen Dooks - compatible 530f03bf30SBen Dooks - reg 540f03bf30SBen Dooks - "#pwm-cells" 550f03bf30SBen Dooks - clocks 560f03bf30SBen Dooks - clock-names 570f03bf30SBen Dooks 580f03bf30SBen DooksadditionalProperties: false 590f03bf30SBen Dooks 600f03bf30SBen Dooksexamples: 610f03bf30SBen Dooks - | 620f03bf30SBen Dooks pwm: pwm@180000 { 630f03bf30SBen Dooks compatible = "snps,dw-apb-timers-pwm2"; 640f03bf30SBen Dooks reg = <0x180000 0x200>; 650f03bf30SBen Dooks #pwm-cells = <3>; 660f03bf30SBen Dooks clocks = <&bus>, <&timer>; 670f03bf30SBen Dooks clock-names = "bus", "timer"; 680f03bf30SBen Dooks }; 69