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Searched full:timer2 (Results 1 – 25 of 145) sorted by relevance

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/openbmc/linux/sound/isa/gus/
H A Dgus_timer.c100 struct snd_timer *timer = gus->gf1.timer2; in snd_gf1_interrupt_timer2()
138 gus->gf1.timer2 = NULL; in snd_gf1_timer2_free()
146 if (gus->gf1.timer1 != NULL || gus->gf1.timer2 != NULL) in snd_gf1_timers_init()
174 gus->gf1.timer2 = timer; in snd_gf1_timers_init()
184 if (gus->gf1.timer2) { in snd_gf1_timers_done()
185 snd_device_free(gus->card, gus->gf1.timer2); in snd_gf1_timers_done()
186 gus->gf1.timer2 = NULL; in snd_gf1_timers_done()
/openbmc/linux/drivers/clocksource/
H A Dtimer-zevio.c51 void __iomem *timer1, *timer2; member
132 timer->timer2 = timer->base + IO_TIMER2; in zevio_timer_add()
186 writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL); in zevio_timer_add()
187 writel(0, timer->timer2 + IO_CURRENT_VAL); in zevio_timer_add()
188 writel(0, timer->timer2 + IO_DIVIDER); in zevio_timer_add()
190 timer->timer2 + IO_CONTROL); in zevio_timer_add()
192 clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL, in zevio_timer_add()
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dinterrupts.c23 /* clearing TIMER2 mask, so enabling the related interrupt */ in dtimer_intr_setup()
25 /* set TIMER2 interrupt priority */ in dtimer_intr_setup()
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dcirrus,clps711x-timer.txt14 timer1 = &timer2;
24 timer2: timer@80000340 {
H A Dactions,owl-timer.txt10 "timer0", "timer1", "timer2", "timer3"
H A Dingenic,tcu.yaml179 - const: timer2
289 clock-names = "timer0", "timer1", "timer2", "timer3",
H A Darm,mps2-timer.txt23 timer2: mps2-timer@40001000 {
/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray.dtsi347 clock-names = "timer1", "timer2", "apb_pclk";
358 clock-names = "timer1", "timer2", "apb_pclk";
361 timer2: timer@50000 { label
368 clock-names = "timer1", "timer2", "apb_pclk";
379 clock-names = "timer1", "timer2", "apb_pclk";
390 clock-names = "timer1", "timer2", "apb_pclk";
401 clock-names = "timer1", "timer2", "apb_pclk";
412 clock-names = "timer1", "timer2", "apb_pclk";
423 clock-names = "timer1", "timer2", "apb_pclk";
/openbmc/linux/arch/m68k/coldfire/
H A Dtimers.c62 /* Timer2 is to be used as a high speed profile timer */ in init_timer_irq()
145 * By default use timer2 as the profiler clock timer.
160 /* Reset ColdFire timer2 */ in coldfire_profile_tick()
173 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n", in coldfire_profile_init()
/openbmc/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10_swvp.dts18 timer2 = &timer2;
/openbmc/u-boot/doc/device-tree-bindings/
H A Dchosen.txt36 tick-timer = "/timer2@f00";
39 timer2@f00 {
/openbmc/linux/drivers/clk/
H A Dclk-clps711x.c101 /* Timer2 in prescale mode. in clps711x_clk_init_dt()
123 clk_hw_register_divider_table(NULL, "timer2", "timer_ref", 0, in clps711x_clk_init_dt()
/openbmc/linux/arch/arm/boot/dts/cirrus/
H A Dep7209.dtsi24 timer1 = &timer2;
124 timer2: timer@80000340 { label
/openbmc/linux/include/dt-bindings/pinctrl/
H A Dk210-fpioa.h212 #define K210_PCF_TIMER2_TOGGLE1 198 /* TIMER2 Toggle Output 1 */
213 #define K210_PCF_TIMER2_TOGGLE2 199 /* TIMER2 Toggle Output 2 */
214 #define K210_PCF_TIMER2_TOGGLE3 200 /* TIMER2 Toggle Output 3 */
215 #define K210_PCF_TIMER2_TOGGLE4 201 /* TIMER2 Toggle Output 4 */
/openbmc/linux/drivers/net/wireless/ath/ath5k/
H A Dpcu.c650 u32 timer1, timer2, timer3; in ath5k_hw_init_beacon_timers() local
659 * timer and timer2 as next CFP duration start in ath5k_hw_init_beacon_timers()
664 timer2 = 0xffffffff; in ath5k_hw_init_beacon_timers()
667 timer2 = 0x0007ffff; in ath5k_hw_init_beacon_timers()
677 * beacon alert (DBA) timer and timer2 as next in ath5k_hw_init_beacon_timers()
680 timer2 = (next_beacon - AR5K_TUNE_SW_BEACON_RESP) << 3; in ath5k_hw_init_beacon_timers()
699 ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2); in ath5k_hw_init_beacon_timers()
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am43xx.c119 /* Select the Master osc clk as Timer2 clock source */ in enable_basic_clocks()
143 /* Select the Master osc clk as Timer2 clock source */ in rtc_only_enable_basic_clocks()
/openbmc/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi531 clock-names = "timer1", "timer2", "apb_pclk";
541 clock-names = "timer1", "timer2", "apb_pclk";
544 timer2: timer@66050000 { label
551 clock-names = "timer1", "timer2", "apb_pclk";
561 clock-names = "timer1", "timer2", "apb_pclk";
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_vt.dts52 timer2@ffd00000 {
/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dtimer.h9 * Timer1 uses bits 0:3, Timer2 uses bits 4:7 and so on,
/openbmc/linux/drivers/staging/rtl8712/
H A Drtl8712_gp_regdef.h19 #define TIMER2 (RTL8712_GP_ + 0x08) macro
/openbmc/u-boot/arch/arm/dts/
H A Dam335x-bonegreen.dts18 tick-timer = &timer2;
H A Domap5-u-boot.dtsi12 tick-timer = &timer2;
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-lpc18xx.c172 [FUNC_TIMER2] = "timer2",
306 LPC_P(6,1, GPIO, EMC, UART0, I2S0_RX_WS, R, TIMER2, R, R, 0, ND);
307 LPC_P(6,2, GPIO, EMC, UART0, I2S0_RX_SDA, R, TIMER2, R, R, 0, ND);
308 LPC_P(6,3, GPIO, USB0, SGPIO, EMC, R, TIMER2, R, R, 0, ND);
311 LPC_P(6,6, GPIO, EMC, SGPIO, USB0, R, TIMER2, R, R, 0, ND);
312 LPC_P(6,7, R, EMC, SGPIO, USB0, GPIO, TIMER2, R, R, 0, ND);
313 LPC_P(6,8, R, EMC, SGPIO, USB0, GPIO, TIMER2, R, R, 0, ND);
314 LPC_P(6,9, GPIO, R, R, EMC, R, TIMER2, R, R, 0, ND);
316 LPC_P(6,11, GPIO, R, R, EMC, R, TIMER2, R, R, 0, ND);
/openbmc/u-boot/include/configs/
H A Dti_am335x_common.h16 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_83xx.h111 u16 mdr2; /* Timer2 Mode Register */
113 u16 rfr2; /* Timer2 Reference Register */
115 u16 cpr2; /* Timer2 Capture Register */
117 u16 cnr2; /* Timer2 Counter Register */
127 u16 evr2; /* Timer2 Event Register */
131 u16 psr2; /* Timer2 Prescaler Register */

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