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/openbmc/u-boot/drivers/timer/
H A DKconfig1 menu "Timer Support"
3 config TIMER config
4 bool "Enable driver model for timer drivers"
7 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
9 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
16 Enable support for timer drivers in SPL. These can be used to get
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H A Drockchip_timer.c10 #include <asm/arch/timer.h>
12 #include <timer.h>
23 /* Driver private data. Contains timer id. Could be either 0 or 1. */
25 struct rk_timer *timer; member
28 static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer) in rockchip_timer_get_curr_value() argument
33 timebase_l = readl(&timer->timer_curr_value0); in rockchip_timer_get_curr_value()
34 timebase_h = readl(&timer->timer_curr_value1); in rockchip_timer_get_curr_value()
51 /* The timer is available */ in timer_get_boot_us()
52 rate = timer_get_rate(gd->timer); in timer_get_boot_us()
53 timer_get_count(gd->timer, &ticks); in timer_get_boot_us()
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/openbmc/sdeventplus/src/sdeventplus/utility/
H A Dtimer.hpp23 /** @class Timer<Id>
24 * @brief A simple, repeating timer around an sd_event time source
25 * @details Adds a timer to the SdEvent loop that runs a user defined callback
26 * at specified intervals. If no interval is provided to the timer,
28 * timer tracks whether or not it has expired since creation or since
35 class Timer class
38 /** @brief Type used to represent a time duration for the timer
44 * timer elapses.
46 using Callback = fu2::unique_function<void(Timer<Id>&)>;
48 /** @brief Creates a new timer on the given event loop.
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H A Dtimer.cpp3 #include <sdeventplus/utility/timer.hpp>
15 Timer<Id>::Timer(const Event& event, Callback&& callback, in Timer() function in sdeventplus::utility::Timer
36 Timer<Id>::Timer(const Timer<Id>& other, sdeventplus::internal::NoOwn) : in Timer() function in sdeventplus::utility::Timer
42 void Timer<Id>::set_callback(Callback&& callback) in set_callback()
48 const Event& Timer<Id>::get_event() const in get_event()
54 bool Timer<Id>::get_floating() const in get_floating()
60 void Timer<Id>::set_floating(bool b) in set_floating()
66 bool Timer<Id>::hasExpired() const in hasExpired()
72 bool Timer<Id>::isEnabled() const in isEnabled()
78 std::optional<typename Timer<Id>::Duration> Timer<Id>::getInterval() const in getInterval()
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/openbmc/sdbusplus/include/sdbusplus/
H A Dtimer.hpp12 /** @class Timer
15 class Timer class
18 /** @brief Only need the default Timer */
19 Timer() = delete;
20 Timer(const Timer&) = delete;
21 Timer& operator=(const Timer&) = delete;
22 Timer(Timer&&) = delete;
23 Timer& operator=(Timer&&) = delete;
25 /** @brief Constructs timer object
28 * @param[in] userCallBack - optional function callback for timer
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/openbmc/qemu/hw/sparc64/
H A Dsparc64.c31 #include "qemu/timer.h"
85 CPUTimer *timer = g_new0(CPUTimer, 1); in cpu_timer_create() local
87 timer->name = name; in cpu_timer_create()
88 timer->frequency = frequency; in cpu_timer_create()
89 timer->disabled_mask = disabled_mask; in cpu_timer_create()
90 timer->npt_mask = npt_mask; in cpu_timer_create()
92 timer->disabled = 1; in cpu_timer_create()
93 timer->npt = 1; in cpu_timer_create()
94 timer->clock_offset = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in cpu_timer_create()
96 timer->qtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cb, cpu); in cpu_timer_create()
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/openbmc/sdeventplus/test/utility/
H A Dtimer.cpp6 #include <sdeventplus/utility/timer.hpp>
32 using TestTimer = Timer<testClock>;
63 std::unique_ptr<TestTimer> timer; member in sdeventplus::utility::__anon9ead1e020111::TimerTest
98 if (timer) in resetTimer()
100 timer.reset(); in resetTimer()
111 EXPECT_TRUE(timer->hasExpired()); in expireTimer()
112 EXPECT_EQ(interval, timer->getInterval()); in expireTimer()
135 // dynamically, without changing it inside the timer in SetUp()
151 timer = std::make_unique<TestTimer>(*event, runCallback, interval); in SetUp()
152 EXPECT_EQ(expected_event, timer->get_event().get()); in SetUp()
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/openbmc/qemu/include/hw/timer/
H A Dnpcm7xx_timer.h2 * Nuvoton NPCM7xx Timer Controller
21 #include "qemu/timer.h"
23 /* Each Timer Module (TIM) instance holds five 25 MHz timers. */
32 /* The basic watchdog timer period is 2^14 clock cycles. */
40 * struct NPCM7xxBaseTimer - Basic functionality that both regular timer and
41 * watchdog timer use.
42 * @qtimer: QEMU timer that notifies us on expiration.
44 * @remaining_ns: Remaining time until expiration if timer is paused.
53 * struct NPCM7xxTimer - Individual timer state.
54 * @ctrl: The timer module that owns this timer.
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/openbmc/qemu/include/qemu/
H A Dtimer.h56 * QEMU Timer attributes:
58 * An individual timer may be given one or multiple attributes when initialized.
139 * Determines whether a clock's default timer list
143 * the timer list. The return value may be outdated by the time it is acted
146 * Returns: true if the clock's default timer list
155 * Determines whether a clock's default timer list
156 * has an expired timer.
158 * Returns: true if the clock's default timer list has
159 * an expired timer
182 * @attr_mask: mask for the timer attributes that are included
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/openbmc/qemu/net/
H A Dannounce.c20 int64_t qemu_announce_timer_step(AnnounceTimer *timer) in qemu_announce_timer_step() argument
24 step = timer->params.initial + in qemu_announce_timer_step()
25 (timer->params.rounds - timer->round - 1) * in qemu_announce_timer_step()
26 timer->params.step; in qemu_announce_timer_step()
28 if (step < 0 || step > timer->params.max) { in qemu_announce_timer_step()
29 step = timer->params.max; in qemu_announce_timer_step()
31 timer_mod(timer->tm, qemu_clock_get_ms(timer->type) + step); in qemu_announce_timer_step()
37 * If 'free_named' is true, then remove the timer from the list
38 * and free the timer itself.
40 void qemu_announce_timer_del(AnnounceTimer *timer, bool free_named) in qemu_announce_timer_del() argument
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/openbmc/u-boot/drivers/watchdog/
H A DKconfig1 menu "Watchdog Timer Support"
52 bool "Enable driver model for watchdog timer drivers"
55 Enable driver model for watchdog timer. At the moment the API
58 What exactly happens when the timer expires is up to a particular
62 bool "Enable Watchdog Timer support for Sandbox"
65 Enable Watchdog Timer support in Sandbox. This is a dummy device that
70 bool "Marvell Armada 37xx watchdog timer support"
73 Enable this to support Watchdog Timer on Marvell Armada 37xx SoC.
79 bool "Aspeed ast2400/ast2500 watchdog timer support"
83 Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices.
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/openbmc/sdbusplus/test/
H A Dtimer.cpp1 #include <sdbusplus/timer.hpp>
8 using sdbusplus::Timer;
22 // Add a Timer Object
23 Timer timer; member in TimerTest
26 TimerTest() : rc(sd_event_default(&events)), timer(events) in TimerTest()
29 // event handler and timer object. in TimerTest()
52 // Add a Timer Object
53 std::unique_ptr<Timer> timer = nullptr; member in TimerTestCallBack
68 // event handler and timer object. in TimerTestCallBack()
73 timer = std::make_unique<Timer>(events, func); in TimerTestCallBack()
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/openbmc/phosphor-fan-presence/control/json/actions/
H A Dtimer_based_actions.hpp36 * @class TimerBasedActions - Action that wraps a list of actions with a timer
38 * Sets up a list of actions to be invoked when the defined timer expires.
39 * Once for a `oneshot` timer or at each expiration of a `repeating` timer.
57 * @brief Call actions when timer expires
67 * Starts or stops a timer that runs a list of actions whenever the
68 * timer expires. The configured timer is set to callback the list of
72 * the groups' service owned state is used to start/stop the timer. When any
73 * service providing a group member is not owned, the timer is started and
74 * if all members' services are owned, the timer is stopped.
77 * compared against all members within each group to start/stop the timer.
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/openbmc/qemu/target/arm/
H A Dtrace-events4 arm_gt_recalc(int timer, uint64_t nexttick) "gt recalc: timer %d next tick 0x%" PRIx64
5 arm_gt_recalc_disabled(int timer) "gt recalc: timer %d timer disabled"
6 arm_gt_cval_write(int timer, uint64_t value) "gt_cval_write: timer %d value 0x%" PRIx64
7 arm_gt_tval_write(int timer, uint64_t value) "gt_tval_write: timer %d value 0x%" PRIx64
8 arm_gt_ctl_write(int timer, uint64_t value) "gt_ctl_write: timer %d value 0x%" PRIx64
9 arm_gt_imask_toggle(int timer) "gt_ctl_write: timer %d IMASK toggle"
12 arm_gt_update_irq(int timer, int irqstate) "gt_update_irq: timer %d irqstate %d"
/openbmc/u-boot/include/
H A Dtimer.h10 * dm_timer_init - initialize a timer for time keeping. On success
11 * initializes gd->timer so that lib/timer can use it for future
27 * Get the current timer count
29 * @dev: The timer device
30 * @count: pointer that returns the current timer count
36 * Get the timer input clock frequency
38 * @dev: The timer device
39 * @return: the timer input clock frequency
44 * struct timer_ops - Driver model timer operations
46 * The uclass interface is implemented by all timer devices which use
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/openbmc/qemu/hw/timer/
H A Dcmsdk-apb-timer.c2 * ARM CMSDK APB timer emulation
12 /* This is a model of the "APB timer" which is part of the Cortex-M
18 * by the guest to act either as a 'timer enable' (timer does not run
19 * when EXTIN is low), or as a 'timer clock' (timer runs at frequency
39 #include "hw/timer/cmsdk-apb-timer.h"
86 r = ptimer_get_count(s->timer); in cmsdk_apb_timer_read()
89 r = ptimer_get_limit(s->timer); in cmsdk_apb_timer_read()
99 "CMSDK APB timer read: bad offset %x\n", (int) offset); in cmsdk_apb_timer_read()
121 "CMSDK APB timer: EXTIN input not supported\n"); in cmsdk_apb_timer_write()
124 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_write()
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H A Darm_mptimer.c2 * Private peripheral timer/watchdog blocks for ARM 11MPCore and A9MP
27 #include "hw/timer/arm_mptimer.h"
40 /* This device implements the per-cpu private timer and watchdog block
61 /* Return conversion factor from mpcore timer ticks to qemu timer ticks. */
68 static inline void timerblock_set_count(struct ptimer_state *timer, in timerblock_set_count() argument
71 /* PTimer would trigger interrupt for periodic timer when counter set in timerblock_set_count()
75 *count = ptimer_get_limit(timer); in timerblock_set_count()
77 ptimer_set_count(timer, *count); in timerblock_set_count()
81 static inline void timerblock_run(struct ptimer_state *timer, in timerblock_run() argument
85 ptimer_run(timer, !(control & 2)); in timerblock_run()
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H A Dexynos4210_pwm.c2 * Samsung exynos4210 Pulse Width Modulation Timer
27 #include "qemu/timer.h"
88 /* timer struct */
90 uint32_t id; /* timer id */
91 qemu_irq irq; /* local timer irq */
92 uint32_t freq; /* timer frequency */
94 /* use ptimer.c to represent count down timer */
95 ptimer_state *ptimer; /* timer */
117 Exynos4210PWM timer[EXYNOS4210_PWM_TIMERS_NUM]; member
144 VMSTATE_STRUCT_ARRAY(timer, Exynos4210PWMState,
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H A Dgrlib_gptimer.c28 #include "hw/timer/grlib_gptimer.h"
30 #include "qemu/timer.h"
95 static void grlib_gptimer_tx_begin(GPTimer *timer) in grlib_gptimer_tx_begin() argument
97 ptimer_transaction_begin(timer->ptimer); in grlib_gptimer_tx_begin()
100 static void grlib_gptimer_tx_commit(GPTimer *timer) in grlib_gptimer_tx_commit() argument
102 ptimer_transaction_commit(timer->ptimer); in grlib_gptimer_tx_commit()
106 static void grlib_gptimer_enable(GPTimer *timer) in grlib_gptimer_enable() argument
108 assert(timer != NULL); in grlib_gptimer_enable()
111 ptimer_stop(timer->ptimer); in grlib_gptimer_enable()
113 if (!(timer->config & GPTIMER_ENABLE)) { in grlib_gptimer_enable()
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H A Dtrace-events9 slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer se…
10 slavio_timer_mem_writel_counter_invalid(void) "not user timer"
11 slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
12 slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
13 …er_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
14 …mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
15 slavio_timer_mem_writel_mode_invalid(void) "not system timer"
19 grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
20 grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
21 grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
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H A Dslavio_timer.c2 * QEMU Sparc SLAVIO timer controller emulation
26 #include "qemu/timer.h"
37 * Registers of hardware timer in sun4m.
39 * This is the timer/counter part of chip STP2001 (Slave I/O), also
46 * Per-CPU timers interrupt local CPU, system timer uses normal
55 ptimer_state *timer; member
116 count = limit - PERIODS_TO_LIMIT(ptimer_get_count(t->timer)); in slavio_timer_get_out()
123 // timer callback
136 /* there is no interrupt if user timer or free-run */ in slavio_timer_irq()
157 // read user timer MSW in slavio_timer_mem_readl()
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H A Darm_timer.c2 * ARM PrimeCell Timer modules.
13 #include "qemu/timer.h"
21 /* Common timer implementation. */
33 ptimer_state *timer; member
41 /* Check all active timers, and schedule the next timer interrupt. */
62 return ptimer_get_count(s->timer); in arm_timer_read()
79 * Reset the timer limit after settings have changed.
96 ptimer_set_limit(s->timer, limit, reload); in arm_timer_recalibrate()
108 ptimer_transaction_begin(s->timer); in arm_timer_write()
110 ptimer_transaction_commit(s->timer); in arm_timer_write()
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H A Dhpet.c2 * High Precision Event Timer emulation
31 #include "qemu/timer.h"
33 #include "hw/timer/hpet.h"
38 #include "hw/timer/i8254.h"
51 uint8_t tn; /*timer number*/
54 /* Memory-mapped, software visible timer registers */
61 uint8_t wrap_flag; /* timer pop will indicate wrap for one-shot 32-bit
62 * mode. Next pop will be actual timer expiration.
64 uint64_t last; /* last value armed, to avoid timer storms */
82 HPETTimer timer[HPET_MAX_TIMERS]; member
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H A Dsh_timer.c2 * SuperH Timer modules.
16 #include "hw/timer/tmu012.h"
37 ptimer_state *timer; member
50 /* Check all active timers, and schedule the next timer interrupt. */
71 return ptimer_get_count(s->timer); in sh_timer_read()
92 ptimer_transaction_begin(s->timer); in sh_timer_write()
93 ptimer_set_limit(s->timer, s->tcor, 0); in sh_timer_write()
94 ptimer_transaction_commit(s->timer); in sh_timer_write()
98 ptimer_transaction_begin(s->timer); in sh_timer_write()
99 ptimer_set_count(s->timer, s->tcnt); in sh_timer_write()
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/openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dtimer.c3 * Cirrus Logic EP93xx timer support.
30 } timer; variable
45 if (now >= timer.last_read) in read_timer()
46 timer.ticks += now - timer.last_read; in read_timer()
49 timer.ticks += TIMER_MAX_VAL - timer.last_read + now; in read_timer()
51 timer.last_read = now; in read_timer()
63 sys_ticks = timer.ticks * CONFIG_SYS_HZ; in get_ticks()
80 target = timer.ticks + usecs_to_ticks(usec); in __udelay()
82 while (timer.ticks < target) in __udelay()
90 /* use timer 3 with 508KHz and free running, not enabled now */ in timer_init()
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