Lines Matching full:timer

2  * Nuvoton NPCM7xx Timer Controller
21 #include "qemu/timer.h"
23 /* Each Timer Module (TIM) instance holds five 25 MHz timers. */
32 /* The basic watchdog timer period is 2^14 clock cycles. */
40  * struct NPCM7xxBaseTimer - Basic functionality that both regular timer and
41  * watchdog timer use.
42  * @qtimer: QEMU timer that notifies us on expiration.
44  * @remaining_ns: Remaining time until expiration if timer is paused.
53  * struct NPCM7xxTimer - Individual timer state.
54  * @ctrl: The timer module that owns this timer.
56  * @base_timer: The basic timer functionality for this timer.
57  * @tcsr: The Timer Control and Status Register.
58  * @ticr: The Timer Initial Count Register.
71  * struct NPCM7xxWatchdogTimer - The watchdog timer state.
72  * @ctrl: The timer module that owns this timer.
75  * @base_timer: The basic timer functionality for this timer.
76  * @wtcr: The Watchdog Timer Control Register.
89  * struct NPCM7xxTimerCtrlState - Timer Module device state.
92  * @index: The index of this timer module.
93  * @tisr: The Timer Interrupt Status Register.
94  * @timer: The five individual timers managed by this module.
95  * @watchdog_timer: The watchdog timer managed by this module.
105     NPCM7xxTimer timer[NPCM7XX_TIMERS_PER_CTRL];  member
109 #define TYPE_NPCM7XX_TIMER "npcm7xx-timer"