/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | nvidia,tegra194-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra194 (and later) PCIe Endpoint controller (Synopsys DesignWare Core based) 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 15 This PCIe controller is based on the Synopsys DesignWare PCIe IP and thus 16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some [all …]
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H A D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra194 (and later) PCIe controller (Synopsys DesignWare Core based) 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 15 This PCIe controller is based on the Synopsys DesignWare PCIe IP and thus 16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of [all …]
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H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys DesignWare PCIe interface 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 14 Synopsys DesignWare PCIe host controller 16 # Please create a separate DT-schema for your DWC PCIe Root Port controller 17 # and make sure it's assigned with the vendor-specific compatible string. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | phy-tegra194-p2u.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra194 & Tegra234 P2U 10 - Thierry Reding <treding@nvidia.com> 15 Tegra234 has three PHY bricks namely HSIO, NVHS and GBE (Gigabit Ethernet) 17 A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE 19 PCIe lane. 24 - nvidia,tegra194-p2u [all …]
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H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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/openbmc/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/tegra234-clock.h> 4 #include <dt-bindings/gpio/tegra234-gpio.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/mailbox/tegra186-hsp.h> 7 #include <dt-bindings/memory/tegra234-mc.h> 8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 9 #include <dt-bindings/power/tegra234-powergate.h> 10 #include <dt-bindings/reset/tegra234-reset.h> 11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> [all …]
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H A D | tegra234-p3701-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra234.dtsi" 4 #include "tegra234-p3701.dtsi" 8 compatible = "nvidia,p3701-0000", "nvidia,tegra234"; 19 vcc-supply = <&vdd_1v8_hs>; 20 address-width = <8>; 23 read-only; 31 compatible = "jedec,spi-nor"; 33 spi-max-frequency = <102000000>; 34 spi-tx-bus-width = <4>; [all …]
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H A D | tegra234-p3740-0002+p3701-0008.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include "tegra234-p3701-0008.dtsi" 7 #include "tegra234-p3740-0002.dtsi" 11 compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234"; 19 stdout-path = "serial0:115200n8"; 24 compatible = "nvidia,tegra194-hsuart"; 25 reset-names = "serial"; [all …]
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H A D | tegra234-p3768-0000+p3767-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 7 #include "tegra234-p3767-0000.dtsi" 8 #include "tegra234-p3768-0000.dtsi" 11 compatible = "nvidia,p3768-0000+p3767-0000", "nvidia,p3767-0000", "nvidia,tegra234"; 21 stdout-path = "serial0:115200n8"; 26 compatible = "nvidia,tegra194-hsuart"; 27 reset-names = "serial"; [all …]
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H A D | tegra234-p3737-0000+p3701-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 7 #include "tegra234-p3701-0000.dtsi" 8 #include "tegra234-p3737-0000.dtsi" 12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234"; 22 stdout-path = "serial0:115200n8"; 27 compatible = "nvidia,tegra194-hsuart"; 28 reset-names = "serial"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/ |
H A D | nvidia,tegra234-cbb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sumit Gupta <sumitg@nvidia.com> 15 of multiple sub-blocks connected to each other to create a topology. 16 The Tegra234 SoC has different fabrics based on CBB 2.0 architecture 37 for compatibility with PCIE. 41 pattern: "^[a-z]+-fabric@[0-9a-f]+$" 45 - nvidia,tegra234-aon-fabric [all …]
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | nvidia,tegra-xudc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Nagarjuna Kristam <nkristam@nvidia.com> 15 - JC Kuo <jckuo@nvidia.com> 16 - Thierry Reding <treding@nvidia.com> 21 - enum: 22 - nvidia,tegra210-xudc # For Tegra210 23 - nvidia,tegra186-xudc # For Tegra186 [all …]
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/openbmc/linux/drivers/soc/tegra/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 # 32-bit ARM SoCs 63 # 64-bit ARM SoCs 75 Tegra124's "4+1" Cortex-A15 CPU complex. 85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 88 and providing 256 CUDA cores. It supports hardware-accelerated en- 93 controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to 106 combination of Denver and Cortex-A57 CPU cores and a GPU based on 107 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU 109 multi-format support, ISP for image capture processing and BPMP for [all …]
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H A D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 37 #include <linux/pinctrl/pinconf-generic.h> 56 #include <dt-bindings/interrupt-controller/arm-gic.h> 57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 58 #include <dt-bindings/gpio/tegra186-gpio.h> [all …]
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/openbmc/linux/drivers/pci/controller/dwc/ |
H A D | pcie-tegra194.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * PCIe host controller driver for the following SoCs 5 * Tegra234 7 * Copyright (C) 2019-2022 NVIDIA Corporation. 35 #include "pcie-designware.h" 37 #include <soc/tegra/bpmp-abi.h> 300 static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value, in appl_writel() argument 303 writel_relaxed(value, pcie->appl_base + reg); in appl_writel() 306 static inline u32 appl_readl(struct tegra_pcie_dw *pcie, const u32 reg) in appl_readl() argument 308 return readl_relaxed(pcie->appl_base + reg); in appl_readl() [all …]
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/openbmc/linux/drivers/phy/tegra/ |
H A D | xusb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. 31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate() 32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate() 34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate() 35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate() 38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate() 39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate() 45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate() 53 .compatible = "nvidia,tegra124-xusb-padctl", [all …]
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/openbmc/linux/ |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |