History log of /openbmc/linux/drivers/soc/tegra/Kconfig (Results 1 – 25 of 51)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33
# 6d8257ca 05-Jun-2023 Prathamesh Shete <pshete@nvidia.com>

pinctrl: tegra: Add Tegra234 pinmux driver

This change adds support for the two pin controllers found on Tegra234.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Thierry Reding

pinctrl: tegra: Add Tegra234 pinmux driver

This change adds support for the two pin controllers found on Tegra234.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230605154230.2910847-3-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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Revision tags: v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14
# ba4b4d02 15-Dec-2022 Arnd Bergmann <arnd@arndb.de>

soc: tegra: fix CPU_BIG_ENDIAN dependencies

My previous patch to prevent BPMP from being enabled on big
endian kernels caused a build regression:

WARNING: unmet direct dependencies detected for TEG

soc: tegra: fix CPU_BIG_ENDIAN dependencies

My previous patch to prevent BPMP from being enabled on big
endian kernels caused a build regression:

WARNING: unmet direct dependencies detected for TEGRA_BPMP
Depends on [n]: ARCH_TEGRA [=y] && TEGRA_HSP_MBOX [=y] && TEGRA_IVC [=y] && !CPU_BIG_ENDIAN [=y]
Selected by [y]:
- ARCH_TEGRA_186_SOC [=y] && ARCH_TEGRA [=y] && ARM64 [=y]
- ARCH_TEGRA_194_SOC [=y] && ARCH_TEGRA [=y] && ARM64 [=y]
- ARCH_TEGRA_234_SOC [=y] && ARCH_TEGRA [=y] && ARM64 [=y]

Add even more such dependencies for the SoC types that use
the BPMP driver.

Fixes: 4ddb1bf1a837 ("tegra: mark BPMP driver as little-endian only")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20221215165336.1781080-1-arnd@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Revision tags: v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0
# 28dbe823 02-Oct-2022 Petlozu Pravareshwar <petlozup@nvidia.com>

soc/tegra: pmc: Select IRQ_DOMAIN_HIERARCHY

Tegra PMC driver depends on IRQ domain hierarchy support, hence select
the IRQ_DOMAIN_HIERARCHY config for SOC_TEGRA_PMC.

Signed-off-by: Petlozu Pravares

soc/tegra: pmc: Select IRQ_DOMAIN_HIERARCHY

Tegra PMC driver depends on IRQ domain hierarchy support, hence select
the IRQ_DOMAIN_HIERARCHY config for SOC_TEGRA_PMC.

Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11
# 22541828 22-Sep-2020 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: fuse: Drop Kconfig dependency on TEGRA20_APB_DMA

The DMA subsystem could be entirely disabled in Kconfig and then the
TEGRA20_APB_DMA option isn't available too. Hence kernel configuratio

soc/tegra: fuse: Drop Kconfig dependency on TEGRA20_APB_DMA

The DMA subsystem could be entirely disabled in Kconfig and then the
TEGRA20_APB_DMA option isn't available too. Hence kernel configuration
fails if DMADEVICES Kconfig option is disabled due to the unsatisfiable
dependency.

The FUSE driver isn't a critical driver and currently it only provides
NVMEM interface to userspace which isn't known to be widely used, and
thus, it's fine if FUSE driver fails to load.

Let's remove the erroneous Kconfig dependency and let the FUSE driver to
fail the probing if DMA is unavailable.

Fixes: 19d41e5e9c68 ("soc/tegra: fuse: Add APB DMA dependency for Tegra20")
Reported-by: Necip Fazil Yildiran <fazilyildiran@gmail.com>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209301
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

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# fc2f151d 11-May-2022 Sumit Gupta <sumitg@nvidia.com>

soc/tegra: cbb: Add driver for Tegra234 CBB 2.0

Adding driver to handle errors from CBB version 2.0 which is used in
Tegra234 SoC. The driver prints debug information about failed
transaction on rec

soc/tegra: cbb: Add driver for Tegra234 CBB 2.0

Adding driver to handle errors from CBB version 2.0 which is used in
Tegra234 SoC. The driver prints debug information about failed
transaction on receiving interrupt from the error notifier. The error
notifier collates the interrupts from various error monitor blocks and
presents a single interrupt to the SoC interrupt controller.

For timeout errors, the driver also does the lookup to find timed out
clients and prints their client ID. Drivers for hardware that needs to
be reset on timeout will have to call BPMP from the client IP's driver.
BPMP firmware will also clear the timeout bit after resetting the IP
so that next transactions are send to them after reset.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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# b7134422 11-May-2022 Sumit Gupta <sumitg@nvidia.com>

soc/tegra: cbb: Add CBB 1.0 driver for Tegra194

Adding driver to handle errors from Control Backbone (CBB) which are
generated due to illegal accesses. CBB 1.0 is used in Tegra194 SoCs.
When an erro

soc/tegra: cbb: Add CBB 1.0 driver for Tegra194

Adding driver to handle errors from Control Backbone (CBB) which are
generated due to illegal accesses. CBB 1.0 is used in Tegra194 SoCs.
When an error is reported from a NOC within CBB, the driver prints debug
information about failed transaction like Error Code, Error Description,
Master, Address, AXI ID, Cache, Protection, Security Group etc. It then
causes system crash using BUG_ON() or call WARN() based on whether the
error type is fatal or not.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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# 9767d1be 04-May-2022 Thierry Reding <treding@nvidia.com>

soc/tegra: pmc: Select REGMAP

Commit 9d5e7c3e36eb ("soc/tegra: pmc: Provide USB sleepwalk register
map") introduced a dependency on the regmap infrastructure, so select
the corresponding Kconfig ent

soc/tegra: pmc: Select REGMAP

Commit 9d5e7c3e36eb ("soc/tegra: pmc: Provide USB sleepwalk register
map") introduced a dependency on the regmap infrastructure, so select
the corresponding Kconfig entry. This avoids failures in random builds
that may otherwise end up having SOC_TEGRA_PMC enabled but not REGMAP.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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# 7247a1d7 22-Sep-2020 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: fuse: Drop Kconfig dependency on TEGRA20_APB_DMA

[ Upstream commit 2254182807fc09ba9dec9a42ef239e373796f1b2 ]

The DMA subsystem could be entirely disabled in Kconfig and then the
TEGRA20

soc/tegra: fuse: Drop Kconfig dependency on TEGRA20_APB_DMA

[ Upstream commit 2254182807fc09ba9dec9a42ef239e373796f1b2 ]

The DMA subsystem could be entirely disabled in Kconfig and then the
TEGRA20_APB_DMA option isn't available too. Hence kernel configuration
fails if DMADEVICES Kconfig option is disabled due to the unsatisfiable
dependency.

The FUSE driver isn't a critical driver and currently it only provides
NVMEM interface to userspace which isn't known to be widely used, and
thus, it's fine if FUSE driver fails to load.

Let's remove the erroneous Kconfig dependency and let the FUSE driver to
fail the probing if DMA is unavailable.

Fixes: 19d41e5e9c68 ("soc/tegra: fuse: Add APB DMA dependency for Tegra20")
Reported-by: Necip Fazil Yildiran <fazilyildiran@gmail.com>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209301
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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# a4282f66 21-Jul-2021 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: Make regulator couplers depend on CONFIG_REGULATOR

The regulator coupler drivers now use regulator-driver API function that
isn't available during compile-testing. Make regulator coupler

soc/tegra: Make regulator couplers depend on CONFIG_REGULATOR

The regulator coupler drivers now use regulator-driver API function that
isn't available during compile-testing. Make regulator coupler drivers
dependent on CONFIG_REGULATOR in Kconfig.

Fixes: 03978d42ed0d ("soc/tegra: regulators: Bump voltages on system reboot")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# f880ee9e 31-May-2021 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: pmc: Add core power domain

NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
to an external SoC power rail. Core power domain covers vast majority of
hardware blocks

soc/tegra: pmc: Add core power domain

NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
to an external SoC power rail. Core power domain covers vast majority of
hardware blocks within a Tegra SoC. The voltage of a power domain should
be set to a level which satisfies all devices within the power domain.
Add support for the core power domain which controls voltage state of the
domain. This allows us to support system-wide DVFS on Tegra20-210 SoCs.
The PMC powergate domains now are sub-domains of the core domain, this
requires device-tree updating, older DTBs are unaffected and will continue
to work as before.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash lockdep class removal patch]
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v5.8.10
# 63944891 17-Sep-2020 Thierry Reding <treding@nvidia.com>

arm64: tegra: Initial Tegra234 VDK support

The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and ser

arm64: tegra: Initial Tegra234 VDK support

The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27
# 5098e2b9 18-Mar-2020 Corentin Labbe <clabbe@baylibre.com>

soc/tegra: pmc: Select GENERIC_PINCONF

I have hit the following build error:
armv7a-hardfloat-linux-gnueabi-ld: drivers/soc/tegra/pmc.o: in function `pinconf_generic_dt_node_to_map_pin':
pmc.c:(.tex

soc/tegra: pmc: Select GENERIC_PINCONF

I have hit the following build error:
armv7a-hardfloat-linux-gnueabi-ld: drivers/soc/tegra/pmc.o: in function `pinconf_generic_dt_node_to_map_pin':
pmc.c:(.text+0x500): undefined reference to `pinconf_generic_dt_node_to_map'
armv7a-hardfloat-linux-gnueabi-ld: drivers/soc/tegra/pmc.o:(.rodata+0x1f88): undefined reference to `pinconf_generic_dt_free_map'

So SOC_TEGRA_PMC should select GENERIC_PINCONF.

Fixes: 4a37f11c8f57 ("soc/tegra: pmc: Implement pad configuration via pinctrl")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7
# 19d41e5e 29-Dec-2019 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: fuse: Add APB DMA dependency for Tegra20

Tegra20 FUSE driver depends on DMA channel presence, otherwise it fails to
probe.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by

soc/tegra: fuse: Add APB DMA dependency for Tegra20

Tegra20 FUSE driver depends on DMA channel presence, otherwise it fails to
probe.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

show more ...


Revision tags: v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3
# 78380743 25-Jul-2019 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: regulators: Add regulators coupler for Tegra30

Add regulators coupler for Tegra30 SoCs that performs voltage balancing
of a coupled regulators and thus provides voltage scaling functional

soc/tegra: regulators: Add regulators coupler for Tegra30

Add regulators coupler for Tegra30 SoCs that performs voltage balancing
of a coupled regulators and thus provides voltage scaling functionality.

There are 2 coupled regulators on all Tegra30 SoCs: CORE and CPU. The
coupled regulator voltages shall be in a range of 300mV from each other
and CORE voltage shall be higher than the CPU by N mV, where N depends
on the CPU voltage.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

show more ...


# 496747e7 25-Jul-2019 Dmitry Osipenko <digetx@gmail.com>

soc/tegra: regulators: Add regulators coupler for Tegra20

Add regulators coupler for Tegra20 SoCs that performs voltage balancing
of a coupled regulators and thus provides voltage scaling functional

soc/tegra: regulators: Add regulators coupler for Tegra20

Add regulators coupler for Tegra20 SoCs that performs voltage balancing
of a coupled regulators and thus provides voltage scaling functionality.

There are 3 coupled regulators on all Tegra20 SoCs: CORE, RTC and CPU.
The CORE and RTC voltages shall be in range of 170mV from each other and
they both shall be higher than the CPU voltage by at least 120mV. This
sounds like it could be handle by a generic voltage balancer, but the CORE
voltage scaling isn't implemented in any of the upstream drivers yet.
It will take quite some time and effort to hook up voltage scaling for
all of the drivers, hence we will use a custom coupler that will manage
the CPU voltage scaling for the starter.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3
# 7ac13f6d 16-May-2019 Krishna Yarlagadda <kyarlagadda@nvidia.com>

soc/tegra: Select pinctrl for Tegra194

Select PINCTRL_TEGRA194 by default for Tegra194 SoC needed for
dynamically controlling PCIe pins.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
R

soc/tegra: Select pinctrl for Tegra194

Select PINCTRL_TEGRA194 by default for Tegra194 SoC needed for
dynamically controlling PCIe pins.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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# ec8f24b7 19-May-2019 Thomas Gleixner <tglx@linutronix.de>

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Revision tags: v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25
# f40f4fc9 21-Feb-2019 Joseph Lo <josephl@nvidia.com>

soc/tegra: default select TEGRA_TIMER for Tegra210

The tegra timer is necessary for Tegra210 to support CPU idle power-down
state. So select it by default.

Signed-off-by: Joseph Lo <josephl@nvidia.

soc/tegra: default select TEGRA_TIMER for Tegra210

The tegra timer is necessary for Tegra210 to support CPU idle power-down
state. So select it by default.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

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Revision tags: v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17, v4.16
# 6f9ed07f 20-Feb-2018 Mikko Perttunen <mperttunen@nvidia.com>

soc/tegra: Add Tegra194 SoC configuration option

Add the configuration option to enable support for the Tegra194 system-
on-chip.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-b

soc/tegra: Add Tegra194 SoC configuration option

Add the configuration option to enable support for the Tegra194 system-
on-chip.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v4.15, v4.13.16, v4.14, v4.13.5, v4.13
# c641ec6e 30-Aug-2017 Thierry Reding <treding@nvidia.com>

soc/tegra: pmc: Consolidate Tegra186 support

Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effec

soc/tegra: pmc: Consolidate Tegra186 support

Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effect.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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# 27a0342a 17-Aug-2017 Thierry Reding <treding@nvidia.com>

soc/tegra: Register SoC device

Move this code from arch/arm/mach-tegra and make it common among 32-bit
and 64-bit Tegra SoCs. This is slightly complicated by the fact that on
32-bit Tegra, the SoC d

soc/tegra: Register SoC device

Move this code from arch/arm/mach-tegra and make it common among 32-bit
and 64-bit Tegra SoCs. This is slightly complicated by the fact that on
32-bit Tegra, the SoC device is used as the parent for all devices that
are instantiated from device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7
# e7149a7a 29-Mar-2017 Thierry Reding <treding@nvidia.com>

soc/tegra: bpmp: Implement generic PM domains

The BPMP firmware, found on Tegra186 and later, provides an ABI that can
be used to enable and disable power to several power partitions in Tegra
SoCs.

soc/tegra: bpmp: Implement generic PM domains

The BPMP firmware, found on Tegra186 and later, provides an ABI that can
be used to enable and disable power to several power partitions in Tegra
SoCs. The ABI allows for enumeration of the available power partitions,
so the driver can be reused on future generations, provided the BPMP ABI
remains stable.

Based on work by Stefan Kristiansson <stefank@nvidia.com> and Mikko
Perttunen <mperttunen@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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# 1fd09e5d 28-Mar-2017 Jon Hunter <jonathanh@nvidia.com>

soc/tegra: Add initial flowctrl support for Tegra132/210

Tegra132 and Tegra210 support the flowctrl module and so add initial
support for these devices.

Please note that Tegra186 does not support t

soc/tegra: Add initial flowctrl support for Tegra132/210

Tegra132 and Tegra210 support the flowctrl module and so add initial
support for these devices.

Please note that Tegra186 does not support the flowctrl module, so
update the initialisation function such that we do not fall back and
attempt to map the 'hardcoded' address range for Tegra186. Furthermore
64-bit Tegra devices have always had the flowctrl node defined in their
device-tree and so only use the 'hardcoded' addresses for 32-bit Tegra
devices.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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# 7e10cf74 28-Mar-2017 Jon Hunter <jonathanh@nvidia.com>

soc/tegra: Move Tegra flowctrl driver

The flowctrl driver is required for both ARM and ARM64 Tegra devices
and in order to enable support for it for ARM64, move the Tegra flowctrl
driver into driver

soc/tegra: Move Tegra flowctrl driver

The flowctrl driver is required for both ARM and ARM64 Tegra devices
and in order to enable support for it for ARM64, move the Tegra flowctrl
driver into drivers/soc/tegra.

By moving the flowctrl driver, tegra_flowctrl_init() is now called by
via an early initcall and to prevent this function from attempting to
mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()'
is also added.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revision tags: v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1
# 5e7d4c65 23-Feb-2017 Thierry Reding <treding@nvidia.com>

soc/tegra: Implement Tegra186 PMC support

The power management controller on Tegra186 has changed in backwards-
incompatible ways with respect to earlier generations. This implements a
new driver th

soc/tegra: Implement Tegra186 PMC support

The power management controller on Tegra186 has changed in backwards-
incompatible ways with respect to earlier generations. This implements a
new driver that supports inversion of the PMU interrupt as well as the
"recovery", "bootloader" and "forced-recovery" reboot commands.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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