/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nvidia,tegra210-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra210 Pinmux Controller 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 const: nvidia,tegra210-pinmux 19 - description: APB_MISC_GP_*_PADCTRL register (pad control) 20 - description: PINMUX_AUX_* registers (pinmux) [all …]
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H A D | nvidia,tegra124-xusb-padctl.txt | 7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt. 14 This document defines the device-specific binding for the XUSB pad controller. 16 Refer to pinctrl-bindings.txt in this directory for generic information about 17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on 21 -------------------- 22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl". 23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl", 24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210. 25 - reg: Physical base address and length of the controller's registers. 26 - resets: Must contain an entry for each entry in reset-names. [all …]
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/openbmc/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra210-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra210-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/reset/tegra210-car.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/thermal/tegra124-soctherm.h> 10 #include <dt-bindings/soc/tegra-pmc.h> [all …]
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H A D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra194-clock.h> 3 #include <dt-bindings/gpio/tegra194-gpio.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mailbox/tegra186-hsp.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 8 #include <dt-bindings/power/tegra194-powergate.h> 9 #include <dt-bindings/reset/tegra194-reset.h> 10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h> [all …]
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H A D | tegra186.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra186-clock.h> 3 #include <dt-bindings/gpio/tegra186-gpio.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mailbox/tegra186-hsp.h> 6 #include <dt-bindings/memory/tegra186-mc.h> 7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 8 #include <dt-bindings/power/tegra186-powergate.h> 9 #include <dt-bindings/reset/tegra186-reset.h> 10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h> [all …]
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H A D | tegra210-p2180.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/mfd/max77620.h> 4 #include "tegra210.dtsi" 8 compatible = "nvidia,p2180", "nvidia,tegra210"; 17 stdout-path = "serial0:115200n8"; 26 vdd-supply = <&vdd_gpu>; 31 /delete-property/ dmas; 32 /delete-property/ dma-names; 45 vcc-supply = <&vdd_1v8>; 46 address-width = <8>; [all …]
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H A D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/tegra234-clock.h> 4 #include <dt-bindings/gpio/tegra234-gpio.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/mailbox/tegra186-hsp.h> 7 #include <dt-bindings/memory/tegra234-mc.h> 8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 9 #include <dt-bindings/power/tegra234-powergate.h> 10 #include <dt-bindings/reset/tegra234-reset.h> 11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> [all …]
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H A D | tegra210-p3450-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/linux-event-codes.h> 6 #include <dt-bindings/mfd/max77620.h> 8 #include "tegra210.dtsi" 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 22 stdout-path = "serial0:115200n8"; 33 hvddio-pex-supply = <&vdd_1v8>; 34 dvddio-pex-supply = <&vdd_pex_1v05>; [all …]
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H A D | tegra210-p2571.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra210-p2530.dtsi" 8 model = "NVIDIA Tegra210 P2571 reference design"; 9 compatible = "nvidia,p2571", "nvidia,tegra210"; 11 pinmux: pinmux@700008d4 { label 12 pinctrl-names = "boot"; 13 pinctrl-0 = <&state_boot>; 15 state_boot: pinmux { [all …]
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H A D | tegra210-p2597.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 8 model = "NVIDIA Tegra210 P2597 I/O board"; 9 compatible = "nvidia,p2597", "nvidia,tegra210"; 23 avdd-dsi-csi-supply = <&vdd_dsi_csi>; 33 avdd-io-hdmi-dp-supply = <&avdd_1v05>; 34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>; 35 hdmi-supply = <&vdd_hdmi>; [all …]
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H A D | tegra210-p2595.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 model = "NVIDIA Tegra210 P2595 I/O board"; 7 compatible = "nvidia,p2595", "nvidia,tegra210"; 9 pinmux: pinmux@700008d4 { label 10 pinctrl-names = "boot"; 11 pinctrl-0 = <&state_boot>; 13 state_boot: pinmux { 19 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 20 nvidia,open-drain = <TEGRA_PIN_DISABLE>; [all …]
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H A D | tegra210-smaug.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 8 #include "tegra210.dtsi" 12 compatible = "google,smaug-rev8", "google,smaug-rev7", 13 "google,smaug-rev6", "google,smaug-rev5", 14 "google,smaug-rev4", "google,smaug-rev3", 15 "google,smaug-rev2", "google,smaug-rev1", [all …]
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H A D | tegra210-p2894.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 7 #include "tegra210.dtsi" 16 stdout-path = "serial0:115200n8"; 24 pinmux: pinmux@700008d4 { label 26 pinctrl-names = "boot"; 27 pinctrl-0 = <&state_boot>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra124-dpaux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 24 pattern: "^dpaux@[0-9a-f]+$" 28 - enum: 29 - nvidia,tegra124-dpaux 30 - nvidia,tegra210-dpaux [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc 19 - nvidia,tegra124-pmc [all …]
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | nvidia,tegra124-dfll.txt | 4 Documentation/devicetree/bindings/clock/clock-bindings.txt 7 the fast CPU cluster. It consists of a free-running voltage controlled 10 communicating with an off-chip PMIC either via an I2C bus or via PWM signals. 13 - compatible : should be one of: 14 - "nvidia,tegra124-dfll": for Tegra124 15 - "nvidia,tegra210-dfll": for Tegra210 16 - reg : Defines the following set of registers, in the order listed: 17 - registers for the DFLL control logic. 18 - registers for the I2C output logic. 19 - registers for the integrated I2C master controller. [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/tegra210/ |
H A D | funcmux.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * (C) Copyright 2013-2015 7 /* Tegra210 high-level function multiplexing */ 12 #include <asm/arch/pinmux.h> 21 * Note that all pinmux/pads should have already in funcmux_select() 22 * been set up in the board pinmux table in in funcmux_select() 23 * pinmux-config-<board>.h for all periphs. in funcmux_select() 25 * needs to be changed on-the-fly. in funcmux_select() 30 return -1; in funcmux_select() 36 return -1; in funcmux_select()
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/openbmc/u-boot/arch/arm/dts/ |
H A D | tegra210.dtsi | 1 #include <dt-bindings/clock/tegra210-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra210-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 9 compatible = "nvidia,tegra210"; 10 interrupt-parent = <&lic>; 11 #address-cells = <2>; 12 #size-cells = <2>; [all …]
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H A D | tegra210-p2371-2180.dts | 1 /dts-v1/; 3 #include "tegra210.dtsi" 6 model = "NVIDIA P2371-2180"; 7 compatible = "nvidia,p2371-2180", "nvidia,tegra210"; 10 stdout-path = &uarta; 24 pcie-controller@01003000 { 37 pinctrl-0 = <&padctl_default>; 38 pinctrl-names = "default"; 40 padctl_default: pinmux { 42 nvidia,lanes = "otg-1", "otg-2"; [all …]
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/openbmc/u-boot/arch/arm/mach-tegra/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0+ 3 # (C) Copyright 2010-2015 Nvidia Corporation. 5 # (C) Copyright 2000-2008 10 obj-y += spl.o 11 obj-y += cpu.o 13 obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o 16 obj-y += ap.o 17 obj-y += board.o board2.o 18 obj-y += cache.o 19 obj-y += clock.o [all …]
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/openbmc/linux/drivers/pinctrl/tegra/ |
H A D | pinctrl-tegra210.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Pinctrl data for the NVIDIA Tegra210 pinmux 12 #include <linux/pinctrl/pinmux.h> 14 #include "pinctrl-tegra.h" 17 * Most pins affected by the pinmux can also be GPIOs. Define these first. 177 /* All non-GPIO pins follow */ 181 /* Non-GPIO pins */ 1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A) 1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A) 1273 #define PINGROUP_BIT_N(b) (-1) [all …]
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/openbmc/linux/drivers/gpu/drm/tegra/ |
H A D | dpaux.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/pinctrl/pinconf-generic.h> 14 #include <linux/pinctrl/pinmux.h> 79 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl() 81 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl() 89 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel() 90 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel() 99 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_write_fifo() 115 size_t num = min_t(size_t, size - i * 4, 4); in tegra_dpaux_read_fifo() 136 if (msg->size > 16) in tegra_dpaux_transfer() [all …]
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/openbmc/u-boot/drivers/usb/host/ |
H A D | ehci-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright (c) 2009-2015 NVIDIA Corporation 12 #include <asm-generic/gpio.h> 14 #include <asm/arch-tegra/usb.h> 15 #include <asm/arch-tegra/clk_rst.h> 41 PARAM_ENABLE_DELAY_COUNT, /* PLL-U Enable Delay Count */ 42 PARAM_STABLE_COUNT, /* PLL-U STABLE count */ 43 PARAM_ACTIVE_DELAY_COUNT, /* PLL-U Active delay count */ 44 PARAM_XTAL_FREQ_COUNT, /* PLL-U XTAL frequency count */ 89 * PLLU-FOs are fixed at 12MHz/60MHz/480MHz). [all …]
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/openbmc/linux/drivers/soc/tegra/ |
H A D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 37 #include <linux/pinctrl/pinconf-generic.h> 56 #include <dt-bindings/interrupt-controller/arm-gic.h> 57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 58 #include <dt-bindings/gpio/tegra186-gpio.h> [all …]
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/openbmc/linux/ |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |