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/openbmc/u-boot/arch/arm/dts/
H A Dtegra20.dtsi1 #include <dt-bindings/clock/tegra20-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 compatible = "nvidia,tegra20";
10 interrupt-parent = <&lic>;
13 compatible = "nvidia,tegra20-host1x", "simple-bus";
19 reset-names = "host1x";
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
H A Dtegra30.dtsi1 #include <dt-bindings/clock/tegra30-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra30-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
13 pcie-controller@00003000 {
14 compatible = "nvidia,tegra30-pcie";
19 reg-names = "pads", "afi", "cs";
22 interrupt-names = "intr", "msi";
[all …]
H A Dtegra114.dtsi1 #include <dt-bindings/clock/tegra114-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra114-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&lic>;
14 compatible = "nvidia,tegra114-host1x", "simple-bus";
20 reset-names = "host1x";
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
H A Dtegra210.dtsi1 #include <dt-bindings/clock/tegra210-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra210-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
10 interrupt-parent = <&lic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 pcie-controller@01003000 {
[all …]
H A Dtegra20-trimslice.dts1 /dts-v1/;
3 #include "tegra20.dtsi"
7 compatible = "compulab,trimslice", "nvidia,tegra20";
10 stdout-path = &uarta;
15 mmc0 = "/sdhci@c8000600";
16 mmc1 = "/sdhci@c8000000";
25 clock-frequency = <216000000>;
30 spi-max-frequency = <25000000>;
33 pcie-controller@80003000 {
36 avdd-pex-supply = <&pci_vdd_reg>;
[all …]
H A Dtegra20-plutux.dts1 /dts-v1/;
3 #include "tegra20-tamonten.dtsi"
7 compatible = "ad,plutux", "nvidia,tegra20";
10 stdout-path = &uartd;
15 mmc0 = "/sdhci@c8000600";
23 clock-frequency = <216000000>;
H A Dtegra124.dtsi1 #include <dt-bindings/clock/tegra124-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra124-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
14 interrupt-parent = <&lic>;
17 pcie-controller@01003000 {
[all …]
H A Dtegra20-medcom-wide.dts1 /dts-v1/;
3 #include "tegra20-tamonten.dtsi"
6 model = "Avionic Design Medcom-Wide";
7 compatible = "ad,medcom-wide", "nvidia,tegra20";
10 stdout-path = &uartd;
15 mmc0 = "/sdhci@c8000600";
36 clock-frequency = <216000000>;
51 left-margin = <2>;
52 right-margin = <47>;
53 hsync-len = <136>;
[all …]
H A Dtegra20-colibri.dts1 /dts-v1/;
3 #include "tegra20.dtsi"
7 compatible = "toradex,colibri_t20", "nvidia,tegra20";
10 stdout-path = &uarta;
17 mmc0 = "/sdhci@c8000600";
19 usb1 = "/usb@c5004000"; /* On-module only, for ASIX */
28 display-timings {
31 clock-frequency = <25175000>;
34 hback-porch = <48>;
35 hfront-porch = <16>;
[all …]
H A Dtegra20-tec.dts1 /dts-v1/;
3 #include "tegra20-tamonten.dtsi"
7 compatible = "ad,tec", "nvidia,tegra20";
10 stdout-path = &uartd;
15 mmc0 = "/sdhci@c8000600";
36 clock-frequency = <216000000>;
63 left-margin = <120>;
64 right-margin = <120>;
65 hsync-len = <16>;
66 lower-margin = <15>;
[all …]
H A Dtegra20-ventana.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
7 model = "NVIDIA Tegra20 Ventana evaluation board";
8 compatible = "nvidia,ventana", "nvidia,tegra20";
11 stdout-path = &uartd;
21 mmc0 = "/sdhci@c8000600";
22 mmc1 = "/sdhci@c8000400";
38 display-timings {
41 clock-frequency = <70600000>;
[all …]
H A Dtegra20-seaboard.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
22 mmc0 = "/sdhci@c8000600";
23 mmc1 = "/sdhci@c8000400";
31 stdout-path = &uartd;
47 display-timings {
50 clock-frequency = <70600000>;
53 hback-porch = <58>;
[all …]
H A Dtegra20-paz00.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
8 compatible = "compal,paz00", "nvidia,tegra20";
11 stdout-path = &uarta;
22 mmc0 = "/sdhci@c8000600";
23 mmc1 = "/sdhci@c8000000";
39 display-timings {
42 clock-frequency = <54030000>;
45 hback-porch = <160>;
[all …]
H A Dtegra186.dtsi2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/power/tegra186-powergate.h>
7 #include <dt-bindings/reset/tegra186-reset.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "nvidia,tegra186-gpio";
[all …]
H A Dtegra20-harmony.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
7 model = "NVIDIA Tegra20 Harmony evaluation board";
8 compatible = "nvidia,harmony", "nvidia,tegra20";
11 stdout-path = &uartd;
21 mmc0 = "/sdhci@c8000600";
22 mmc1 = "/sdhci@c8000200";
38 display-timings {
41 clock-frequency = <42430000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
13 interrupt-parent = <&lic>;
[all …]
H A Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
[all …]
H A Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dnvidia,tegra20-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
23 - enum:
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
[all …]
H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
/openbmc/linux/drivers/soc/tegra/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
8 bool "Enable support for Tegra20 family"
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
88 and providing 256 CUDA cores. It supports hardware-accelerated en-
93 controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
106 combination of Denver and Cortex-A57 CPU cores and a GPU based on
107 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
[all …]
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/tegra20-car.h>
18 #include "clk-id.h"
444 { .dev_id = "tegra20-ac97", .dt_id = TEGRA20_CLK_AC97 },
445 { .dev_id = "tegra-apbdma", .dt_id = TEGRA20_CLK_APBDMA },
446 { .dev_id = "rtc-tegra", .dt_id = TEGRA20_CLK_RTC },
448 { .dev_id = "tegra-kbc", .dt_id = TEGRA20_CLK_KBC },
450 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_VCP },
451 { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA20_CLK_BSEA },
[all …]

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