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/openbmc/linux/Documentation/devicetree/bindings/timestamp/
H A Dnvidia,tegra194-hte.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dipen Patel <dipenp@nvidia.com>
13 Tegra SoC has two instances of generic hardware timestamping engines (GTE)
14 known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
18 to enable or disable for the hardware timestamping. The GTE GPIO monitors
19 GPIO lines from the AON (always on) GPIO controller.
24 - nvidia,tegra194-gte-aon
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/openbmc/linux/drivers/hte/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 tristate "NVIDIA Tegra194 HTE Support"
22 known as generic timestamping engine (GTE) support on NVIDIA Tegra194
23 systems-on-chip. The driver supports 352 LIC IRQs and 39 AON GPIOs
27 tristate "NVIDIA Tegra194 HTE Test"
30 The NVIDIA Tegra194 GTE test driver demonstrates how to use HTE
H A Dhte-tegra194.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 NVIDIA Corporation
28 #define NV_AON_SLICE_INVALID -1
31 /* AON HTE line map For slice 1 */
35 /* AON HTE line map For slice 2 */
80 #define HTE_SLICE_SIZE (HTE_SLICE1_TETEN - HTE_SLICE0_TETEN)
354 return readl(hte->regs + reg); in tegra_hte_readl()
360 writel(val, hte->regs + reg); in tegra_hte_writel()
370 return -EINVAL; in tegra_hte_map_to_line_id()
372 return -EINVAL; in tegra_hte_map_to_line_id()
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/openbmc/linux/Documentation/driver-api/hte/
H A Dtegra-hte.rst1 .. SPDX-License-Identifier: GPL-2.0+
7 -----------
8 The Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine)
9 driver implements two GTE instances: 1) GPIO GTE and 2) LIC
10 (Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp
14 GPIO GTE
15 --------
17 This GTE instance timestamps GPIO in real time. For that to happen GPIO
18 needs to be configured as input. Only the always on (AON) GPIO controller
20 the GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/openbmc/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved
25 #include <soc/tegra/tegra-cbb.h>
113 bool format; // [31] = 1 -> FlexNoC versions 2.7 & above
185 "RD - Read, Incrementing",
186 "RDW - Read, Wrap", /* Not Supported */
187 "RDX - Exclusive Read", /* Not Supported */
188 "RDL - Linked Read", /* Not Supported */
189 "WR - Write, Incrementing",
190 "WRW - Write, Wrap", /* Not Supported */
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