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/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Dnvidia,tegra186-misc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/nvidia,tegra186-misc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) MISC register block
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The MISC register block found on Tegra186 and later SoCs contains
20 - nvidia,tegra186-misc
21 - nvidia,tegra194-misc
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/openbmc/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) Display Hub
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
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/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
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/openbmc/u-boot/arch/arm/mach-tegra/
H A DKconfig18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
20 U-Boot, it is typically used for communication between the main CPU
39 select MISC
53 bool "Tegra 32-bit common options"
63 bool "Tegra 64-bit common options"
106 config TEGRA186 config in choice7ae9b77c0104
107 bool "Tegra186 family"
123 When loading U-Boot into RAM over USB protocols using tools such as
124 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
128 does not "de-enumerate" the USB device. This option shuts down the
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/openbmc/u-boot/drivers/misc/
H A DKconfig7 config MISC config
8 bool "Enable Driver Model for Misc drivers"
36 depends on MISC
43 depends on MISC
50 bool "Rockchip e-fuse support"
51 depends on MISC
53 Enable (read-only) access for the e-fuse block found in Rockchip
55 or through child-nodes that are generated based on the e-fuse map
64 depends on MISC
74 Enable command-line access to the Chrome OS EC (Embedded
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H A Dtegra186_bpmp.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <misc.h>
12 #include <asm/arch-tegra/bpmp_abi.h>
13 #include <asm/arch-tegra/ivc.h>
42 return -EINVAL; in tegra186_bpmp_call()
44 ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame); in tegra186_bpmp_call()
51 req->mrq = mrq; in tegra186_bpmp_call()
52 req->flags = BPMP_FLAG_DO_ACK | BPMP_FLAG_RING_DOORBELL; in tegra186_bpmp_call()
55 ret = tegra_ivc_write_advance(&priv->ivc); in tegra186_bpmp_call()
63 ret = tegra_ivc_channel_notified(&priv->ivc); in tegra186_bpmp_call()
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/openbmc/u-boot/drivers/pci/
H A DKconfig16 orgnising devices in U-Boot. For PCI, driver model keeps track of
55 bool "Generic ECAM-based PCI host controller support"
59 Say Y here if you want to enable support for generic ECAM-based
63 bool "Enable Armada-8K PCIe driver (DesignWare core)"
68 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
93 depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
99 support to work (e.g. beaver, jetson-tk1).
127 select MISC
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/openbmc/linux/drivers/soc/tegra/fuse/
H A Dtegra-apbmisc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved.
35 WARN(!chipid, "Tegra APB MISC not yet available\n"); in tegra_read_chipid()
83 WARN(!chipid, "Tegra ABP MISC not yet available\n"); in tegra_read_straps()
109 return -EPROBE_DEFER; in tegra194_miscreg_mask_serror()
113 return -EOPNOTSUPP; in tegra194_miscreg_mask_serror()
124 { .compatible = "nvidia,tegra20-apbmisc", },
125 { .compatible = "nvidia,tegra186-misc", },
126 { .compatible = "nvidia,tegra194-misc", },
127 { .compatible = "nvidia,tegra234-misc", },
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/openbmc/u-boot/drivers/reset/
H A DKconfig9 reset controller hardware module within the chip. In U-Boot, reset
39 bool "Enable Tegra CAR-based reset driver"
42 Enable support for manipulating Tegra's on-SoC reset signals via
46 bool "Enable Tegra186 BPMP-based reset driver"
49 Enable support for manipulating Tegra's on-SoC reset signals via IPC
83 though is that some reset signals, like I2C or MISC reset multiple
/openbmc/u-boot/drivers/i2c/
H A Dtegra186_bpmp_i2c.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <misc.h>
10 #include <asm/arch-tegra/bpmp_abi.h>
46 req.xfer.bus_id = priv->bpmp_bus_id; in tegra186_bpmp_i2c_xfer()
54 return -ENOSPC; in tegra186_bpmp_i2c_xfer()
57 return -EINVAL; in tegra186_bpmp_i2c_xfer()
67 req.xfer.data_size = p - &req.xfer.data_buf[0]; in tegra186_bpmp_i2c_xfer()
69 ret = misc_call(dev->parent, MRQ_I2C, &req, sizeof(req), &resp, in tegra186_bpmp_i2c_xfer()
77 return -EINVAL; in tegra186_bpmp_i2c_xfer()
98 priv->bpmp_bus_id = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), in tegra186_bpmp_i2c_probe()
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/openbmc/linux/drivers/gpu/drm/tegra/
H A Dhub.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
65 * be filtered out later on by ->format_mod_supported() on SoCs where
82 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
83 return plane->offset + offset; in tegra_plane_offset()
87 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
88 return plane->offset + offset; in tegra_plane_offset()
92 offset = 0x1c0 + (offset - 0x800); in tegra_plane_offset()
93 return plane->offset + offset; in tegra_plane_offset()
96 dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); in tegra_plane_offset()
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/openbmc/linux/drivers/spi/
H A Dspi-tegra210-quad.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
235 return readl(tqspi->base + offset); in tegra_qspi_readl()
240 writel(value, tqspi->base + offset); in tegra_qspi_writel()
244 readl(tqspi->base + QSPI_COMMAND1); in tegra_qspi_writel()
271 unsigned int remain_len = t->len - tqspi->cur_pos; in tegra_qspi_calculate_curr_xfer_param()
272 unsigned int bits_per_word = t->bits_per_word; in tegra_qspi_calculate_curr_xfer_param()
274 tqspi->bytes_per_word = DIV_ROUND_UP(bits_per_word, 8); in tegra_qspi_calculate_curr_xfer_param()
284 bits_per_word == 32) && t->len > 3) { in tegra_qspi_calculate_curr_xfer_param()
285 tqspi->is_packed = true; in tegra_qspi_calculate_curr_xfer_param()
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/openbmc/
Dopengrok1.0.log1 2025-03-17 03:00:37.547-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-17 03:00:37.671-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok2.0.log1 2025-03-16 03:00:36.730-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-16 03:00:36.828-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/tegra210-car.h>
18 #include <dt-bindings/reset/tegra210-car.h>
23 #include "clk-id.h"
264 * SDM fractional divisor is 16-bit 2's complement signed number within
265 * (-2^12 ... 2^12-1) range. Represented in PLL data structure as unsigned
266 * 16-bit value, with "0" divisor mapped to 0xFFFF. Data "0" is used to
275 #define sdin_get_n_eff(cfg) ((cfg)->n * PLL_SDM_COEFF + ((cfg)->sdm_data ? \
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