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/openbmc/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra HDMI Output Encoder
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
[all …]
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
[all …]
H A Dnvidia,tegra20-host1x.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
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/openbmc/linux/Documentation/devicetree/bindings/media/cec/
H A Dnvidia,tegra114-cec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/nvidia,tegra114-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra HDMI CEC
10 - Hans Verkuil <hverkuil-cisco@xs4all.nl>
13 - $ref: cec-common.yaml#
18 - nvidia,tegra114-cec
19 - nvidia,tegra124-cec
20 - nvidia,tegra210-cec
[all …]
/openbmc/linux/Documentation/gpu/
H A Dtegra.rst10 Up until, but not including, Tegra124 (aka Tegra K1) the drm/tegra driver
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
12 with Tegra124 the GPU is based on the NVIDIA desktop GPU architecture and
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
22 outputs, such as RGB, HDMI, DSI, and DisplayPort.
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
[all …]
H A Dtegra124-apalis-v1.2-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis-v1.2.dtsi"
13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
15 "nvidia,tegra124";
28 stdout-path = "serial0:115200n8";
38 hdmi@54280000 {
[all …]
H A Dtegra124-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis.dtsi"
13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
14 "nvidia,tegra124";
27 stdout-path = "serial0:115200n8";
37 hdmi@54280000 {
39 hdmi-supply = <&reg_5v0>;
[all …]
H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra124.dtsi"
8 model = "NVIDIA Tegra124 Venice2";
9 compatible = "nvidia,venice2", "nvidia,tegra124";
18 stdout-path = "serial0:115200n8";
26 hdmi@54280000 {
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
[all …]
H A Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra124.dtsi"
7 #include "tegra124-jetson-tk1-emc.dtsi"
10 model = "NVIDIA Tegra124 Jetson TK1";
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
[all …]
H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 #include "tegra124.dtsi"
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
[all …]
H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 #include "tegra124.dtsi"
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
[all …]
H A Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
4 #include "tegra124.dtsi"
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
37 hdmi@54280000 {
40 vdd-supply = <&vdd_3v3_hdmi>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra124.dtsi1 #include <dt-bindings/clock/tegra124-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra124-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
13 compatible = "nvidia,tegra124";
14 interrupt-parent = <&lic>;
[all …]
H A Dtegra124-apalis.dts4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
44 #include <dt-bindings/input/input.h>
45 #include "tegra124.dtsi"
49 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
50 "nvidia,tegra124";
73 stdout-path = "serial0:115200n8";
80 pcie-controller@01003000 {
82 avddio-pex-supply = <&vdd_1v05>;
83 avdd-pex-pll-supply = <&vdd_1v05>;
[all …]
H A Dtegra124-nyan.dtsi1 #include <dt-bindings/input/input.h>
2 #include "tegra124.dtsi"
16 hdmi@54280000 {
19 vdd-supply = <&vdd_3v3_hdmi>;
20 pll-supply = <&vdd_hdmi_pll>;
21 hdmi-supply = <&vdd_5v0_hdmi>;
23 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
24 nvidia,hpd-gpio =
36 vdd-supply = <&vdd_3v3_panel>;
52 clock-frequency = <100000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
[all …]
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
9 compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
18 stdout-path = "serial0:115200n8";
27 hdmi@54280000 {
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 - interrupts: The interrupt outputs from the controller.
7 - #address-cells: The number of cells used to represent physical base addresses
9 - #size-cells: The number of cells used to represent the size of an address
11 - ranges: The mapping of the host1x address space to the CPU address space.
12 - clocks: Must contain one entry, for the module clock.
13 See ../clocks/clock-bindings.txt for details.
14 - resets: Must contain an entry for each entry in reset-names.
16 - reset-names: Must include the following entries:
[all …]
/openbmc/u-boot/drivers/video/
H A DKconfig13 to display a command-line console or splash screen. Enabling this
24 This driver can be use with "simple-panel" and
26 (leds/backlight/pwm-backlight.txt)
34 This driver can be used with "simple-panel" and
36 (leds/backlight/gpio-backlight.txt)
39 bool "Support 8-bit-per-pixel displays"
43 Support drawing text and bitmaps onto a 8-bit-per-pixel display.
49 bool "Support 16-bit-per-pixel displays"
53 Support drawing text and bitmaps onto a 16-bit-per-pixel display.
59 bool "Support 32-bit-per-pixel displays"
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddrm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
27 #include <asm/dma-iommu.h>
76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
79 if (tegra->hub) { in tegra_atomic_commit_tail()
108 return -ENOMEM; in tegra_drm_open()
110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open()
111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open()
112 xa_init(&fpriv->syncpoints); in tegra_drm_open()
[all …]
H A Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/hdmi.h>
21 #include <sound/hdmi-codec.h>
33 #include "hdmi.h"
66 struct regulator *hdmi; member
112 static inline u32 tegra_hdmi_readl(struct tegra_hdmi *hdmi, in tegra_hdmi_readl() argument
115 u32 value = readl(hdmi->regs + (offset << 2)); in tegra_hdmi_readl()
117 trace_hdmi_readl(hdmi->dev, offset, value); in tegra_hdmi_readl()
122 static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value, in tegra_hdmi_writel() argument
125 trace_hdmi_writel(hdmi->dev, offset, value); in tegra_hdmi_writel()
[all …]
/openbmc/linux/drivers/media/cec/platform/tegra/
H A Dtegra_cec.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved.
11 * Copyright 2016-2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
29 #include <media/cec-notifier.h>
33 #define TEGRA_CEC_NAME "tegra-cec"
54 return readl(cec->cec_base + reg); in cec_read()
59 writel(val, cec->cec_base + reg); in cec_write()
77 if (cec->tx_done) { in tegra_cec_irq_thread_handler()
78 cec_transmit_attempt_done(cec->adap, cec->tx_status); in tegra_cec_irq_thread_handler()
79 cec->tx_done = false; in tegra_cec_irq_thread_handler()
[all …]
/openbmc/linux/sound/pci/hda/
H A Dpatch_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
48 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
82 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
83 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
90 bool chmap_set; /* channel-map override by ALSA API? */
91 unsigned char chmap[8]; /* ALSA API channel-map */
127 SILENT_STREAM_KAE, /* use standard HDA Keep-Alive */
172 /* hdmi interrupt trigger control flag for Nvidia codec */
[all …]

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