| /openbmc/linux/Documentation/devicetree/bindings/sram/ |
| H A D | allwinner,sun4i-a10-system-control.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 System Control
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 by a regular node for the SRAM controller itself, with sub-nodes
19 "#address-cells":
22 "#size-cells":
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| /openbmc/phosphor-fan-presence/docs/control/ |
| H A D | README.md | 1 # Fan Control Configuration File
5 - [Overview](#overview)
6 - [Data Format](#data-format)
7 - [System Config Location](#system-config-location)
8 - [Contents](#contents)
9 - [Validation](#validation)
10 - [Firmware Updates](#firmware-updates)
11 - [Loading and Reloading](#loading-and-reloading)
12 - [Debug](#debug)
16 The `phosphor-fan-control` application is comprised of as set of configuration
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | sprd,pinctrl.txt | 5 The first block comprises some global control registers, and each
8 pad driving level, system control select and so on ("domain pad
11 select 3.0v, then the pin can output 3.0v. "system control" is used
12 to choose one function (like: UART0) for which system, since we
16 of them, so we can not make every Spreadtrum-special configuration
18 global configuration in future. Then we add one "sprd,control" to
19 set these various global control configuration, and we need use
23 bits in one global control register as one pin, thus we should
32 Now we have 4 systems for sleep mode on SC9860 SoC: AP system,
33 PUBCP system, TGLDSP system and AGDSP system. And the pin sleep
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| /openbmc/phosphor-fan-presence/docs/control/fanctl/ |
| H A D | README.md | 1 # Fan Control tool
3 A tool that enables a user to view the status of a system in regard to fan
4 control including the ability to manually set the fans to a desired RPM (or PWM
5 if supported by the system). This tool has been tested against systems utilizing
6 the phosphor-fan-presence repository set of fan applications (i.e. romulus,
12 The intention of this tool is to temporarily stop the automatic fan control
13 algorithm and allow the user to manually set the fans within the system chassis
14 to a given target. Once a user no longer has a need to manually control the
15 fans, the resume operation re-enables and restarts the phosphor-fan-control
17 along with the the main system states and fan control systemd service, while the
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | mpc5121.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
18 u32 rcr; /* Reset Control Register */
19 u32 rcer; /* Reset Control Enable Register */
23 * Clock Control Module
26 u32 spmr; /* System PLL Mode Register */
27 u32 sccr1; /* System Clock Control Register 1 */
28 u32 sccr2; /* System Clock Control Register 2 */
29 u32 scfr1; /* System Clock Frequency Register 1 */
30 u32 scfr2; /* System Clock Frequency Register 2 */
31 u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
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| /openbmc/openbmc-test-automation/data/ |
| H A D | Palmetto.py | 10 # System states
12 # - a process emits a GotoSystemState signal with state name to goto
13 # - objects specified in EXIT_STATE_DEPEND have started
30 "/org/openbmc/control/chassis0": 0,
31 "/org/openbmc/control/power0": 0,
32 "/org/openbmc/control/led/identify": 0,
33 "/org/openbmc/control/host0": 0,
34 "/org/openbmc/control/flash/bios": 0,
42 "bus_name": "org.openbmc.control.Host",
43 "obj_name": "/org/openbmc/control/host0",
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2004-2011 Freescale Semiconductor, Inc.
32 * System configuration registers
47 u32 sgprl; /* System General Purpose Register Low */
48 u32 sgprh; /* System General Purpose Register High */
49 u32 spridr; /* System Part and Revision ID Register */
51 u32 spcr; /* System Priority Configuration Register */
52 u32 sicrl; /* System I/O Configuration Register Low */
53 u32 sicrh; /* System I/O Configuration Register High */
55 u32 sidcr0; /* System I/O Delay Configuration Register 0 */
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | dcdbas.rst | 9 systems management software such as Dell OpenManage to perform system
10 management interrupts and host control actions (system power cycle or
24 System Management Interrupt
28 management information via a system management interrupt (SMI). The SMI data
29 buffer must reside in 32-bit address space, and the physical address of the
33 software to perform these system management interrupts::
44 2) Write system management command to smi_data.
47 4) Read system management command response from smi_data.
51 Host Control Action
54 Dell OpenManage supports a host control feature that allows the administrator
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| /openbmc/skeleton/configs/ |
| H A D | Palmetto.py | 1 # System states
3 # - a process emits a GotoSystemState signal with state name to goto
4 # - objects specified in EXIT_STATE_DEPEND have started
21 "/org/openbmc/control/chassis0": 0,
22 "/org/openbmc/control/power0": 0,
23 "/org/openbmc/control/led/identify": 0,
24 "/org/openbmc/control/host0": 0,
25 "/org/openbmc/control/flash/bios": 0,
31 0x0D: "<inventory_root>/system/chassis",
32 0x34: "<inventory_root>/system/chassi
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| /openbmc/docs/designs/ |
| H A D | thermal-control-modes.md | 1 # Control.ThermalMode dbus interface with Supported and Current properties
7 Created: 2019-02-06
11 An issue was discovered where the exhaust heat from the system GPUs causes
12 overtemp warnings on optical cables on certain system configurations. The issue
13 can be resolved by altering the fan control application's floor table,
17 optical cables plugged into a card downwind from the GPUs' exhaust, an end-user
22 The witherspoon system supports pci cards that could have optical cables plugged
30 exhaust temp and include that within the fan control algorithm. A similar issue
31 exists on other system where mathematical calculations are done based on the
35 https://github.com/openbmc/dbus-sensors/blob/master/src/ExitAirTempSensor.cpp
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| H A D | scg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
30 /* SCG DDR Clock Control Register */
37 /* SCG NIC Clock Control Register */
71 /* SCG Slow IRC Control Status Register */
99 /* SCG Fast IRC Control Status Register */
122 /* SCG System OSC Control Status Register */
136 /* SCG RTC OSC Control Status Register */
187 /* 0: Sys-OSC, 1: FIRC */
261 u32 rccr; /* Run Clock Control Register */
262 u32 vccr; /* VLPR Clock Control Register */
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| /openbmc/openpower-vpd-parser/config/ibm/ |
| H A D | 50003000.json | 31 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/4-0070/hold_idle"
36 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/5-0070/hold_idle"
41 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/6-0070/hold_idle"
45 "/sys/bus/i2c/drivers/at24/8-0050/eeprom": [
47 "inventoryPath": "/system/chassis/motherboard",
52 "LocationCode": "Ufcs-P0"
55 "PrettyName": "System backplane"
60 "inventoryPath": "/system/chassis/motherboard/unit0",
69 "inventoryPath": "/system",
74 "xyz.openbmc_project.Inventory.Item.System": null,
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| H A D | 50003000_v2.json | 31 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/4-0070/hold_idle"
36 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/5-0070/hold_idle"
41 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/6-0070/hold_idle"
45 "/sys/bus/i2c/drivers/at24/8-0050/eeprom": [
47 "inventoryPath": "/system/chassis/motherboard",
52 "LocationCode": "Ufcs-P0"
55 "PrettyName": "System backplane"
60 "inventoryPath": "/system/chassis/motherboard/unit0",
69 "inventoryPath": "/system",
74 "xyz.openbmc_project.Inventory.Item.System": null,
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|
| H A D | 50001001_v2.json | 31 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/4-0070/hold_idle"
36 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/5-0070/hold_idle"
41 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/6-0070/hold_idle"
46 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/11-0070/hold_idle"
50 "/sys/bus/i2c/drivers/at24/8-0050/eeprom": [
52 "inventoryPath": "/system/chassis/motherboard",
57 "LocationCode": "Ufcs-P0"
60 "PrettyName": "System backplane"
65 "inventoryPath": "/system/chassis/motherboard/unit0",
74 "inventoryPath": "/system",
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| H A D | 50001001.json | 28 "/sys/bus/i2c/drivers/at24/8-0050/eeprom": [
30 "inventoryPath": "/system/chassis/motherboard",
35 "LocationCode": "Ufcs-P0"
38 "PrettyName": "System backplane"
43 "inventoryPath": "/system/chassis/motherboard/unit0",
52 "inventoryPath": "/system",
57 "xyz.openbmc_project.Inventory.Item.System": null,
76 "PrettyName": "System"
81 "inventoryPath": "/system/chassis",
97 "inventoryPath": "/system/chassis/motherboard/pcieslot0",
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| H A D | 50001000_v2.json | 31 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/4-0070/hold_idle"
36 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/5-0070/hold_idle"
41 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/6-0070/hold_idle"
46 "holdidlepath": "/sys/bus/i2c/drivers/pca954x/11-0070/hold_idle"
50 "/sys/bus/i2c/drivers/at24/8-0050/eeprom": [
52 "inventoryPath": "/system/chassis/motherboard",
57 "LocationCode": "Ufcs-P0"
60 "PrettyName": "System backplane"
65 "inventoryPath": "/system/chassis/motherboard/unit0",
74 "inventoryPath": "/system",
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| /openbmc/openbmc/meta-quanta/meta-gbs/recipes-phosphor/configuration/gbs-yaml-config/ |
| H A D | gbs-ipmi-sensors.yaml | 160 rExp: -4
178 rExp: -5
185 rExp: -4
192 rExp: -4
199 rExp: -4
206 rExp: -4
213 rExp: -4
220 rExp: -4
227 rExp: -4
234 rExp: -4
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| /openbmc/qemu/docs/devel/ |
| H A D | s390-dasd-ipl.rst | 1 Booting from real channel-attached devices on s390x
5 -----------------
18 IPL ccw it read the 24-bytes of IPL1 to be read into memory starting at
22 and the TIC (Transfer In Channel) will transfer control to the channel
30 the execution of the IPL2 channel program. IPL2 is stage-2 of the boot
32 IPL2 is to find and load either the operating system or a small program that
33 loads the operating system from disk. At the end of this step all or some of
34 the real operating system is loaded into memory and we are ready to hand
35 control over to the guest operating system. At this point the guest
36 operating system is entirely responsible for loading any more data it might
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| /openbmc/phosphor-fan-presence/control/example/ |
| H A D | fans.yaml | 1 #Example fan definitions for phosphor-fan-control
3 #List all fans that need to be known to phosphor-fan-control.
8 # - inventory: [The system inventory location for the fan]
13 # Default is xyz.openbmc_project.Control.FanSpeed]
15 # xyz.openbmc_project.Control.FanSpeed or
16 # xyz.openbmc_project.Control.FanPwm interface.
23 #Example entries for 2 fan system where fan0 uses default FanSpeed and
26 # - inventory: /system/chassis/motherboard/fan0
30 # - fan0
31 # - inventory: /system/chassis/motherboard/fan1
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| /openbmc/linux/drivers/media/usb/dvb-usb-v2/ |
| H A D | rtl28xxu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
145 /* SIE Control Registers */
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
153 #define USB_CTRL 0x2010 /* USB control */
165 #define USB_EP0_CTL 0x2108 /* EP 0 control */
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| /openbmc/linux/drivers/firmware/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
12 tristate "ARM System Control and Power Interface (SCPI) Message Protocol"
16 System Control and Power Interface (SCPI) Message Protocol is
18 Cores(AP) and the System Control Processor(SCP). The MHU peripheral
19 provides a mechanism for inter-processor communication between SCP
23 Processors. It offers control and management of: the core/cluster
25 certain system clocks configuration, thermal sensors and many
71 bool "Add firmware-provided memory map to sysfs" if EXPERT
74 Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap.
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| /openbmc/docs/ |
| H A D | host-management.md | 3 This document describes the host-management interfaces of the OpenBMC object
9 [REST-cheatsheet](https://github.com/openbmc/docs/blob/master/REST-cheatsheet.md#establish-rest-con…
15 …-k -H "Content-Type: application/json" -X POST https://${bmc}/login -d '{"username" : "root", "pa…
16 $ curl -k -H "X-Auth-Token: $token" https://${bmc}/xyz/openbmc_project/...
21 The system inventory structure is under the `/xyz/openbmc_project/inventory`
25 physical system topology. Items in the inventory are referred to as inventory
26 items and are not necessarily FRUs (field-replaceable units). If the system
30 `inventory/system/chassis0/motherboard0/cpu0`
35 - `Version`: A code version associated with this item.
36 - `Present`: Indicates whether this item is present in the system (True/False).
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | pistachio-clock.txt | 5 general control, and top general control) which are instantiated individually
6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
18 ----------------------
21 co-processor), audio, and several peripherals.
24 - compatible: Must be "img,pistachio-clk".
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| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | power-controller.txt | 1 * Generic system power control capability
3 Power-management integrated circuits or miscellaneous hardware components are
4 sometimes able to control the system power. The device driver associated with these
6 it can be used to switch off the system. The corresponding device must have the
7 standard property "system-power-controller" in its device node. This property
8 marks the device as able to control the system power. In order to test if this
15 compatible = "active-semi,act8846";
16 system-power-controller;
|
| /openbmc/qemu/include/hw/misc/ |
| H A D | iotkit-sysctl.h | 2 * ARM IoTKit system control element
13 * This is a model of the "system control element" which is part of the
16 * Specifically, it implements the "system information block" and
17 * "system control register" blocks.
20 * + QOM property "sse-version": indicates which SSE version this is part of
21 * (used to identify whether to provide SSE-200-only registers, etc)
22 * + sysbus MMIO region 0: the system information register bank
23 * + sysbus MMIO region 1: the system control register bank
32 #define TYPE_IOTKIT_SYSCTL "iotkit-sysctl"
|