Lines Matching +full:system +full:- +full:control
1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2004-2011 Freescale Semiconductor, Inc.
32 * System configuration registers
47 u32 sgprl; /* System General Purpose Register Low */
48 u32 sgprh; /* System General Purpose Register High */
49 u32 spridr; /* System Part and Revision ID Register */
51 u32 spcr; /* System Priority Configuration Register */
52 u32 sicrl; /* System I/O Configuration Register Low */
53 u32 sicrh; /* System I/O Configuration Register High */
55 u32 sidcr0; /* System I/O Delay Configuration Register 0 */
56 u32 sidcr1; /* System I/O Delay Configuration Register 1 */
57 u32 ddrcdr; /* DDR Control Driver Register */
61 u32 pecr1; /* PCI Express control register 1 */
63 u32 sdhccr; /* eSDHC Control Registers for MPC830x */
65 u32 pecr2; /* PCI Express control register 2 */
82 u32 swcrr; /* System watchdog control register */
83 u32 swcnr; /* System watchdog count register */
85 u16 swsrr; /* System watchdog service register */
93 u32 cnr; /* control register */
141 u32 sicfr; /* System Global Interrupt Configuration Register */
142 u32 sivcr; /* System Global Interrupt Vector Register */
143 u32 sipnr_h; /* System Internal Interrupt Pending Register - High */
144 u32 sipnr_l; /* System Internal Interrupt Pending Register - Low */
145 u32 siprr_a; /* System Internal Interrupt Group A Priority Register */
146 u32 siprr_b; /* System Internal Interrupt Group B Priority Register */
147 u32 siprr_c; /* System Internal Interrupt Group C Priority Register */
148 u32 siprr_d; /* System Internal Interrupt Group D Priority Register */
149 u32 simsr_h; /* System Internal Interrupt Mask Register - High */
150 u32 simsr_l; /* System Internal Interrupt Mask Register - Low */
151 u32 sicnr; /* System Internal Interrupt Control Register */
152 u32 sepnr; /* System External Interrupt Pending Register */
153 u32 smprr_a; /* System Mixed Interrupt Group A Priority Register */
154 u32 smprr_b; /* System Mixed Interrupt Group B Priority Register */
155 u32 semsr; /* System External Interrupt Mask Register */
156 u32 secnr; /* System External Interrupt Control Register */
157 u32 sersr; /* System Error Status Register */
158 u32 sermr; /* System Error Mask Register */
159 u32 sercr; /* System Error Control Register */
160 u32 sepcr; /* System External Interrupt Polarity Control Register */
161 u32 sifcr_h; /* System Internal Interrupt Force Register - High */
162 u32 sifcr_l; /* System Internal Interrupt Force Register - Low */
163 u32 sefcr; /* System External Interrupt Force Register */
164 u32 serfr; /* System Error Force Register */
165 u32 scvcr; /* System Critical Interrupt Vector Register */
166 u32 smvcr; /* System Management Interrupt Vector Register */
171 * System Arbiter Registers
196 u32 rcr; /* Reset Control Register */
197 u32 rcer; /* Reset Control Enable Register */
205 u32 spmr; /* system PLL mode Register */
206 u32 occr; /* output clock control Register */
207 u32 sccr; /* system clock control Register */
212 * Power Management Control Module
232 u32 icr; /* external interrupt control register */
243 u32 qepicr; /* QE Ports Interrupt Control Register */
298 u32 sdram_cfg; /* SDRAM Control Configuration */
299 u32 sdram_cfg2; /* SDRAM Control Configuration 2 */
302 u32 sdram_md_cntl; /* SDRAM Mode Control */
306 u32 sdram_clk_cntl; /* SDRAM Clock Control */
328 u32 err_sbe; /* Memory Single-Bit ECC Error Management */
342 u8 ulcr; /* line control register */
343 u8 umcr; /* MODEM control register */
357 u32 res0[0xC]; /* 0x0-0x29 reseverd */
360 u32 res1[0x6]; /* 0x38-0x49 reserved */
366 u32 res2; /* 0x64-0x67 reserved */
368 u32 res3[0x5]; /* 0x6C-0x79 reserved */
371 u32 res4[0x1E]; /* 0x88-0x99 reserved */
410 * PCI Controller Control and Status Registers
630 sysconf83xx_t sysconf; /* System configuration */
636 arbiter83xx_t arbiter; /* System Arbiter Registers */
638 clk83xx_t clk; /* System Clock Module */
639 pmc83xx_t pmc; /* Power Management Control Module */
660 pcictrl83xx_t pci_ctrl[2]; /* PCI Controller Control and Status Registers */
684 sysconf83xx_t sysconf; /* System configuration */
690 arbiter83xx_t arbiter; /* System Arbiter Registers */
692 clk83xx_t clk; /* System Clock Module */
693 pmc83xx_t pmc; /* Power Management Control Module */
708 pcictrl83xx_t pci_ctrl[1]; /* PCI Controller Control and Status Registers */
719 sysconf83xx_t sysconf; /* System configuration */
725 arbiter83xx_t arbiter; /* System Arbiter Registers */
727 clk83xx_t clk; /* System Clock Module */
728 pmc83xx_t pmc; /* Power Management Control Module */
743 pcictrl83xx_t pci_ctrl[1]; /* PCI Controller Control and Status Registers */
764 sysconf83xx_t sysconf; /* System configuration */
770 arbiter83xx_t arbiter; /* System Arbiter Registers */
772 clk83xx_t clk; /* System Clock Module */
773 pmc83xx_t pmc; /* Power Management Control Module */
788 pcictrl83xx_t pci_ctrl[1]; /* PCI Controller Control and Status Registers */
808 sysconf83xx_t sysconf; /* System configuration */
814 arbiter83xx_t arbiter; /* System Arbiter Registers */
816 clk83xx_t clk; /* System Clock Module */
817 pmc83xx_t pmc; /* Power Management Control Module */
837 pcictrl83xx_t pci_ctrl[1]; /* PCI Controller Control and Status Registers */
848 sysconf83xx_t sysconf; /* System configuration */
854 arbiter83xx_t arbiter; /* System Arbiter Registers */
856 clk83xx_t clk; /* System Clock Module */
857 pmc83xx_t pmc; /* Power Management Control Module */
876 pcictrl83xx_t pci_ctrl[1]; /* PCI Controller Control and Status Registers */
884 sysconf83xx_t sysconf; /* System configuration */
890 arbiter83xx_t arbiter; /* System Arbiter Registers */
892 clk83xx_t clk; /* System Clock Module */
893 pmc83xx_t pmc; /* Power Management Control Module */
914 pcictrl83xx_t pci_ctrl[1]; /* PCI Control & Status Registers */
953 #define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)