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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dallwinner,sun50i-a64-dma.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A64 DMA Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 - $ref: dma-controller.yaml#
17 "#dma-cells":
23 - enum:
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/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
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H A Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
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H A Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/allwinner/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
24 compatible = "arm,cortex-a53";
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H A Dsun50i-a100.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-a100-ccu.h>
8 #include <dt-bindings/clock/sun50i-a100-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-a100-ccu.h>
10 #include <dt-bindings/reset/sun50i-a100-r-ccu.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
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/openbmc/u-boot/arch/arm/dts/
H A Dsun50i-a64.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun50i-a64-ccu.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
47 #include <dt-bindings/clock/sun8i-r-ccu.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/reset/sun50i-a64-ccu.h>
50 #include <dt-bindings/reset/sun8i-de2.h>
51 #include <dt-bindings/reset/sun8i-r-ccu.h>
54 interrupt-parent = <&gic>;
55 #address-cells = <1>;
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dallwinner,sun4i-a10-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#sound-dai-cells":
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
21 - const: allwinner,sun8i-a83t-i2s
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H A Dallwinner,sun4i-a10-spdif.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Liam Girdwood <lgirdwood@gmail.com>
12 - Mark Brown <broonie@kernel.org>
13 - Maxime Ripard <mripard@kernel.org>
16 "#sound-dai-cells":
21 - const: allwinner,sun4i-a10-spdif
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/openbmc/linux/Documentation/devicetree/bindings/arm/sunxi/
H A Dallwinner,sun4i-a10-mbus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun4i-a10-mbus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 will use to perform DMA. It also has a register interface that
19 Each device having to perform their DMA through the MBUS must have
20 the interconnects and interconnect-names properties set to the MBUS
21 controller and with "dma-mem" as the interconnect name.
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/openbmc/qemu/include/hw/sd/
H A Dallwinner-sdhost.h33 #define TYPE_AW_SDHOST "allwinner-sdhost"
36 #define TYPE_AW_SDHOST_SUN4I TYPE_AW_SDHOST "-sun4i"
39 #define TYPE_AW_SDHOST_SUN5I TYPE_AW_SDHOST "-sun5i"
41 /** Allwinner sun50i-a64 */
42 #define TYPE_AW_SDHOST_SUN50I_A64 TYPE_AW_SDHOST "-sun50i-a64"
44 /** Allwinner sun50i-a64 emmc */
45 #define TYPE_AW_SDHOST_SUN50I_A64_EMMC TYPE_AW_SDHOST "-sun50i-a64-emmc"
75 /** Memory region where DMA transfers are done */
78 /** Address space used internally for DMA transfers */
81 /** Number of bytes left in current DMA transfer */
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/openbmc/linux/drivers/soc/sunxi/
H A Dsunxi_mbus.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/dma-map-ops.h>
15 * memory allocations and DMA operations through that device, we
18 "allwinner,sun4i-a10-display-engine",
19 "allwinner,sun5i-a10s-display-engine",
20 "allwinner,sun5i-a13-display-engine",
21 "allwinner,sun6i-a31-display-engine",
22 "allwinner,sun6i-a31s-display-engine",
23 "allwinner,sun7i-a20-display-engine",
24 "allwinner,sun8i-a23-display-engine",
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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dmarvell,mv64xxx-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gregory CLEMENT <gregory.clement@bootlin.com>
15 - const: allwinner,sun4i-a10-i2c
16 - items:
17 - const: allwinner,sun7i-a20-i2c
18 - const: allwinner,sun4i-a10-i2c
19 - const: allwinner,sun6i-a31-i2c
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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dallwinner,sun8i-h3-deinterlace.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jernej Skrabec <jernej.skrabec@siol.net>
11 - Chen-Yu Tsai <wens@csie.org>
12 - Maxime Ripard <mripard@kernel.org>
14 description: |-
21 - const: allwinner,sun8i-h3-deinterlace
22 - items:
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-r40.dtsi2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/clock/sun8i-tcon-top.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
50 #include <dt-bindings/reset/sun8i-de2.h>
51 #include <dt-bindings/thermal/thermal.h>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
25 - const: allwinner,sun6i-a31-tcon
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/openbmc/linux/arch/riscv/boot/dts/allwinner/
H A Dsunxi-d1s-t113.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
4 #include <dt-bindings/clock/sun6i-rtc.h>
5 #include <dt-bindings/clock/sun8i-de2.h>
6 #include <dt-bindings/clock/sun8i-tcon-top.h>
7 #include <dt-bindings/clock/sun20i-d1-ccu.h>
8 #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/sun8i-de2.h>
11 #include <dt-bindings/reset/sun20i-d1-ccu.h>
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/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_mixer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
249 return -EINVAL; in sun8i_mixer_drm_format_to_hw()
256 regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, in sun8i_mixer_commit()
267 planes = devm_kcalloc(drm->dev, in sun8i_layers_init()
268 mixer->cfg->vi_num + mixer->cfg->ui_num + 1, in sun8i_layers_init()
271 return ERR_PTR(-ENOMEM); in sun8i_layers_init()
273 for (i = 0; i < mixer->cfg->vi_num; i++) { in sun8i_layers_init()
278 dev_err(drm->dev, in sun8i_layers_init()
283 planes[i] = &layer->plane; in sun8i_layers_init()
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H A Dsun4i_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
10 #include <linux/dma-mapping.h>
38 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), 2); in drm_sun4i_gem_dumb_create()
50 .name = "sun4i-drm",
72 ret = -ENOMEM; in sun4i_drv_bind()
76 drm->dev_private = drv; in sun4i_drv_bind()
77 INIT_LIST_HEAD(&drv->frontend_list); in sun4i_drv_bind()
78 INIT_LIST_HEAD(&drv->engine_list); in sun4i_drv_bind()
79 INIT_LIST_HEAD(&drv->tcon_list); in sun4i_drv_bind()
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/openbmc/linux/drivers/mmc/host/
H A Dsunxi-mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
5 * (C) Copyright 2007-2011 Aaron Maoye <leafy.myeh@reuuimllatech.com>
6 * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
7 * (C) Copyright 2013-2014 David Lanzendörfer <david.lanzendoerfer@o2s.ch>
8 * (C) Copyright 2013-2014 Hans de Goede <hdegoede@redhat.com>
13 #include <linux/clk/sunxi-ng.h>
16 #include <linux/dma-mapping.h>
27 #include <linux/mmc/slot-gpio.h>
70 /* New registers introduced in A64 */
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/openbmc/u-boot/drivers/net/
H A DKconfig11 This is currently implemented in net/eth-uclass.c
43 bool "Altera Triple-Speed Ethernet MAC support"
47 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
48 Please find details on the "Triple-Speed Ethernet MegaCore Function
56 to MAC and DMA management for multiple Broadcom SoCs such as
78 select DMA
88 select DMA
134 U-Boot.
152 in U-Boot to the RAW AF_PACKET API in Linux. This allows real
217 and integrates a link list DMA engine with direct M-Bus
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H A Dsun8i_emac.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Ethernet driver for H3/A64/A83T based SoC's
9 * LABBE Corentin & Chen-Yu Tsai for Linux, THANKS!
23 #include <dt-bindings/pinctrl/sun4i-a10.h>
25 #include <asm-generic/gpio.h>
38 #define CONFIG_ETH_BUFSIZE 2048 /* Note must be dma aligned */
77 /* H3/A64 EMAC Register's offset */
154 struct udevice *dev = bus->priv; in sun8i_mdio_read()
172 writel(miiaddr, priv->mac_reg + EMAC_MII_CMD); in sun8i_mdio_read()
176 if (!(readl(priv->mac_reg + EMAC_MII_CMD) & MDIO_CMD_MII_BUSY)) in sun8i_mdio_read()
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/openbmc/linux/drivers/crypto/allwinner/sun8i-ce/
H A Dsun8i-ce-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * sun8i-ce-core.c - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
6 * Copyright (C) 2015-2019 Corentin Labbe <clabbe.montjoie@gmail.com>
19 #include <linux/dma-mapping.h>
31 #include "sun8i-ce.h"
34 * mod clock is lower on H3 than other SoC due to some DMA timeout occurring
150 * This is a simple round-robin way of getting the next channel
155 return atomic_inc_return(&ce->flow) % (MAXFLOW - 1); in sun8i_ce_get_engine_number()
162 struct ce_task *cet = ce->chanlist[flow].tl; in sun8i_ce_run_task()
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/openbmc/linux/drivers/dma/
H A Dsun6i-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2013-2014 Allwinner Tech Co., Ltd
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 #include <linux/dma-mapping.h>
24 #include "virt-dma.h"
129 * It's named "DMA MCLK interface circuit auto gating bit" in the
131 * should be set up when initializing the DMA controller.
163 * This field is not used by the DMA controller, but will be
217 return &chan->dev->device; in chan2dev()
238 dev_dbg(sdev->slave.dev, "Common register:\n" in sun6i_dma_dump_com_regs()
[all …]
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun50i-a64.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun50i-a64.h"
35 .hw.init = CLK_HW_INIT("pll-cpux",
47 * With sigma-delta modulation for fractional-N on the audio PLL,
61 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
71 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_CLOSEST(pll_video0_clk, "pll-video0",
85 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
97 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
115 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
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