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/openbmc/u-boot/drivers/mailbox/
H A Dk3-sec-proxy.c109 struct k3_sec_proxy_mbox *spm = dev_get_priv(chan->dev); in k3_sec_proxy_of_xlate() local
120 for (i = 0; i < spm->desc->num_valid_threads; i++) in k3_sec_proxy_of_xlate()
121 if (spm->chans[i].id == ind) { in k3_sec_proxy_of_xlate()
123 chan->con_priv = &spm->chans[i]; in k3_sec_proxy_of_xlate()
202 struct k3_sec_proxy_mbox *spm = dev_get_priv(chan->dev); in k3_sec_proxy_send() local
218 if (msg->len > spm->desc->max_msg_size) { in k3_sec_proxy_send()
220 __func__, chan->id, msg->len, spm->desc->max_msg_size); in k3_sec_proxy_send()
225 data_reg = spt->data + spm->desc->data_start_offset; in k3_sec_proxy_send()
245 if (data_reg <= (spt->data + spm->desc->data_end_offset)) in k3_sec_proxy_send()
246 sp_writel(spt->data, spm->desc->data_end_offset, 0); in k3_sec_proxy_send()
[all …]
/openbmc/linux/arch/powerpc/mm/book3s64/
H A Dsubpage_prot.c94 u32 **spm, *spp; in subpage_prot_clear() local
111 spm = spt->low_prot; in subpage_prot_clear()
113 spm = spt->protptrs[addr >> SBP_L3_SHIFT]; in subpage_prot_clear()
114 if (!spm) in subpage_prot_clear()
117 spp = spm[(addr >> SBP_L2_SHIFT) & (SBP_L2_COUNT - 1)]; in subpage_prot_clear()
189 u32 **spm, *spp; in SYSCALL_DEFINE3() local
237 spm = spt->low_prot; in SYSCALL_DEFINE3()
239 spm = spt->protptrs[addr >> SBP_L3_SHIFT]; in SYSCALL_DEFINE3()
240 if (!spm) { in SYSCALL_DEFINE3()
241 spm = (u32 **)get_zeroed_page(GFP_KERNEL); in SYSCALL_DEFINE3()
[all …]
/openbmc/linux/drivers/cpuidle/
H A Dcpuidle-qcom-spm.c20 #include <soc/qcom/spm.h>
29 struct spm_driver_data *spm; member
51 * if the SPM mode is not reset, then we may accidently power down the in qcom_cpu_spc()
66 return CPU_PM_CPU_IDLE_ENTER_PARAM(qcom_cpu_spc, idx, data->spm); in spm_enter_idle_state()
112 data->spm = dev_get_drvdata(&pdev->dev); in spm_cpuidle_register()
113 if (!data->spm) in spm_cpuidle_register()
152 .name = "qcom-spm-cpuidle",
182 /* Make sure there is actually any CPU managed by the SPM */ in qcom_spm_cpuidle_init()
186 pdev = platform_device_register_simple("qcom-spm-cpuidle", in qcom_spm_cpuidle_init()
H A DKconfig.arm120 bool "CPU Idle Driver for Qualcomm Subsystem Power Manager (SPM)"
130 The Subsystem Power Manager (SPM) controls low power modes for the
/openbmc/linux/Documentation/devicetree/bindings/arm/msm/
H A Dqcom,idle-state.txt16 trigger to execute the SPM state machine. The SPM state machine waits for the
19 the SPM state machine out of its wait, the next step is to ensure that the
22 driver and is not defined in the DT. The SPM state machine should be
29 registers active. The SPM should be configured to execute the retention
36 cpu or the system resources. This helps save power only on that core. The SPM
54 this essentially is cpu power down. The SPM in this state also may handshake
H A Dqcom,saw2.txt1 SPM AVS Wrapper 2 (SAW2)
3 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
4 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
42 Definition: Indicates that this SPM device acts as a regulator device
43 device for the core (CPU or Cache) the SPM is attached
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi450 spm: power-controller { label
856 power-domains = <&spm MT8173_POWER_DOMAIN_AUDIO>;
932 power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
947 power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
990 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1006 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1016 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1024 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1031 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
1038 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
[all …]
H A Dmt8195.dtsi528 spm: power-controller { label
961 power-domains = <&spm MT8195_POWER_DOMAIN_ADSP>;
985 power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
1135 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
1269 power-domains = <&spm MT8195_POWER_DOMAIN_ETHER>;
1521 power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_MAC_P0>;
1573 power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_MAC_P1>;
1858 power-domains = <&spm MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY>;
1922 power-domains = <&spm MT8195_POWER_DOMAIN_PCIE_PHY>;
1947 power-domains = <&spm MT8195_POWER_DOMAIN_MFG2>,
[all …]
H A Dmt8192.dtsi492 spm: power-controller { label
951 power-domains = <&spm MT8192_POWER_DOMAIN_AUDIO>;
1382 power-domains = <&spm MT8192_POWER_DOMAIN_MFG2>,
1383 <&spm MT8192_POWER_DOMAIN_MFG3>,
1384 <&spm MT8192_POWER_DOMAIN_MFG4>,
1385 <&spm MT8192_POWER_DOMAIN_MFG5>,
1386 <&spm MT8192_POWER_DOMAIN_MFG6>;
1418 power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
1429 power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
1439 power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
[all …]
H A Dmt8167.dtsi42 spm: power-controller { label
139 power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
149 power-domains = <&spm MT8167_POWER_DOMAIN_MM>;
159 power-domains = <&spm MT8167_POWER_DOMAIN_ISP>;
169 power-domains = <&spm MT8167_POWER_DOMAIN_VDEC>;
H A Dmt8186.dtsi889 spm: power-controller { label
1165 power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;
1544 power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
1610 power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
1711 power-domains = <&spm MT8186_POWER_DOMAIN_MFG2>,
1712 <&spm MT8186_POWER_DOMAIN_MFG3>;
1740 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
1749 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
1760 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
1771 power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
[all …]
H A Dmt8183.dtsi851 spm: power-controller { label
1217 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1459 <&spm MT8183_POWER_DOMAIN_AUDIO>;
1631 power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
1646 <&spm MT8183_POWER_DOMAIN_MFG_CORE0>,
1647 <&spm MT8183_POWER_DOMAIN_MFG_CORE1>,
1648 <&spm MT8183_POWER_DOMAIN_MFG_2D>;
1670 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1703 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
1715 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
[all …]
H A Dmt6795.dtsi276 spm: power-controller { label
412 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
683 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
700 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
706 power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
718 power-domains = <&spm MT6795_POWER_DOMAIN_ISP>;
734 power-domains = <&spm MT6795_POWER_DOMAIN_VDEC>;
750 power-domains = <&spm MT6795_POWER_DOMAIN_VENC>;
/openbmc/linux/drivers/soc/qcom/
H A Dspm.c17 #include <soc/qcom/spm.h>
75 /* SPM register data for 8909 */
87 /* SPM register data for 8916 */
118 /* SPM register data for 8976 */
146 /* SPM register data for 8974, 8084 */
158 /* SPM register data for 8226 */
179 /* SPM register data for 8064 */
293 /* Write the SPM sequences first.. */ in spm_dev_probe()
301 * CPU was held in reset, the reset signal could trigger the SPM state in spm_dev_probe()
/openbmc/openbmc/meta-arm/meta-arm/recipes-security/optee/
H A Doptee-os-ts.inc57 # SPM test SPs
59 ' ts-sp-spm-test1 ts-sp-spm-test2 \
60 ts-sp-spm-test3 ts-sp-spm-test4', '' , d)}"
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,mt8195-jpegdec.yaml105 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>;
128 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>;
143 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>;
158 power-domains = <&spm MT8195_POWER_DOMAIN_VDEC2>;
H A Dmediatek,mt8195-jpegenc.yaml105 power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
124 power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
137 power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
/openbmc/openbmc/meta-arm/meta-arm/recipes-security/trusted-services/
H A Dts-sp-spm-test-common.inc3 # spm test SP only supports opteesp.
10 OECMAKE_SOURCEPATH="${S}/deployments/spm-test${SP_INDEX}/${TS_ENV}"
H A Dts-sp-spm-test2_git.bb5 require ts-sp-spm-test-common.inc
H A Dts-sp-spm-test4_git.bb5 require ts-sp-spm-test-common.inc
H A Dts-sp-spm-test3_git.bb5 require ts-sp-spm-test-common.inc
/openbmc/openbmc/meta-arm/meta-arm/recipes-security/trusted-services/libts/
H A D0001-Remove-TEE-driver-external-component.patch18 .../spm/optee/userspace-programs-on-fvp.rst | 3 +-
135 …docs/environments/secure-partitions/spm/optee/userspace-programs-on-fvp.rst b/docs/environments/se…
137 --- a/docs/environments/secure-partitions/spm/optee/userspace-programs-on-fvp.rst
138 +++ b/docs/environments/secure-partitions/spm/optee/userspace-programs-on-fvp.rst
/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,spm.yaml4 $id: http://devicetree.org/schemas/soc/qcom/qcom,spm.yaml#
37 description: Base address and size of the SPM register region
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-firmware-attributes325 This role is specific to Secure Platform Management (SPM) attribute.
398 HP specific class extensions - Secure Platform Manager (SPM)
401 What: /sys/class/firmware-attributes/*/authentication/SPM/kek
413 What: /sys/class/firmware-attributes/*/authentication/SPM/sk
424 What: /sys/class/firmware-attributes/*/authentication/SPM/status
/openbmc/openbmc/meta-arm/documentation/
H A Dtrusted-services.md26 | spm-test[1-4] | optee-spmc-test |
38 2. optee-os might require platform specific OP-TEE build parameters (for example what SEL the SPM C…

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