/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,smd-edge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,smd-edge.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SMD Edge communication channel nodes 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 13 Qualcomm SMD subnode represents a remote subsystem or a remote processor of 14 some sort - or in SMD language an "edge". The name of the edges are not 17 In turn, subnodes of the "edges" represent devices tied to SMD channels on 19 these nodes are defined by the individual bindings for the SMD devices. [all …]
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H A D | qcom,rpm-proc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konrad.dybcio@linaro.org> 12 - Stephan Gerhold <stephan@gerhold.net> 17 +--------------------------------------------+ 18 | RPM subsystem (qcom,rpm-proc) | 20 reset | +---------------+ +-----+ +-----+ | [all …]
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H A D | qcom,wcnss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,wcnss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 21 - items: 22 - enum: 23 - qcom,pronto-v1-pil 24 - qcom,pronto-v2-pil 25 - qcom,pronto-v3-pil [all …]
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H A D | qcom,pas-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 20 clock-names: 30 - description: Watchdog interrupt 31 - description: Fatal interrupt 32 - description: Ready interrupt 33 - description: Handover interrupt [all …]
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H A D | qcom,msm8916-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephan Gerhold <stephan@gerhold.net> 19 - enum: 20 - qcom,msm8909-mss-pil 21 - qcom,msm8916-mss-pil 22 - qcom,msm8953-mss-pil 23 - qcom,msm8974-mss-pil [all …]
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H A D | qcom,msm8996-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Sibi Sankar <quic_sibis@quicinc.com> 20 - qcom,msm8996-mss-pil 21 - qcom,msm8998-mss-pil 22 - qcom,sdm660-mss-pil 23 - qcom,sdm845-mss-pil [all …]
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H A D | qcom,q6v5.txt | 6 - compatible: 10 "qcom,ipq8074-wcss-pil" 11 "qcom,qcs404-wcss-pil" 13 - reg: 15 Value type: <prop-encoded-array> 19 - reg-names: 24 - interrupts-extended: 26 Value type: <prop-encoded-array> 27 Definition: reference to the interrupts that match interrupt-names 29 - interrupt-names: [all …]
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H A D | qcom,glink-rpm-edge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,glink-rpm-edge.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm G-Link RPM edge 10 Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource 14 - Bjorn Andersson <andersson@kernel.org> 18 const: qcom,glink-rpm 31 - description: rpm_hlos mailbox in APCS 33 qcom,remote-pid: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,smd-rpm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Resource Power Manager (RPM) over SMD/GLINK 15 The SMD or GLINK information for the RPM edge should be filled out. See 16 qcom,smd.yaml for the required edge properties. All SMD/GLINK related 23 Refer to Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml 28 - Andy Gross <agross@kernel.org> 29 - Bjorn Andersson <bjorn.andersson@linaro.org> [all …]
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H A D | qcom,wcnss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 15 radio block, all using SMD as command channels. 21 firmware-name: 32 - qcom,riva" 33 - qcom,pronto" 35 qcom,smd-channels: [all …]
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H A D | qcom,smd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,smd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 18 Using the top-level SMD node is deprecated. Instead, the SMD edges are defined 26 const: qcom,smd 29 "^smd-edge|rpm$": [all …]
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H A D | qcom,apr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 20 - qcom,apr 21 - qcom,apr-v2 22 - qcom,gpr 24 power-domains: 27 qcom,apr-domain: 59 qcom,glink-channels: [all …]
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/openbmc/linux/net/qrtr/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 18 tristate "SMD IPC Router channels" 21 Say Y here to support SMD based ipcrouter channels. SMD is the 32 tristate "MHI IPC Router channels" 35 Say Y here to support MHI based ipcrouter channels. MHI is the
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/openbmc/linux/drivers/rpmsg/ |
H A D | qcom_smd.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 27 * The Qualcomm Shared Memory communication solution provides point-to-point 28 * channels for clients to send and receive streaming or packet based data. 34 * All allocated channels are listed in an allocation table, identifying the 40 * channels should be done. A channel never goes away, it will only change 45 * sends out an interrupt. We detect this change and register a smd device to 76 * smd channel entries. 96 * struct qcom_smd_edge - representing a remote processor 108 * @channels: list of all channels detected on this edge [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 15 in /dev. They make it possible for user-space programs to send and 23 allows user-space programs to create endpoints with specific service name, 39 Say y here to enable support providing communication channels to 68 tristate "Qualcomm Shared Memory Driver (SMD)" 74 providing communication channels to remote processors in Qualcomm
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/openbmc/linux/Documentation/devicetree/bindings/misc/ |
H A D | qcom,fastrpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 The FastRPC implements an IPC (Inter-Processor Communication) 25 - adsp 26 - mdsp 27 - sdsp 28 - cdsp 30 memory-region: [all …]
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/openbmc/linux/drivers/net/wireless/ath/wcn36xx/ |
H A D | wcn36xx.h | 27 #include "smd.h" 91 HW_VALUE_CHANNEL(__wcn->hw->conf.chandef.chan->hw_value) 92 #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band) 93 #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq) 94 #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval) 95 #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags) 96 #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power) 116 * struct wcn36xx_vif - holds VIF related fields 159 * struct wcn36xx_sta - holds STA related fields 163 * used in both SMD channel and TX BD. [all …]
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/openbmc/linux/drivers/interconnect/qcom/ |
H A D | icc-rpm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 9 #include <linux/soc/qcom/smd-rpm.h> 11 #include <dt-bindings/interconnect/qcom,rpm-icc.h> 13 #include <linux/interconnect-provider.h> 29 * struct rpm_clk_resource - RPM bus clock resource 41 * struct qcom_icc_provider - Qualcomm specific interconnect provider 49 * @bus_clk: a pointer to a HLOS-owned bus clock 69 * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters 89 * struct qcom_icc_node - Qualcomm specific interconnect nodes 94 * @channels: number of channels at this node (e.g. DDR channels) [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8953.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 4 #include <dt-bindings/clock/qcom,gcc-msm8953.h> 5 #include <dt-bindings/clock/qcom,rpmcc.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/power/qcom-rpmpd.h> 9 #include <dt-bindings/soc/qcom,apr.h> 10 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | msm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/arm/coresight-cti-dt.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/interconnect/qcom,msm8916.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 12 #include <dt-bindings/reset/qcom,gcc-msm8916.h> 13 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | msm8994.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8994.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8994.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 14 interrupt-parent = <&intc>; 16 #address-cells = <2>; [all …]
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/openbmc/linux/drivers/bluetooth/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 187 bool "Three-wire UART (H5) protocol support" 191 The HCI Three-wire UART Transport Layer makes it possible to 193 Three-wire UART Transport Layer assumes that the UART 197 Say Y here to compile support for Three-wire UART protocol. 234 The Realtek protocol support enables Bluetooth HCI over 3-Wire 246 The Qualcomm Atheros protocol supports HCI In-Band Sleep feature 386 tristate "Marvell BT-over-SDIO driver" 397 Say Y here to compile support for Marvell BT-over-SDIO driver 437 tristate "Qualcomm SMD based HCI support" [all …]
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,rpmcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 14 The clock enumerators are defined in <dt-bindings/clock/qcom,rpmcc.h> and 19 suspend, you need to specify the non-active clock, the one not containing 25 - enum: 26 - qcom,rpmcc-apq8060 27 - qcom,rpmcc-apq8064 [all …]
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/openbmc/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interconnect/qcom,msm8974.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 10 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; [all …]
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H A D | qcom-msm8226.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 17 #address-cells = <1>; [all …]
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