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/openbmc/u-boot/arch/arm/dts/
H A Dr8a7796-salvator-x-u-boot.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the Salvator-X board
8 #include "r8a7796-salvator-x.dts"
9 #include "r8a7796-u-boot.dtsi"
12 u-boot,off-on-delay-us = <20000>;
16 u-boot,off-on-delay-us = <20000>;
21 power-source = <1800>;
29 sd-uhs-sdr12;
30 sd-uhs-sdr25;
31 sd-uhs-sdr104;
[all …]
H A Dr8a7795-salvator-x-u-boot.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the Salvator-X board
8 #include "r8a7795-salvator-x.dts"
9 #include "r8a7795-u-boot.dtsi"
12 u-boot,off-on-delay-us = <20000>;
16 u-boot,off-on-delay-us = <20000>;
21 power-source = <1800>;
29 sd-uhs-sdr12;
30 sd-uhs-sdr25;
31 sd-uhs-sdr104;
[all …]
H A Dr8a77965-salvator-x-u-boot.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the M3N Salvator-XS board
8 #include "r8a77965-salvator-x.dts"
9 #include "r8a77965-u-boot.dtsi"
12 u-boot,off-on-delay-us = <20000>;
16 u-boot,off-on-delay-us = <20000>;
21 power-source = <1800>;
29 sd-uhs-sdr12;
30 sd-uhs-sdr25;
31 sd-uhs-sdr104;
[all …]
H A Dr8a77990-ebisu-u-boot.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the Ebisu board
8 #include "r8a77990-ebisu.dts"
9 #include "r8a77990-u-boot.dtsi"
13 compatible = "regulator-fixed";
14 regulator-name = "fixed-1.8V";
15 regulator-min-microvolt = <1800000>;
16 regulator-max-microvolt = <1800000>;
17 regulator-boot-on;
18 regulator-always-on;
[all …]
H A Dam57xx-beagle-x15.dts2 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
9 #include "am57xx-beagle-x15-common.dtsi"
12 /* NOTE: This describes the "original" pre-production A2 revision */
13 model = "TI AM5728 BeagleBoard-X15";
23 pinctrl-names = "default", "hs";
24 pinctrl-0 = <&mmc1_pins_default>;
25 pinctrl-1 = <&mmc1_pins_hs>;
27 vmmc-supply = <&ldo1_reg>;
28 /delete-property/ sd-uhs-sdr104;
29 /delete-property/ sd-uhs-sdr50;
[all …]
H A Dr8a7795-h3ulcb-u-boot.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the ULCB board
8 #include "r8a7795-h3ulcb.dts"
9 #include "r8a7795-u-boot.dtsi"
13 compatible = "renesas,ulcb-cpld";
15 gpio-sck = <&gpio6 8 0>;
16 gpio-mosi = <&gpio6 7 0>;
17 gpio-miso = <&gpio6 10 0>;
18 gpio-sstbz = <&gpio2 3 0>;
23 u-boot,off-on-delay-us = <20000>;
[all …]
H A Dr8a7796-m3ulcb-u-boot.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the ULCB board
8 #include "r8a7796-m3ulcb.dts"
9 #include "r8a7796-u-boot.dtsi"
13 compatible = "renesas,ulcb-cpld";
15 gpio-sck = <&gpio6 8 0>;
16 gpio-mosi = <&gpio6 7 0>;
17 gpio-miso = <&gpio6 10 0>;
18 gpio-sstbz = <&gpio2 3 0>;
23 u-boot,off-on-delay-us = <20000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq".
21 - pinctrl-names: A pinctrl state names "default" must be defined.
[all …]
H A Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
3 The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface
4 for MMC, SD and SDIO types of cards.
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
[all …]
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
[all …]
H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
[all …]
H A Dbrcm,sdhci-brcmstb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <alcooperx@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
16 - items:
17 - enum:
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dums512-1h10.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Unisoc UMS512-1h10 boards DTS file
8 /dts-v1/;
13 model = "Unisoc UMS512-1H10 Board";
15 compatible = "sprd,ums512-1h10", "sprd,ums512";
28 stdout-path = "serial1:115200n8";
40 /* SD card */
42 bus-width = <4>;
43 no-sdio;
44 no-mmc;
[all …]
/openbmc/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs-polarberry.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2022 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-polarberry-fabric.dtsi"
22 stdout-path = "serial0:115200n8";
26 timebase-frequency = <MTIMER_FREQ>;
45 phy-mode = "sgmii";
46 phy-handle = <&phy0>;
51 phy-mode = "sgmii";
52 phy-handle = <&phy1>;
[all …]
H A Dmpfs-sev-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
7 #include "mpfs-sev-kit-fabric.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
15 model = "Microchip PolarFire-SoC SEV Kit";
16 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
28 stdout-path = "serial1:115200n8";
32 timebase-frequency = <MTIMER_FREQ>;
35 reserved-memory {
[all …]
H A Dmpfs-m100pfsevp.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Original all-in-one devicetree:
4 * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de>
6 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>
8 /dts-v1/;
11 #include "mpfs-m100pfs-fabric.dtsi"
33 stdout-path = "serial1:115200n8";
37 timebase-frequency = <MTIMER_FREQ>;
70 pmic-irq-hog {
71 gpio-hog;
[all …]
H A Dmpfs-icicle-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-icicle-kit-fabric.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 model = "Microchip PolarFire-SoC Icicle Kit";
16 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
29 stdout-path = "serial1:115200n8";
33 timebase-frequency = <RTCCLK_FREQ>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstih410-b2120.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "stihxxx-b2120.dtsi"
11 compatible = "st,stih410-b2120", "st,stih410";
14 stdout-path = &sbc_serial0;
38 max-frequency = <200000000>;
39 sd-uhs-sdr50;
40 sd-uhs-sdr104;
41 sd-uhs-ddr50;
60 sti-display-subsystem@0 {
[all …]
H A Dstih418-b2199.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "st,stih418-b2199", "st,stih418";
14 stdout-path = &sbc_serial0;
28 compatible = "gpio-leds";
29 led-red {
32 linux,default-trigger = "heartbeat";
34 led-green {
36 default-state = "off";
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 sdcard-supply = <&vccio_sd>;
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
57 vcc9-supply = <&vcc_5v>;
61 regulator-name = "vccio_sd";
62 regulator-min-microvolt = <1800000>;
[all …]
H A Drv1126-edgeble-neu2-io.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "rv1126-edgeble-neu2.dtsi"
13 compatible = "edgeble,neural-compute-module-2-io",
14 "edgeble,neural-compute-module-2", "rockchip,rv1126";
21 stdout-path = "serial2:1500000n8";
24 vcc12v_dcin: vcc12v-dcin-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc12v_dcin";
27 regulator-always-on;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1012a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "fsl-ls1012a.dtsi"
15 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
37 mmc-hs200-1_8v;
[all …]
H A Dfsl-lx2160a-clearfog-itx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
10 #include "fsl-lx2160a-cex7.dtsi"
11 #include <dt-bindings/input/linux-event-codes.h>
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
28 linux,can-disable;
34 sfp0: sfp-0 {
36 i2c-bus = <&sfp0_i2c>;
[all …]
H A Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2019-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
27 stdout-path = "serial0:115200n8";
40 mmc-hs200-1_8v;
41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
[all …]
H A Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2018-2020 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]

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