Searched +full:rxc +full:- +full:inverse (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | mediatek,star-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 14 It's compliant with 802.3 standards and supports half- and full-duplex 15 modes with flow-control as well as CRC offloading and VLAN tags. 18 - $ref: ethernet-controller.yaml# 23 - mediatek,mt8516-eth 24 - mediatek,mt8518-eth [all …]
|
H A D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biao Huang <biao.huang@mediatek.com> 21 - mediatek,mt2712-gmac 22 - mediatek,mt8188-gmac 23 - mediatek,mt8195-gmac 25 - compatible 28 - $ref: snps,dwmac.yaml# [all …]
|
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/ |
H A D | dwmac-mediatek.c | 1 // SPDX-License-Identifier: GPL-2.0 114 int rmii_clk_from_mac = plat->rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0; in mt2712_set_interface() 115 int rmii_rxc = plat->rmii_rxc ? RMII_CLK_SRC_RXC : 0; in mt2712_set_interface() 119 switch (plat->phy_mode) { in mt2712_set_interface() 133 dev_err(plat->dev, "phy interface not supported\n"); in mt2712_set_interface() 134 return -EINVAL; in mt2712_set_interface() 137 regmap_write(plat->peri_regmap, PERI_ETH_PHY_INTF_SEL, intf_val); in mt2712_set_interface() 144 struct mac_delay_struct *mac_delay = &plat->mac_delay; in mt2712_delay_ps2stage() 146 switch (plat->phy_mode) { in mt2712_delay_ps2stage() 150 mac_delay->tx_delay /= 550; in mt2712_delay_ps2stage() [all …]
|
/openbmc/linux/drivers/net/ethernet/mediatek/ |
H A D | mtk_star_emac.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/dma-mapping.h> 77 /* Flow-Control Configuration Register */ 133 /* Delay-Macro Register */ 201 * reuse the same structure for both TX and RX - the layout is the same, only 291 return priv->ndev->dev.parent; in mtk_star_get_dev() 305 ring->descs = descs; in mtk_star_ring_init() 306 ring->head = 0; in mtk_star_ring_init() 307 ring->tail = 0; in mtk_star_ring_init() 313 struct mtk_star_ring_desc *desc = &ring->descs[ring->tail]; in mtk_star_ring_pop_tail() [all …]
|