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/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
28 no-map;
31 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
32 compatible = "shared-dma-pool";
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H A Dk3-j784s4-evm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "k3-j784s4.dtsi"
15 compatible = "ti,j784s4-evm", "ti,j784s4";
19 stdout-path = "serial2:115200n8";
39 reserved_memory: reserved-memory {
40 #address-cells = <2>;
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H A Dk3-am642-tqma64xxl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
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H A Dk3-j7200-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200.dtsi"
18 reserved_memory: reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
26 no-map;
29 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
30 compatible = "shared-dma-pool";
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H A Dk3-j721e-beagleboneai64.dts1 // SPDX-License-Identifier: GPL-2.0
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include "k3-j721e.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
16 #include <dt-bindings/phy/phy-cadence.h>
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H A Dk3-j721e-sk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
16 compatible = "ti,j721e-sk", "ti,j721e";
29 stdout-path = "serial2:115200n8";
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H A Dk3-am642-sk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/leds/common.h>
12 #include "k3-am642.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,am642-sk", "ti,am642";
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H A Dk3-am642-evm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include "k3-am642.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,am642-evm", "ti,am642";
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/openbmc/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2500usb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
238 * ACK_TIMEOUT: ACK Timeout in unit of 1-us.
248 * TXRX_CSR2: RX control.
249 * DISABLE_RX: Disable rx engine.
271 * RX BBP ID registers
272 * TXRX_CSR3: CCK RX BBP ID.
273 * TXRX_CSR4: OFDM RX BBP ID.
315 * TXRX_CSR9: TX ACK time-out.
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H A Drt73usb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
27 * Default offset is required for RSSI <-> dBm conversion.
76 * 16 entries 32-byte for shared key table
77 * 64 entries 32-byte for pairwise key table
78 * 64 entries 8-byte for pairwise ta key table
113 * On-chip BEACON frame space.
159 * to determine the UNICAST_TO_ME bit for RX frames.
182 * when determining the MY_BSS of RX frames.
183 * 0: 1-BSSID mode (BSS index = 0)
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H A Drt61pci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
34 * Default offset is required for RSSI <-> dBm conversion.
121 * 16 entries 32-byte for shared key table
122 * 64 entries 32-byte for pairwise key table
123 * 64 entries 8-byte for pairwise ta key table
152 * Other on-chip shared memory space.
164 * On-chip BEACON frame space.
175 * HOST-MCU shared memory.
179 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
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/openbmc/linux/Documentation/virt/kvm/
H A Dppc-pv.rst1 .. SPDX-License-Identifier: GPL-2.0
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
43 r0 - volatile
53 r12 - volatile
56 Hypercall definitions are shared in generic code, so the same hypercall numbers
73 To enable communication between the hypervisor and guest there is a new shared
75 map this shared page using the KVM hypercall KVM_HC_PPC_MAP_MAGIC_PAGE.
80 applicable to the target. For now, we always map the page to -4096. This way we
84 ld rX, -4096(0)
133 - MSR_EE
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/openbmc/linux/drivers/firmware/arm_scmi/
H A Dshmem.c1 // SPDX-License-Identifier: GPL-2.0
3 * For transport using shared mem structure.
13 #include <asm-generic/bug.h>
43 * until it releases the shared memory, otherwise we may endup in shmem_tx_prepare()
44 * overwriting its response with new message payload or vice-versa. in shmem_tx_prepare()
46 * not to bail-out on intermittent issues where the platform is in shmem_tx_prepare()
49 * Note that after a timeout is detected we bail-out and carry on but in shmem_tx_prepare()
54 stop = ktime_add_ms(ktime_get(), 2 * cinfo->rx_timeout_ms); in shmem_tx_prepare()
55 spin_until_cond((ioread32(&shmem->channel_status) & in shmem_tx_prepare()
58 if (!(ioread32(&shmem->channel_status) & in shmem_tx_prepare()
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/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Divc.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 * Tegra IVC is a communication protocol that transfers fixed-size frames
13 * bi-directionally and in-order between the local CPU and some remote entity.
14 * Communication is via a statically sized and allocated buffer in shared
17 * This API handles all aspects of the shared memory buffer's metadata, and
19 * typically contain some higher-level protocol. The notification mechanism is
23 * The client model is to first find some free (for TX) or filled (for RX)
33 * struct tegra_ivc - In-memory shared memory layout.
40 * struct tegra_ivc - Software state of an IVC channel.
48 * rx_channel - Pointer to the shared memory region used to receive
[all …]
/openbmc/linux/drivers/net/vmxnet3/
H A Dvmxnet3_ethtool.c4 * Copyright (C) 2008-2022, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
89 { "Rx Queue#", 0 },
90 { " LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
91 { " LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
92 { " ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
93 { " ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
94 { " mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
95 { " mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
[all …]
H A Dvmxnet3_drv.c4 * Copyright (C) 2008-2022, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
77 for (i = 0; i < adapter->intr.num_intrs; i++) in vmxnet3_enable_all_intrs()
80 !adapter->queuesExtEnabled) { in vmxnet3_enable_all_intrs()
81 adapter->shared->devRead.intrConf.intrCtrl &= in vmxnet3_enable_all_intrs()
84 adapter->shared->devReadExt.intrConfExt.intrCtrl &= in vmxnet3_enable_all_intrs()
96 !adapter->queuesExtEnabled) { in vmxnet3_disable_all_intrs()
97 adapter->shared->devRead.intrConf.intrCtrl |= in vmxnet3_disable_all_intrs()
100 adapter->shared->devReadExt.intrConfExt.intrCtrl |= in vmxnet3_disable_all_intrs()
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
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/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "DEC - Tulip devices"
70 bool "Use PCI shared mem for NIC registers"
73 Use PCI shared memory for the NIC registers, rather than going through
79 bool "Use RX polling (NAPI)"
86 If your estimated Rx load is 10kpps or more, or if the card will be
96 Use HW to reduce RX interrupts. Not strictly necessary since NAPI
97 reduces RX interrupts by itself. Interrupt mitigation reduces RX
114 the TX9882 chip on the Compex RL100-ATX board.
147 It should work with most DEC 21*4*-based chips/ethercards, as well
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/openbmc/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
5 * Shared functions for accessing and configuring the MAC
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
90 * @hw: Struct containing variables accessed by shared code
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
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/openbmc/u-boot/doc/device-tree-bindings/firmware/
H A Dnvidia,tegra186-bpmp.txt11 - name : Should be bpmp
12 - compatible
15 - "nvidia,tegra186-bpmp"
16 - mboxes : The phandle of mailbox controller and the mailbox specifier.
17 - shmem : List of the phandle of the TX and RX shared memory area that
19 - #clock-cells : Should be 1.
20 - #power-domain-cells : Should be 1.
21 - #reset-cells : Should be 1.
27 - .../mailbox/mailbox.txt
28 - .../mailbox/nvidia,tegra186-hsp.txt
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra72-evm-revc.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
5 #include "dra72-evm-common.dtsi"
6 #include "dra72x-mmc-iodelay.dtsi"
7 #include <dt-bindings/net/ti-dp83867.h>
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "shared-dma-pool";
30 compatible = "shared-dma-pool";
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
30 /* unused shared irq for all channels */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
[all …]
/openbmc/linux/include/linux/hsi/
H A Dhsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
36 HSI_ARB_RR, /* Round-robin arbitration */
58 * struct hsi_channel - channel resource used by the hsi clients
68 * struct hsi_config - Configuration for RX/TX HSI modules
74 * @flow: RX flow type (SYNCHRONIZED or PIPELINE)
84 unsigned int flow; /* RX only */
90 * struct hsi_board_info - HSI client board info
95 * @rx_cfg: HSI RX configuration
97 * @archdata: Architecture-dependent device data
121 * struct hsi_client - HSI client attached to an HSI port
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/openbmc/linux/Documentation/networking/
H A Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
[all …]
/openbmc/linux/drivers/net/ethernet/toshiba/
H A Dps3_gelic_net.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
64 /* RX descriptor data_status bits */
93 /* RX descriptor data error bits */
114 /* DMA command and status (RX and TX)*/
117 GELIC_DESCR_DMA_BUFFER_FULL = 0x00000000, /* used in rx */
118 GELIC_DESCR_DMA_RESPONSE_ERROR = 0x10000000, /* used in rx, tx */
119 GELIC_DESCR_DMA_PROTECTION_ERROR = 0x20000000, /* used in rx, tx */
120 GELIC_DESCR_DMA_FRAME_END = 0x40000000, /* used in rx */
121 GELIC_DESCR_DMA_FORCE_END = 0x50000000, /* used in rx, tx */
122 GELIC_DESCR_DMA_CARDOWNED = 0xa0000000, /* used in rx, tx */
[all …]

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