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/openbmc/openbmc/meta-bytedance/meta-g220a/recipes-phosphor/console/obmc-console/
H A Dobmc-console@.service7 …sh -c 'echo -n "uart3" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/uart1'
8 …sh -c 'echo -n "uart1" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/uart3'
9 …n/sh -c 'echo -n "io1" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/uart4'
10 …n/sh -c 'echo -n "uart4" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/io1'
12 …n/sh -c 'echo -n "io1" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/uart1'
13 …n/sh -c 'echo -n "io3" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/uart3'
14 …n/sh -c 'echo -n "io4" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/uart4'
15 …n/sh -c 'echo -n "uart1" > /sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing/io1'
/openbmc/openbmc/meta-nvidia/meta-nvl32-obmc/recipes-phosphor/console/obmc-console/
H A Dobmc-console@.service7 …sh -c 'echo -n "uart4" > /sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing/uart1'
8 …sh -c 'echo -n "uart1" > /sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing/uart4'
10 …n/sh -c 'echo -n "io1" > /sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing/uart1'
11 …n/sh -c 'echo -n "io4" > /sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing/uart4'
/openbmc/u-boot/doc/device-tree-bindings/misc/
H A Dintel-lpc.txt15 - intel,gpi-routing : Specifies the GPI routing. There are 16 cells, valid
20 - intel,pirq-routing : Speciffies the routing IRQ number for each of PIRQA-H,
38 PIRQ[n]_ROUT[7] - PIRQ Routing Control
51 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
54 * GPI routing
60 intel,gpi-routing = <0 0 0 0 0 0 0 2
H A Dintel,irq-router.txt11 - intel,pirq-config : Specifies the IRQ routing register programming mechanism.
13 "pci": IRQ routing is controlled by PCI configuration registers
14 "ibase": IRQ routing is in the memory-mapped IBASE register block
23 first cell is the register offset that controls the first PIRQ link routing.
25 - intel,pirq-regmap : Specifies PIRQ routing register offset of all PIRQ links,
27 number (0 for PIRQA, 1 for PIRQB, etc). The second cell is the PIRQ routing
33 - intel,pirq-routing : Specifies all PCI devices' IRQ routing information,
51 intel,pirq-routing = <
/openbmc/u-boot/arch/x86/include/asm/
H A Dpirq_routing.h19 * CAUTION: If you change this, PIRQ routing will not work correctly.
120 * of which is defined in PIRQ routing table spec and PCI BIOS spec.
129 * copy_pirq_routing_table() - Copy a PIRQ routing table
131 * This helper function copies the given PIRQ routing table to a given address.
132 * Before copying, it does several sanity tests against the PIRQ routing table.
134 * boundary to meet the PIRQ routing table spec requirements.
136 * @addr: address to store the copied PIRQ routing table
137 * @rt: pointer to the PIRQ routing table to copy from
138 * @return: end address of the copied PIRQ routing table
H A Dtables.h49 * This writes x86 configuration tables, including PIRQ routing table,
56 * write_pirq_routing_table() - Write PIRQ routing table
58 * This writes PIRQ routing table at a given address.
60 * @start: start address to write PIRQ routing table
61 * @return: end address of PIRQ routing table
H A Dirq.h15 * so far. On most cases, the IRQ routing configuraiton is controlled by PCI
17 * On some newer platforms like BayTrail and Braswell, the IRQ routing is now
38 * @has_regmap: has mapping table between PIRQ link and routing register offset
/openbmc/u-boot/arch/x86/include/asm/acpi/
H A Dirqroute.asl14 * routing via the i8259 interrupt controller or the APIC.
21 /* Remember the OS' IRQ routing choice */
25 /* PCI interrupt routing */
43 /* PCIe downstream ports interrupt routing */
/openbmc/openbmc/meta-ufispace/meta-ncplite/recipes-phosphor/console/
H A Dobmc-console_%.bbappend3 SRC_URI:append = " file://uart-routing.sh \
13 install -m 0755 ${UNPACKDIR}/uart-routing.sh -D ${D}${sbindir}/uart-routing.sh
/openbmc/openbmc/meta-ufispace/meta-ncplite/recipes-phosphor/console/obmc-console/
H A Duse-socket.conf.in2 ExecStartPre=/usr/sbin/uart-routing.sh init
4 ExecStopPost=/usr/sbin/uart-routing.sh reset
H A Duart-routing.sh13 UART_ROUTING_SYSFS="/sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing"
/openbmc/openbmc/meta-facebook/meta-harma/recipes-phosphor/console/obmc-console/
H A Dsetup-uart-routing4 echo -ne "$1" > /sys/devices/platform/ahb/1e780000.apb/1e789000.lpc/1e789098.uart-routing/"$2"
5 echo -ne "$2" > /sys/devices/platform/ahb/1e780000.apb/1e789000.lpc/1e789098.uart-routing/"$1"
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/smcroute/
H A Dsmcroute_2.5.7.bb1 SUMMARY = "Static Multicast Routing Daemon"
2 DESCRIPTION = "SMCRoute is a daemon and command line tool to manipulate the multicast routing table…
/openbmc/openbmc/meta-yadro/meta-vegman/recipes-phosphor/console/obmc-console/
H A Duart-remapping.sh14 UART_ROUTING_PATH="/sys/bus/platform/drivers/aspeed-uart-routing/1e78909c.uart-routing"
/openbmc/u-boot/arch/x86/cpu/
H A Dirq.c20 * pirq_reg_to_linkno() - Convert a PIRQ routing register offset to link number
23 * @reg: PIRQ routing register offset from the base address
49 * pirq_linkno_to_reg() - Convert a PIRQ link number to routing register offset
53 * @return: PIRQ routing register offset from the base address
246 cell = fdt_getprop(blob, node, "intel,pirq-routing", &len); in create_pirq_routing_table()
293 * routing information in the device tree. in create_pirq_routing_table()
297 debug("WARNING: Inconsistent PIRQ routing information\n"); in create_pirq_routing_table()
340 debug("Failed to create pirq routing table\n"); in irq_router_probe()
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-protocols/babeld/
H A Dbabeld_1.13.1.bb1 SUMMARY = "Babel is a loop-avoiding distance-vector routing protocol"
3 Babel is a loop-avoiding distance-vector routing protocol for IPv6 and \
/openbmc/qemu/include/hw/ppc/
H A Dpnv_lpc.h94 * drive PSI SERIRQ irqs, routing according to OPB routing registers.
101 /* P9 serirq lines and irq routing table */
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Diomux.h21 * - Each pad can have but not necessarily does have an output routing register
23 * - Each pad can have but not necessarily does have an input routing register
28 * have) and put the optional i/o routing registers into additional
/openbmc/qemu/include/hw/intc/
H A Dbcm2836_control.h38 /* interrupt routing/control registers */
52 /* interrupt source registers, post-routing (also input-derived; visible) */
/openbmc/bmcweb/http/
H A Dapp.hpp11 #include "routing.hpp"
12 #include "routing/dynamicrule.hpp"
172 BMCWEB_LOG_DEBUG("Routing:"); in debugPrint()
/openbmc/qemu/hw/intc/
H A Darm_gicv3_dist.c309 /* This GIC implementation always has affinity routing enabled, in gicd_readb()
329 /* This GIC implementation always has affinity routing enabled, in gicd_writeb()
388 * NS affinity routing is enabled, otherwise RES0 in gicd_readl()
390 * NS affinity routing is not enabled, otherwise RES0 in gicd_readl()
391 * Since for QEMU affinity routing is always enabled in gicd_readl()
410 * LPIS == 1 (LPIs are supported if affinity routing is enabled) in gicd_readl()
500 /* RAZ/WI since affinity routing is always enabled */ in gicd_readl()
568 /* RAZ/WI since affinity routing is always enabled */ in gicd_readl()
619 * ARE is RAO/WI (affinity routing always on), and only in gicd_writel()
626 * ARE_NS and ARE_S are RAO/WI (affinity routing always on) in gicd_writel()
[all …]
/openbmc/openbmc/meta-asrock/meta-e3c256d4i/recipes-phosphor/console/obmc-console/
H A Dobmc-console.conf4 aspeed-uart-routing = uart4:uart2 uart2:uart4
/openbmc/openbmc/meta-facebook/recipes-phosphor/console/obmc-console/fb-compute-singlehost/
H A Dserver.ttyS2.conf4 aspeed-uart-routing = "OBMC_SOL_ROUTING"
/openbmc/docs/designs/mctp/
H A Dmctp-userspace.md14 The MCTP core specification just provides the packetisation, routing and
22 routing of MCTP messages from external endpoints, and handling the forwarding
36 the packetisation and routing functions, between:
/openbmc/openbmc/meta-nvidia/meta-nvl32-obmc/recipes-phosphor/console/
H A Dobmc-console_%.bbappend12 # Override the obmc-console service to set UART routing

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