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/openbmc/qemu/hw/core/
H A Dloader.c24 * Gunzip functionality in this file is derived from u-boot:
28 * (C) Copyright 2000-2005
47 #include "qemu/error-report.h"
49 #include "qapi/qapi-commands-machine.h"
50 #include "qapi/type-helpers.h"
71 /* return the size or -1 if error */
78 return -1; in get_image_size()
84 /* return the size or -1 if error */
85 ssize_t load_image_size(const char *filename, void *addr, size_t size) in load_image_size() argument
92 return -1; in load_image_size()
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/openbmc/linux/Documentation/devicetree/bindings/leds/backlight/
H A Dlp855x-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lp855x-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Artur Weber <aweber.kernel@gmail.com>
15 - ti,lp8550
16 - ti,lp8551
17 - ti,lp8552
18 - ti,lp8553
19 - ti,lp8555
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/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974pro-sony-xperia-shinano-castor.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
12 chassis-type = "tablet";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
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H A Dqcom-apq8026-samsung-matisse-wifi.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "qcom-msm8226.dtsi"
12 /delete-node/ &adsp_region;
13 /delete-node/ &smem_region;
17 compatible = "samsung,matisse-wifi", "qcom,apq8026";
18 chassis-type = "tablet";
27 #address-cells = <1>;
28 #size-cells = <1>;
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/openbmc/linux/drivers/net/wireless/ath/ath6kl/
H A Dbmi.h2 * Copyright (c) 2004-2011 Atheros Communications Inc.
37 * command-specific data.
45 * BMI handles all required Target-side cache flushing.
104 * Semantics: Read a 32-bit Target SOC register.
114 * Semantics: Write a 32-bit Target SOC register.
126 * Semantics: Fetch the 4-byte Target information
141 * Semantics: Install a ROM Patch.
144 * u32 Target ROM Address
147 * u32 Activate? 1-->activate;
148 * 0-->install but do not activate
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/openbmc/qemu/hw/i386/
H A Dvapic.c2 * TPR optimization for 32-bit Windows guests (XP and Server 2003)
4 * Copyright (C) 2007-2008 Qumranet Technologies
9 * top-level directory.
19 #include "exec/address-spaces.h"
31 #define ROM_BLOCK_MASK (~(ROM_BLOCK_SIZE - 1))
63 MemoryRegion rom; member
138 cpu_physical_memory_read(s->rom_state_paddr, &s->rom_state, in read_guest_rom_state()
144 cpu_physical_memory_write(s->rom_state_paddr, &s->rom_state, in write_guest_rom_state()
152 s->rom_state.real_tpr_addr = cpu_to_le32(s->real_tpr_addr); in update_guest_rom_state()
153 s->rom_state.vcpu_shift = cpu_to_le32(VAPIC_CPU_SHIFT); in update_guest_rom_state()
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/openbmc/qemu/hw/xen/
H A Dxen_pt.c6 * the COPYING file in the top-level directory.
22 * - Set real Interrupt Disable bit to '1'.
23 * - Set machine_irq and assigned_device->machine_irq to '0'.
28 * - Set real Interrupt Disable bit to '1'.
29 * - Unmap INTx.
30 * - Decrement xen_pt_mapped_machine_irq[machine_irq]
31 * - Set assigned_device->machine_irq to '0'.
35 * - Set real bit to '0' if assigned_device->machine_irq isn't '0'.
38 * - Set real bit to '1'.
44 * - Unmap MSI.
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/openbmc/linux/drivers/video/backlight/
H A Dlp855x_bl.c1 // SPDX-License-Identifier: GPL-2.0-only
40 #define DEFAULT_BL_NAME "lcd-backlight"
81 return i2c_smbus_write_byte_data(lp->client, reg, data); in lp855x_write_byte()
89 ret = i2c_smbus_read_byte_data(lp->client, reg); in lp855x_update_bit()
91 dev_err(lp->dev, "failed to read 0x%.2x\n", reg); in lp855x_update_bit()
102 static bool lp855x_is_valid_rom_area(struct lp855x *lp, u8 addr) in lp855x_is_valid_rom_area() argument
106 switch (lp->chip_id) { in lp855x_is_valid_rom_area()
130 return addr >= start && addr <= end; in lp855x_is_valid_rom_area()
165 * d) update ROM area(optional)
171 u8 val, addr; in lp855x_configure() local
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/openbmc/qemu/hw/m68k/
H A Dmcf5208.c12 * https://www.nxp.com/docs/en/reference-manual/MCF5208RM.pdf
13 * "M5208EVB-RevB 32-bit Microcontroller User Manual"
14 * https://www.nxp.com/docs/en/reference-manual/M5208EVBUM.pdf
19 #include "qemu/error-report.h"
64 if ((s->pcsr & (PCSR_PIE | PCSR_PIF)) == (PCSR_PIE | PCSR_PIF)) in m5208_timer_update()
65 qemu_irq_raise(s->irq); in m5208_timer_update()
67 qemu_irq_lower(s->irq); in m5208_timer_update()
78 /* The PIF bit is set-to-clear. */ in m5208_timer_write()
80 s->pcsr &= ~PCSR_PIF; in m5208_timer_write()
84 if (((s->pcsr ^ value) & ~PCSR_PIE) == 0) { in m5208_timer_write()
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H A Dq800.c26 #include "qemu/guest-random.h"
30 #include "hw/or-irq.h"
37 #include "standard-headers/asm-m68k/bootinfo.h"
38 #include "standard-headers/asm-m68k/bootinfo-mac.h"
41 #include "hw/m68k/q800-glue.h"
47 #include "hw/nubus/mac-nubus-bridge.h"
53 #include "qemu/error-report.h"
66 #define IO_SLICE_MASK (IO_SLICE - 1)
95 * Slot 0x9 is reserved for use by the in-built framebuffer whilst only
111 cpu->env.aregs[7] = ldl_phys(cs->as, 0); in main_cpu_reset()
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/openbmc/qemu/include/hw/
H A Dloader.h10 * Returns the size of the image file on success, -1 otherwise.
17 * @addr: Buffer to load image into
27 * Returns the number of bytes read, or -1 on error. On error,
30 ssize_t load_image_size(const char *filename, void *addr, size_t size);
34 * @addr: Address to load the image to
41 * Returns the size of the loaded image on success, -1 otherwise.
44 hwaddr addr, uint64_t max_sz, AddressSpace *as);
54 * Returns the size of the loaded .hex file on success, -1 otherwise.
72 * The file loaded is registered as a ROM, so its contents will be
75 * Returns -1 on failure, or the size of the file.
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/openbmc/u-boot/cmd/
H A Dcbfs.c1 // SPDX-License-Identifier: GPL-2.0+
20 printf("usage: cbfsls [end of rom]>\n"); in do_cbfs_init()
26 puts("\n** Invalid end of ROM **\n"); in do_cbfs_init()
41 "[end of rom]\n"
42 " - Initialize the cbfs driver. The optional 'end of rom'\n"
43 " parameter specifies where the end of the ROM is that the\n"
56 printf("usage: cbfsload <addr> <filename> [bytes]\n"); in do_cbfs_fsload()
90 "<addr> <filename> [bytes]\n"
91 " - load binary file 'filename' from the cbfs to address 'addr'\n"
106 printf("------------------------------------------\n"); in do_cbfs_ls()
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/openbmc/linux/drivers/firmware/efi/libstub/
H A Dx86-stub.c1 // SPDX-License-Identifier: GPL-2.0-only
3 /* -----------------------------------------------------------------------
7 * ----------------------------------------------------------------------- */
22 #include "x86-stub.h"
45 struct pci_setup_rom *rom = NULL; in preserve_pci_rom_image() local
63 size = romsize + sizeof(*rom); in preserve_pci_rom_image()
66 (void **)&rom); in preserve_pci_rom_image()
68 efi_err("Failed to allocate memory for 'rom'\n"); in preserve_pci_rom_image()
72 memset(rom, 0, sizeof(*rom)); in preserve_pci_rom_image()
74 rom->data.type = SETUP_PCI; in preserve_pci_rom_image()
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/openbmc/qemu/hw/display/
H A Dcg3.c5 * Copyright (c) 2013 Mark Cave-Ayland
29 #include "qemu/error-report.h"
35 #include "hw/qdev-properties.h"
78 MemoryRegion rom; member
91 DisplaySurface *surface = qemu_console_surface(s->con); in cg3_update_display()
103 width = s->width; in cg3_update_display()
104 height = s->height; in cg3_update_display()
106 y_start = -1; in cg3_update_display()
107 pix = memory_region_get_ram_ptr(&s->vram_mem); in cg3_update_display()
110 if (!s->full_update) { in cg3_update_display()
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H A Dqxl.c29 #include "qemu/main-loop.h"
31 #include "hw/qdev-properties.h"
40 uint32_t cons = (r)->cons & SPICE_RING_INDEX_MASK(r); \
41 if (cons >= ARRAY_SIZE((r)->items)) { \
43 "%u >= %zu", cons, ARRAY_SIZE((r)->items)); \
46 ret = &(r)->items[cons].el; \
51 #define ALIGN(a, b) (((a) + ((b) - 1)) & ~((b) - 1))
128 trace_qxl_set_guest_bug(qxl->id); in qxl_set_guest_bug()
130 qxl->guest_bug = 1; in qxl_set_guest_bug()
131 if (qxl->guestdebug) { in qxl_set_guest_bug()
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H A Dtcx.c4 * Copyright (c) 2003-2005 Fabrice Bellard
31 #include "hw/qdev-properties.h"
34 #include "qemu/error-report.h"
58 #define TYPE_TCX "sun-tcx"
69 MemoryRegion rom; member
99 static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) in tcx_set_dirty() argument
101 memory_region_set_dirty(&s->vram_mem, addr, len); in tcx_set_dirty()
103 if (s->depth == 24) { in tcx_set_dirty()
104 memory_region_set_dirty(&s->vram_mem, s->vram24_offset + addr * 4, in tcx_set_dirty()
106 memory_region_set_dirty(&s->vram_mem, s->cplane_offset + addr * 4, in tcx_set_dirty()
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/openbmc/qemu/hw/arm/
H A Dfsl-imx31.c2 * Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net>
6 * Based on hw/arm/fsl-imx31.c
24 #include "hw/arm/fsl-imx31.h"
26 #include "exec/address-spaces.h"
27 #include "hw/qdev-properties.h"
29 #include "target/arm/cpu-qom.h"
36 object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm1136")); in fsl_imx31_init()
38 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); in fsl_imx31_init()
40 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX31_CCM); in fsl_imx31_init()
43 object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL); in fsl_imx31_init()
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H A Ddigic_boards.c30 #include "qemu/error-report.h"
55 if (machine->ram_size != mc->default_ram_size) { in digic4_board_init()
56 char *sz = size_to_str(mc->default_ram_size); in digic4_board_init()
67 memory_region_add_subregion(get_system_memory(), 0, machine->ram); in digic4_board_init()
69 if (board->add_rom0) { in digic4_board_init()
70 board->add_rom0(s, DIGIC4_ROM0_BASE, in digic4_board_init()
71 machine->firmware ?: board->rom0_def_filename); in digic4_board_init()
74 if (board->add_rom1) { in digic4_board_init()
75 board->add_rom1(s, DIGIC4_ROM1_BASE, in digic4_board_init()
76 machine->firmware ?: board->rom1_def_filename); in digic4_board_init()
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H A Dfsl-imx25.c2 * Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net>
6 * Based on hw/arm/xlnx-zynqmp.c
27 #include "hw/arm/fsl-imx25.h"
29 #include "hw/qdev-properties.h"
31 #include "target/arm/cpu-qom.h"
40 object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926")); in fsl_imx25_init()
42 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); in fsl_imx25_init()
44 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX25_CCM); in fsl_imx25_init()
47 object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL); in fsl_imx25_init()
51 object_initialize_child(obj, "gpt[*]", &s->gpt[i], TYPE_IMX25_GPT); in fsl_imx25_init()
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/openbmc/linux/drivers/zorro/
H A Dzorro.c4 * Copyright (C) 1995-2003 Geert Uytterhoeven
19 #include <linux/dma-mapping.h>
62 if (id == ZORRO_WILDCARD || id == z->id) in zorro_find_device()
72 * (128 chunks, physical 0x00200000-0x009fffff).
78 * - z2ram device
79 * - SCSI DMA bounce buffers
100 start = start < Z2RAM_START ? 0x00000000 : start-Z2RAM_START; in mark_region()
101 end = end > Z2RAM_END ? Z2RAM_SIZE : end-Z2RAM_START; in mark_region()
119 for (i = 0; i < bridge->num_resources; i++) { in zorro_find_parent_resource()
120 struct resource *r = &bridge->resource[i]; in zorro_find_parent_resource()
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/openbmc/qemu/hw/vfio/
H A Digd.c10 * the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
29 * "Universal Pass-Through" mode, or UPT. Theoretically in UPT mode, nothing
38 * at PCI address 00:02.0, it must have a ROM, it very likely needs VGA
46 * NB - It is possible to enable physical outputs in UPT mode by supplying
57 * supportable, some of them don't even support VT-d.
62 if ((vdev->device_id & 0xfff) == 0xa84) { in igd_gen()
66 switch (vdev->device_id & 0xff00) { in igd_gen()
76 return -1; in igd_gen()
106 return -1; in igd_gen()
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H A Dpci.h2 * vfio based device assignment support - PCI devices
4 * Copyright Red Hat, Inc. 2012-2015
10 * the COPYING file in the top-level directory.
17 #include "hw/vfio/vfio-common.h"
31 hwaddr addr; member
80 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
87 * for interrupts injected via QEMU. This is typically the non-accel path,
108 /* Cache of MSI-X setup */
119 #define TYPE_VFIO_PCI "vfio-pci"
127 uint8_t *emulated_config_bits; /* QEMU emulated bits, little-endian */
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/openbmc/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_mmio.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
29 IPC_MEM_DEVICE_IPC_INVALID = -1
32 /* Boot ROM exit status. */
68 * struct iosm_mmio - MMIO region mapped to the doorbell scratchpad.
94 * ipc_mmio_init - Allocate mmio instance data
103 * ipc_mmio_set_psi_addr_and_size - Set start address and size of the
107 * @addr: PSI address
110 void ipc_mmio_set_psi_addr_and_size(struct iosm_mmio *ipc_mmio, dma_addr_t addr,
114 * ipc_mmio_set_contex_info_addr - Stores the Context Info Address in
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/openbmc/qemu/hw/pci/
H A Dpci.c33 #include "hw/qdev-properties.h"
34 #include "hw/qdev-properties-system.h"
35 #include "migration/qemu-file-types.h"
42 #include "qemu/error-report.h"
51 #include "pci-internal.h"
84 DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
90 DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present,
92 DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present,
96 DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0),
97 DEFINE_PROP_BIT("x-pcie-err-unc-mask", PCIDevice, cap_present,
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/openbmc/u-boot/include/linux/
H A Dioport.h15 * Resources are tree-like, allowing
35 #define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
100 /* PCI ROM control bits (IORESOURCE_BITS) */
101 #define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */
102 #define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */
103 #define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */
104 #define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */
106 /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */
109 /* PC/ISA/whatever - the normal PC address spaces: IO and memory */
131 return res->end - res->start + 1; in resource_size()
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