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Searched full:ref_clk (Results 1 – 25 of 213) sorted by relevance

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/openbmc/linux/drivers/phy/broadcom/
H A Dphy-bcm-ns-usb2.c23 struct clk *ref_clk; member
39 err = clk_prepare_enable(usb2->ref_clk); in bcm_ns_usb2_phy_init()
45 ref_clk_rate = clk_get_rate(usb2->ref_clk); in bcm_ns_usb2_phy_init()
89 clk_disable_unprepare(usb2->ref_clk); in bcm_ns_usb2_phy_init()
133 usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk"); in bcm_ns_usb2_probe()
134 if (IS_ERR(usb2->ref_clk)) { in bcm_ns_usb2_probe()
135 dev_err_probe(dev, PTR_ERR(usb2->ref_clk), "failed to get ref clk\n"); in bcm_ns_usb2_probe()
136 return PTR_ERR(usb2->ref_clk); in bcm_ns_usb2_probe()
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dnxp,tja11xx.yaml37 The REF_CLK is provided for both transmitted and received data
41 connected to pin REF_CLK. A third option is to connect a 25MHz
42 clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
44 If present, indicates that the REF_CLK will be configured as
46 If not present, the REF_CLK will be configured as interface
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dcirrus,cs2000-cp.yaml25 Common clock binding for CLK_IN, XTI/REF_CLK
31 - const: ref_clk
44 - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_clk input
61 output signal directly from the REF_CLK input.
87 clock-names = "clk_in", "ref_clk";
/openbmc/linux/drivers/clk/imx/
H A Dclk-pllv2.c81 long mfi, mfn, mfd, pdf, ref_clk; in __clk_pllv2_recalc_rate() local
94 ref_clk = 2 * parent_rate; in __clk_pllv2_recalc_rate()
96 ref_clk *= 2; in __clk_pllv2_recalc_rate()
98 ref_clk /= (pdf + 1); in __clk_pllv2_recalc_rate()
99 temp = (u64) ref_clk * abs(mfn); in __clk_pllv2_recalc_rate()
102 temp = (ref_clk * mfi) - temp; in __clk_pllv2_recalc_rate()
104 temp = (ref_clk * mfi) + temp; in __clk_pllv2_recalc_rate()
/openbmc/linux/drivers/clk/
H A Dclk-cs2000-cp.c75 #define REF_CLK 1 macro
106 struct clk *ref_clk; member
425 * In static mode, CLK_IN is ignored, so we return REF_CLK instead. in cs2000_get_parent()
427 return priv->dynamic_mode ? CLK_IN : REF_CLK; in cs2000_get_parent()
442 struct clk *clk_in, *ref_clk; in cs2000_clk_get() local
449 ref_clk = devm_clk_get(dev, "ref_clk"); in cs2000_clk_get()
451 if (IS_ERR(ref_clk)) in cs2000_clk_get()
455 priv->ref_clk = ref_clk; in cs2000_clk_get()
486 ref_clk_rate = clk_get_rate(priv->ref_clk); in cs2000_clk_register()
506 parent_names[REF_CLK] = __clk_get_name(priv->ref_clk); in cs2000_clk_register()
/openbmc/linux/drivers/phy/hisilicon/
H A Dphy-hisi-inno-usb2.c52 struct clk *ref_clk; member
100 ret = clk_prepare_enable(priv->ref_clk); in hisi_inno_phy_init()
124 clk_disable_unprepare(priv->ref_clk); in hisi_inno_phy_exit()
155 priv->ref_clk = devm_clk_get(dev, NULL); in hisi_inno_phy_probe()
156 if (IS_ERR(priv->ref_clk)) in hisi_inno_phy_probe()
157 return PTR_ERR(priv->ref_clk); in hisi_inno_phy_probe()
H A Dphy-histb-combphy.c48 struct clk *ref_clk; member
121 ret = clk_prepare_enable(priv->ref_clk); in histb_combphy_init()
154 clk_disable_unprepare(priv->ref_clk); in histb_combphy_exit()
244 priv->ref_clk = devm_clk_get(dev, NULL); in histb_combphy_probe()
245 if (IS_ERR(priv->ref_clk)) { in histb_combphy_probe()
247 return PTR_ERR(priv->ref_clk); in histb_combphy_probe()
/openbmc/linux/drivers/gpu/drm/mgag200/
H A Dmgag200_g200.c83 long ref_clk = g200->ref_clk; in mgag200_g200_pixpllc_atomic_check() local
106 computed = ref_clk * (testn + 1) / (testm + 1); in mgag200_g200_pixpllc_atomic_check()
118 f_vco = ref_clk * n / m; in mgag200_g200_pixpllc_atomic_check()
341 g200->ref_clk = 14318; in mgag200_g200_interpret_bios()
347 g200->ref_clk = 14318; in mgag200_g200_interpret_bios()
356 g200->ref_clk = 14318; in mgag200_g200_interpret_bios()
374 g200->ref_clk = 27050; in mgag200_g200_init_refclk()
388 drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n", in mgag200_g200_init_refclk()
389 g200->pclk_min, g200->pclk_max, g200->ref_clk); in mgag200_g200_init_refclk()
/openbmc/linux/drivers/phy/samsung/
H A Dphy-samsung-usb2.c36 ret = clk_prepare_enable(drv->ref_clk); in samsung_usb2_phy_power_on()
50 clk_disable_unprepare(drv->ref_clk); in samsung_usb2_phy_power_on()
75 clk_disable_unprepare(drv->ref_clk); in samsung_usb2_phy_power_off()
199 drv->ref_clk = devm_clk_get(dev, "ref"); in samsung_usb2_phy_probe()
200 if (IS_ERR(drv->ref_clk)) { in samsung_usb2_phy_probe()
202 return PTR_ERR(drv->ref_clk); in samsung_usb2_phy_probe()
205 drv->ref_rate = clk_get_rate(drv->ref_clk); in samsung_usb2_phy_probe()
/openbmc/linux/include/linux/platform_data/
H A Dnet-cw1200.h13 u16 ref_clk; /* REQUIRED (in KHz) */ member
28 u16 ref_clk; /* REQUIRED (in KHz) */ member
48 .ref_clk = 38400,
71 .ref_clk = 38400,
/openbmc/linux/drivers/rtc/
H A Drtc-cadence.c82 struct clk *ref_clk; member
281 crtc->ref_clk = devm_clk_get(&pdev->dev, "ref_clk"); in cdns_rtc_probe()
282 if (IS_ERR(crtc->ref_clk)) { in cdns_rtc_probe()
283 ret = PTR_ERR(crtc->ref_clk); in cdns_rtc_probe()
302 ret = clk_prepare_enable(crtc->ref_clk); in cdns_rtc_probe()
309 ref_clk_freq = clk_get_rate(crtc->ref_clk); in cdns_rtc_probe()
349 clk_disable_unprepare(crtc->ref_clk); in cdns_rtc_probe()
365 clk_disable_unprepare(crtc->ref_clk); in cdns_rtc_remove()
/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-snps-eusb2.c128 struct clk *ref_clk; member
191 unsigned long ref_clk_freq = clk_get_rate(phy->ref_clk); in qcom_eusb2_ref_clk_init()
248 ret = clk_prepare_enable(phy->ref_clk); in qcom_snps_eusb2_hsphy_init()
284 /* update ref_clk related registers */ in qcom_snps_eusb2_hsphy_init()
339 clk_disable_unprepare(phy->ref_clk); in qcom_snps_eusb2_hsphy_init()
351 clk_disable_unprepare(phy->ref_clk); in qcom_snps_eusb2_hsphy_exit()
389 phy->ref_clk = devm_clk_get(dev, "ref"); in qcom_snps_eusb2_hsphy_probe()
390 if (IS_ERR(phy->ref_clk)) in qcom_snps_eusb2_hsphy_probe()
391 return dev_err_probe(dev, PTR_ERR(phy->ref_clk), in qcom_snps_eusb2_hsphy_probe()
H A Dphy-qcom-ipq806x-usb.c122 struct clk *ref_clk; member
262 ret = clk_prepare_enable(phy_dwc3->ref_clk); in qcom_ipq806x_usb_hs_phy_init()
295 clk_disable_unprepare(phy_dwc3->ref_clk); in qcom_ipq806x_usb_hs_phy_exit()
311 ret = clk_prepare_enable(phy_dwc3->ref_clk); in qcom_ipq806x_usb_ss_phy_init()
448 clk_disable_unprepare(phy_dwc3->ref_clk); in qcom_ipq806x_usb_ss_phy_exit()
509 phy_dwc3->ref_clk = devm_clk_get(phy_dwc3->dev, "ref"); in qcom_ipq806x_usb_phy_probe()
510 if (IS_ERR(phy_dwc3->ref_clk)) { in qcom_ipq806x_usb_phy_probe()
512 return PTR_ERR(phy_dwc3->ref_clk); in qcom_ipq806x_usb_phy_probe()
515 clk_set_rate(phy_dwc3->ref_clk, data->clk_rate); in qcom_ipq806x_usb_phy_probe()
/openbmc/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy_8996.c103 static inline u32 pll_get_cpctrl(u64 frac_start, unsigned long ref_clk, in pll_get_cpctrl() argument
107 return (11000000 / (ref_clk / 20)); in pll_get_cpctrl()
128 static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk, in pll_get_integloop_gain() argument
135 base = (64 * ref_clk) / HDMI_DEFAULT_REF_CLOCK; in pll_get_integloop_gain()
137 base = (1022 * ref_clk) / 100; in pll_get_integloop_gain()
144 static inline u32 pll_get_pll_cmp(u64 fdata, unsigned long ref_clk) in pll_get_pll_cmp() argument
147 u32 divisor = ref_clk * 10; in pll_get_pll_cmp()
157 static inline u64 pll_cmp_to_fdata(u32 pll_cmp, unsigned long ref_clk) in pll_cmp_to_fdata() argument
159 u64 fdata = ((u64)pll_cmp) * ref_clk * 10; in pll_cmp_to_fdata()
218 static int pll_calculate(unsigned long pix_clk, unsigned long ref_clk, in pll_calculate() argument
[all …]
/openbmc/linux/drivers/gpu/drm/rockchip/
H A Ddw_hdmi-rockchip.c78 struct clk *ref_clk; member
220 hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "ref"); in rockchip_hdmi_parse_dt()
221 if (!hdmi->ref_clk) in rockchip_hdmi_parse_dt()
222 hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "vpll"); in rockchip_hdmi_parse_dt()
224 if (PTR_ERR(hdmi->ref_clk) == -EPROBE_DEFER) { in rockchip_hdmi_parse_dt()
226 } else if (IS_ERR(hdmi->ref_clk)) { in rockchip_hdmi_parse_dt()
228 return PTR_ERR(hdmi->ref_clk); in rockchip_hdmi_parse_dt()
263 if (hdmi->ref_clk) { in dw_hdmi_rockchip_mode_valid()
264 int rpclk = clk_round_rate(hdmi->ref_clk, pclk); in dw_hdmi_rockchip_mode_valid()
306 clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000); in dw_hdmi_rockchip_encoder_mode_set()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Damlogic,g12a-usb3-pcie-phy.yaml26 - const: ref_clk
59 clocks = <&ref_clk>;
60 clock-names = "ref_clk";
H A Dsamsung,ufs-phy.yaml77 - const: ref_clk
90 - const: ref_clk
108 clock-names = "ref_clk", "rx1_symbol_clk",
/openbmc/linux/drivers/phy/mediatek/
H A Dphy-mtk-hdmi.c82 struct clk *ref_clk; in mtk_hdmi_phy_probe() local
101 ref_clk = devm_clk_get(dev, "pll_ref"); in mtk_hdmi_phy_probe()
102 if (IS_ERR(ref_clk)) in mtk_hdmi_phy_probe()
103 return dev_err_probe(dev, PTR_ERR(ref_clk), in mtk_hdmi_phy_probe()
106 ref_clk_name = __clk_get_name(ref_clk); in mtk_hdmi_phy_probe()
H A Dphy-mtk-mipi-dsi.c110 struct clk *ref_clk; in mtk_mipi_tx_probe() local
132 ref_clk = devm_clk_get(dev, NULL); in mtk_mipi_tx_probe()
133 if (IS_ERR(ref_clk)) in mtk_mipi_tx_probe()
134 return dev_err_probe(dev, PTR_ERR(ref_clk), in mtk_mipi_tx_probe()
151 ref_clk_name = __clk_get_name(ref_clk); in mtk_mipi_tx_probe()
H A Dphy-mtk-xsphy.c87 struct clk *ref_clk; /* reference clock of anolog phy */ member
314 ret = clk_prepare_enable(inst->ref_clk); in mtk_phy_init()
316 dev_err(xsphy->dev, "failed to enable ref_clk\n"); in mtk_phy_init()
330 clk_disable_unprepare(inst->ref_clk); in mtk_phy_init()
365 clk_disable_unprepare(inst->ref_clk); in mtk_phy_exit()
512 inst->ref_clk = devm_clk_get(&phy->dev, "ref"); in mtk_xsphy_probe()
513 if (IS_ERR(inst->ref_clk)) { in mtk_xsphy_probe()
514 dev_err(dev, "failed to get ref_clk(id-%d)\n", port); in mtk_xsphy_probe()
515 retval = PTR_ERR(inst->ref_clk); in mtk_xsphy_probe()
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dapple,i2c.yaml44 Allowed values are between ref_clk/(16*4) and ref_clk/(16*255).
64 clocks = <&ref_clk>;
/openbmc/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml136 - const: ref_clk
165 - const: ref_clk
199 - const: ref_clk
225 - const: ref_clk
300 "ref_clk",
/openbmc/linux/drivers/clk/baikal-t1/
H A Dclk-ccu-pll.c66 CCU_PLL_INFO(CCU_CPU_PLL, "cpu_pll", "ref_clk", CCU_CPU_PLL_BASE,
68 CCU_PLL_INFO(CCU_SATA_PLL, "sata_pll", "ref_clk", CCU_SATA_PLL_BASE,
70 CCU_PLL_INFO(CCU_DDR_PLL, "ddr_pll", "ref_clk", CCU_DDR_PLL_BASE,
72 CCU_PLL_INFO(CCU_PCIE_PLL, "pcie_pll", "ref_clk", CCU_PCIE_PLL_BASE,
74 CCU_PLL_INFO(CCU_ETH_PLL, "eth_pll", "ref_clk", CCU_ETH_PLL_BASE,
/openbmc/linux/drivers/phy/starfive/
H A Dphy-jh7110-dphy-rx.c70 struct clk *ref_clk; member
128 clk_set_rate(dphy->ref_clk, 49500000); in stf_dphy_power_on()
176 dphy->ref_clk = devm_clk_get(&pdev->dev, "ref"); in stf_dphy_probe()
177 if (IS_ERR(dphy->ref_clk)) in stf_dphy_probe()
178 return PTR_ERR(dphy->ref_clk); in stf_dphy_probe()
/openbmc/u-boot/board/k+p/kp_imx53/
H A Dkp_imx53.c130 u32 ref_clk = MXC_HCLK; in setup_clocks() local
134 ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK); in setup_clocks()
138 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); in setup_clocks()
139 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); in setup_clocks()

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