| /openbmc/u-boot/doc/ |
| H A D | README.ramboot-ppc85xx | 5 pre-mechanism is required to load the DDR with the bootloader binary.
6 - In case of SD and SPI boot this is done by BootROM code inside the chip
8 - In case of NAND boot FCM supports loading initial 4K code from NAND flash
15 1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then
18 - In very early stage of platform bringup where other boot options are not
20 - In case the support to program the flashes on the board is not available.
22 2. Load the RAM based bootloader onto DDR using already existing bootloader on
25 - While developing some new feature of u-boot, for example USB driver or
31 - Suppose a platform already has a propreitery bootloader which does not
32 support for example AMP boot. In this case also RAM boot loader can be
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| H A D | README.memory-test | 1 The most frequent cause of problems when porting U-Boot to new
8 U-Boot implements 3 different approaches to perform memory tests:
12 This function is supposed to be used in each and every U-Boot port
14 memory banks on this piece of hardware. The code is supposed to be
16 little known and generally underrated fact that this code will also
19 each and every port of U-Boot.
23 This is probably the best known memory test utility in U-Boot.
29 - It is terribly slow. Running "mtest" on the whole system RAM
33 - It is difficult to configure, and to use. And any errors here
36 purposes, like exception code, U-Boot code and data, stack,
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| H A D | README.arm-relocation | 3 At arch level: add linker flag -pie
10 (program-base-relative) and 2 (symbol-relative)
16 code to access these tables
25 detect the real dramsize, and store it in gd->ram_size. Bst detected
35 Board.c code is adapted from ppc code
41 -----------------------------------------------------------------------------
44 if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code
50 b) it copies the first page in nand to internal ram
51 (spl code)
52 c) end executes this code
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra20/ |
| H A D | emc.c | 1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch-tegra/ap.h>
10 #include <asm/arch-tegra/apb_misc.h>
94 ERR_NO_EMC_NODE = -10,
104 * Find EMC tables for the given ram code.
106 * The tegra EMC binding has two options, one using the ram code and one not.
107 * We detect which is in use by looking for the nvidia,use-ram-code property.
109 * otherwise we select the correct emc-tables subnode based on the 'ram_code'
113 * @param node EMC node (nvidia,tegra20-emc compatible string)
114 * @param ram_code RAM code to select (0-3, or -1 if unknown)
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| /openbmc/qemu/migration/ |
| H A D | postcopy-ram.h | 2 * Postcopy migration for RAM
10 * See the COPYING file in the top-level directory.
16 #include "qapi/qapi-types-migration.h"
18 /* Return true if the host supports everything we need to do postcopy-ram */
23 * Make all of RAM sensitive to accesses to areas that haven't yet been written
29 * Initialise postcopy-ram, setting the RAM to a state where we can go into
31 * called from ram.c's similarly named ram_postcopy_incoming_init
41 * Userfault requires us to mark RAM as NOHUGEPAGE prior to discard
48 * Called at the start of each RAMBlock by the bitmap code.
53 * Called by the bitmap code for each chunk to discard.
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | best-practices.rst | 8 The migration stream can be analyzed thanks to ``scripts/analyze-migration.py``.
12 .. code-block:: shell
14 $ qemu-system-x86_64 -display none -monitor stdio
17 $ ./scripts/analyze-migration.py -f mig
19 "ram (3)": {
21 "pc.ram": "0x0000000008000000",
24 See also ``analyze-migration.py -h`` help for more options.
29 Migration migrates the copies of RAM and ROM, and thus when running
34 - Changes in firmware size can cause changes in the required RAMBlock size
39 - Care should be taken with device emulation code so that newer
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| /openbmc/u-boot/lib/lzma/ |
| H A D | lzma.txt | 2 -------------
8 in 7-Zip compression program (www.7-zip.org). LZMA provides high
19 -------
23 Some code in LZMA SDK is based on public domain code from another developers:
25 2) SHA-256: Wei Dai (Crypto++ library)
29 -----------------
33 - ANSI-C/C++/C#/Java source code for LZMA compressing and decompressing
34 - Compiled file->file LZMA compressing/decompressing program for Windows system
38 ------------------
39 To compile C++ version of file->file LZMA encoding, go to directory
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | crt0_64.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * crt0 - C-runtime startup Code for AArch64 U-Boot
13 #include <asm-offsets.h>
18 * This file handles the target-independent stages of the U-Boot
19 * start-up where a C runtime environment is needed. Its entry point
27 * available RAM (SRAM, locked cache...). In this context, VARIABLE
33 * execution from system RAM (DRAM, DDR...) As system RAM may not
40 * ones allocated by board_init_f() in system RAM, but BSS and
41 * initialized non-const data are still not available.
43 * 4a.For U-Boot proper (not SPL), call relocate_code(). This function
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| H A D | crt0.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * crt0 - C-runtime startup Code for ARM U-Boot
9 #include <asm-offsets.h>
14 * This file handles the target-independent stages of the U-Boot
15 * start-up where a C runtime environment is needed. Its entry point
23 * available RAM (SRAM, locked cache...). In this context, VARIABLE
29 * execution from system RAM (DRAM, DDR...) As system RAM may not
36 * ones allocated by board_init_f() in system RAM, but BSS and
37 * initialized non-const data are still not available.
39 * 4a.For U-Boot proper (not SPL), call relocate_code(). This function
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| /openbmc/docs/architecture/code-update/ |
| H A D | code-update-deprecated.md | 1 # OpenBMC Code Update
5 - The REST APIs described below are deprecated. Please follow
6 [code-update.md](code-update.md) for the new APIs to do code update.
7 - The rest part of this document is still valid.
9 The host code update can be found here:
10 [host-code-update.md](host-code-update.md)
13 `tmp/deploy/images/<platform>/`. The `image-*` symlinks correspond to components
16 - `image-bmc` → `obmc-phosphor-image-<platform>-<timestamp>.static.mtd`
20 - `image-kernel` → `fitImage-obmc-phosphor-initramfs-<platform>.bin`
25 - `image-rofs` → `obmc-phosphor-image-<platform>.squashfs-xz`
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| /openbmc/u-boot/arch/x86/cpu/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * U-Boot - x86 Startup Code
5 * (C) Copyright 2008-2011
16 #include <asm/processor-flags.h>
17 #include <generated/generic-asm-offsets.h>
18 #include <generated/asm-offsets.h>
28 * This is the fail-safe 32-bit bootstrap entry point.
30 * This code is used when booting from another boot loader like
37 /* Turn off cache (this might require a 486-class CPU) */
43 /* Tell 32-bit code it is being entered from an in-RAM copy */
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| /openbmc/u-boot/arch/riscv/cpu/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Startup Code for RISC-V Core
12 #include <asm-offsets.h>
17 #include <generated/asm-offsets.h>
53 * Set stackpointer in internal/ex RAM to call board_init_f
56 li t0, -16
77 mv a0, zero /* a0 <-- boot_flags = 0 */
84 * This "function" does not return, instead it continues in RAM
85 * after relocating the monitor code.
100 sub t6, s4, t0 /* t6 <- relocation offset */
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| /openbmc/u-boot/board/freescale/m547xevb/ |
| H A D | README | 4 TsiChung Liew(Tsi-Chung.Liew@freescale.com)
12 - board/freescale/m547xevb/m547xevb.c Dram setup, IDE pre init, and PCI init
13 - board/freescale/m547xevb/mii.c MII init
14 - board/freescale/m547xevb/Makefile Makefile
15 - board/freescale/m547xevb/config.mk config make
16 - board/freescale/m547xevb/u-boot.lds Linker description
18 - arch/m68k/cpu/mcf547x_8x/cpu.c cpu specific code
19 - arch/m68k/cpu/mcf547x_8x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
20 - arch/m68k/cpu/mcf547x_8x/interrupts.c cpu specific interrupt support
21 - arch/m68k/cpu/mcf547x_8x/slicetimer.c Timer support
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| /openbmc/qemu/tests/functional/ |
| H A D | test_mem_addr_space.py | 11 # SPDX-License-Identifier: GPL-2.0-or-later
23 # This helper can go away when the 32-bit host deprecation
31 # Non-ELF file implies macOS or Windows which
32 # we already assume to be 64-bit only
35 # bits == 1 -> 32-bit; bits == 2 -> 64-bit
38 # 32-bit ELF builds won't be able to address sufficient
39 # RAM to run the tests
40 self.skipTest("64-bit build host is required")
42 # first, lets test some 32-bit processors.
43 # for all 32-bit cases, pci64_hole_size is 0.
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| /openbmc/u-boot/arch/m68k/cpu/mcf523x/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
29 * These vectors are to catch any un-intended traps.
46 /* TRAP #0 - #15 */
109 /* initialize general use internal ram */
119 /* setup stack initially on top of internal static ram */
126 move.l %sp, -(%sp)
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| /openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
29 * These vectors are to catch any un-intended traps.
46 /* TRAP #0 - #15 */
116 /* initialize general use internal ram */
126 /* setup stack initially on top of internal static ram */
133 move.l %sp, -(%sp)
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| /openbmc/qemu/docs/devel/ |
| H A D | secure-coding-practices.rst | 5 be aware of so that they can develop safe code and audit existing code
9 -----------------------
15 ---------------------------------
29 * Use-after-free and double-free
39 ----------------
62 unit = &mydev->unit[val]; <-- this input wasn't validated!
67 If ``val`` is not in range [0, 1] then an out-of-bounds memory access will take
68 place when ``unit`` is dereferenced. The code must check that ``val`` is 0 or
72 --------------------------
74 moments. Device emulation code must not assume that the guest follows the
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| /openbmc/u-boot/include/ |
| H A D | fsl_qe.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
6 * based on source code of Shlomi Gridish
21 #define QE_DATAONLY_SIZE (QE_MURAM_SIZE - QE_DATAONLY_BASE)
74 /* QE CECR Sub Block Code - sub block code of QE command.
108 /* QE CECR Protocol - For non-MCC, specifies mode for QE CECR command.
219 #define QE_CP_CERCR_MEE 0x8000 /* Multi-user RAM ECC enable */
220 #define QE_CP_CERCR_IEE 0x4000 /* Instruction RAM ECC enable */
221 #define QE_CP_CERCR_CIR 0x0800 /* Common instruction RAM */
223 /* I-RAM */
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| /openbmc/u-boot/arch/arm/cpu/arm720t/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * armboot - Startup Code for ARM720 CPU-core
9 #include <asm-offsets.h>
15 * Startup Code (reset vector)
17 * do important init only if we don't start from RAM!
18 * relocate armboot to ram
37 * we do sys-critical inits only at reboot,
38 * not when booting from ram!
47 /*------------------------------------------------------------------------------*/
71 * before relocating, we have to setup RAM timing
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| /openbmc/u-boot/arch/m68k/cpu/mcf530x/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
19 moveml %d0-%d7/%a0-%a6,%sp@
23 moveml %sp@,%d0-%d7/%a0-%a6;
28 /* If we come from a pre-loader we don't need an initial exception
37 * These vectors are to catch any un-intended traps.
44 .long _start - CONFIG_SYS_TEXT_BASE
110 * if we come from a pre-loader we have no exception table and
118 /* initialize general use internal ram */
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| /openbmc/u-boot/arch/m68k/cpu/mcf532x/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
6 * (C) Copyright 2004-2008 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 #include <asm-offsets.h>
21 moveml %d0-%d7/%a0-%a6,%sp@;
24 moveml %sp@,%d0-%d7/%a0-%a6; \
34 * These vectors are to catch any un-intended traps.
51 /* TRAP #0 - #15 */
124 /* initialize general use internal ram */
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| /openbmc/u-boot/test/py/ |
| H A D | u_boot_utils.py | 1 # SPDX-License-Identifier: GPL-2.0
4 # Utility code shared across multiple tests.
65 u_boot_console: A console connection to U-Boot.
160 u_boot_console: A console connection to U-Boot.
166 an error code, otherwise an exception will be raised if such
182 This runs a command and checks that it fails with the expected return code
186 u_boot_console: A console connection to U-Boot.
188 retcode: Expected non-zero return code from the command.
205 """Find the running U-Boot's RAM location.
207 Probe the running U-Boot to determine the address of the first bank
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| /openbmc/u-boot/arch/m68k/cpu/mcf52x2/ |
| H A D | start.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
19 moveml %d0-%d7/%a0-%a6,%sp@; \
22 moveml %sp@,%d0-%d7/%a0-%a6; \
26 /* If we come from a pre-loader we don't need an initial exception
35 * These vectors are to catch any un-intended traps.
40 .long _start - CONFIG_SYS_TEXT_BASE
136 * Setup code in SRAM to initialize FLASHBAR,
139 move.l #(_flashbar_setup-CONFIG_SYS_INT_FLASH_BASE), %a0
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| /openbmc/u-boot/arch/arm/mach-aspeed/ast2500/ |
| H A D | board_common.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 #include <ram.h>
64 /* X-DMA */ in isolate_bmc()
95 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_init()
98 * Loop over all MISC uclass drivers to call the comphy code in board_init()
103 /* Call the comphy code via the MISC uclass driver */ in board_init()
170 struct ram_info ram; in dram_init() local
179 ret = ram_get_info(dev, &ram); in dram_init()
185 gd->ram_size = ram.size; in dram_init()
192 * U-boot will fixup the memory node in kernel's DT. The ECC redundancy in dram_init()
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| /openbmc/qemu/docs/system/i386/ |
| H A D | xenpvh.rst | 14 -----------------
18 - RAM
19 - GPEX host bridge
20 - virtio-pci devices
22 The idea is to only connect virtio-pci devices but in theory any compatible
26 -------
28 The Xen tools will typically construct a command-line and launch QEMU
32 .. code-block:: console
34 qemu-system-i386 -xen-domid 3 -no-shutdown \
35 -chardev socket,id=libxl-cmd,path=/var/run/xen/qmp-libxl-3,server=on,wait=off \
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