Searched full:r0p1 (Results 1 – 8 of 8) sorted by relevance
20 /* r0p1 > r0p0 matches */ in test__cpuid_match()26 /* r0p0 < r0p1 doesn't match */ in test__cpuid_match()
21 Revision r0p1
26 @ - the original A9 core tile (based on ARM Cortex-A9 r0p1)
444 /* Cortex-A520 r0p0 to r0p1 */762 /* Cortex-A510 r0p0 - r0p1 */795 /* Cortex-A520 r0p0 - r0p1 */
104 * encoded by soft resetting the GPU. Only for T76X r0p0, r0p1 and
208 cpu->midr = 0x410fd221; /* r0p1 */ in cortex_m55_initfn()
512 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache682 Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with
863 instruction might deadlock. Fixed in r0p1.