xref: /openbmc/linux/arch/arm/include/debug/vexpress.S (revision d2912cb1)
1d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */
2fa04e4dbSRob Herring/* arch/arm/mach-realview/include/mach/debug-macro.S
3fa04e4dbSRob Herring *
4fa04e4dbSRob Herring * Debugging macro include header
5fa04e4dbSRob Herring *
6fa04e4dbSRob Herring *  Copyright (C) 1994-1999 Russell King
7fa04e4dbSRob Herring *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
8fa04e4dbSRob Herring */
9fa04e4dbSRob Herring
10fa04e4dbSRob Herring#define DEBUG_LL_PHYS_BASE		0x10000000
11fa04e4dbSRob Herring#define DEBUG_LL_UART_OFFSET		0x00009000
12fa04e4dbSRob Herring
13fa04e4dbSRob Herring#define DEBUG_LL_PHYS_BASE_RS1		0x1c000000
14fa04e4dbSRob Herring#define DEBUG_LL_UART_OFFSET_RS1	0x00090000
15fa04e4dbSRob Herring
16ed18bdc8SJonathan Austin#define DEBUG_LL_UART_PHYS_CRX		0xb0090000
17ed18bdc8SJonathan Austin
18fa04e4dbSRob Herring#define DEBUG_LL_VIRT_BASE		0xf8000000
19fa04e4dbSRob Herring
20fa04e4dbSRob Herring#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT)
21fa04e4dbSRob Herring
22fa04e4dbSRob Herring		.macro	addruart,rp,rv,tmp
23d892a917SArnd Bergmann		.arch   armv7-a
24fa04e4dbSRob Herring
25fa04e4dbSRob Herring		@ Make an educated guess regarding the memory map:
26852663d9SPawel Moll		@ - the original A9 core tile (based on ARM Cortex-A9 r0p1)
27852663d9SPawel Moll		@   should use UART at 0x10009000
28fa04e4dbSRob Herring		@ - all other (RS1 complaint) tiles use UART mapped
29fa04e4dbSRob Herring		@   at 0x1c090000
30852663d9SPawel Moll		mrc	p15, 0, \rp, c0, c0, 0
31852663d9SPawel Moll		movw	\rv, #0xc091
32852663d9SPawel Moll		movt	\rv, #0x410f
33852663d9SPawel Moll		cmp	\rp, \rv
34fa04e4dbSRob Herring
35fa04e4dbSRob Herring		@ Original memory map
36fa04e4dbSRob Herring		moveq	\rp, #DEBUG_LL_UART_OFFSET
37fa04e4dbSRob Herring		orreq	\rv, \rp, #DEBUG_LL_VIRT_BASE
38fa04e4dbSRob Herring		orreq	\rp, \rp, #DEBUG_LL_PHYS_BASE
39fa04e4dbSRob Herring
40fa04e4dbSRob Herring		@ RS1 memory map
41fa04e4dbSRob Herring		movne	\rp, #DEBUG_LL_UART_OFFSET_RS1
42fa04e4dbSRob Herring		orrne	\rv, \rp, #DEBUG_LL_VIRT_BASE
43fa04e4dbSRob Herring		orrne	\rp, \rp, #DEBUG_LL_PHYS_BASE_RS1
44fa04e4dbSRob Herring
45fa04e4dbSRob Herring		.endm
46fa04e4dbSRob Herring
474e218b99SRussell King#include <debug/pl01x.S>
48fa04e4dbSRob Herring#endif
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