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/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/psci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Power State Coordination Interface (PSCI)
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 Firmware implementing the PSCI functions described in ARM document number
15 processors") can be used by Linux to initiate various CPU-centric power
21 Functions are invoked by trapping to the privilege level of the PSCI
25 r0 => 32-bit Function ID / return value
[all …]
/openbmc/linux/arch/arm64/boot/dts/cavium/
H A Dthunder-88xx.dtsi2 * Cavium Thunder DTS file - Thunder SoC description
6 * This file is dual-licensed: you can use it either under the terms
24 * MA 02110-1301 USA
51 compatible = "cavium,thunder-88xx";
52 interrupt-parent = <&gic0>;
53 #address-cells = <2>;
54 #size-cells = <2>;
56 psci {
57 compatible = "arm,psci-0.2";
62 #address-cells = <2>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dthunderx-88xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * Cavium Thunder DTS file - Thunder SoC description
10 compatible = "cavium,thunder-88xx";
11 interrupt-parent = <&gic0>;
12 #address-cells = <2>;
13 #size-cells = <2>;
15 psci {
16 compatible = "arm,psci-0.2";
21 #address-cells = <2>;
22 #size-cells = <0>;
[all …]
H A Dfsl-imx8-ca53.dtsi17 #address-cells = <2>;
18 #size-cells = <0>;
20 idle-states {
21 entry-method = "psci";
23 CPU_SLEEP: cpu-sleep {
24 compatible = "arm,idle-state";
25 local-timer-stop;
26 arm,psci-suspend-param = <0x0000000>;
27 entry-latency-us = <700>;
28 exit-latency-us = <250>;
[all …]
H A Dhi6220.dtsi7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/hi6220-clock.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <2>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
H A Dfsl-imx8-ca35.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx8qxp-clock.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <0>;
14 /* We have 1 clusters having 4 Cortex-A35 cores */
17 compatible = "arm,cortex-a35";
19 enable-method = "psci";
20 next-level-cache = <&A35_L2>;
23 A35_1: cpu@1 {
[all …]
/openbmc/linux/include/uapi/linux/
H A Dpsci.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * ARM Power State and Coordination Interface (PSCI) header
5 * This header holds common PSCI defines and macros shared
16 * PSCI v0.1 interface
18 * The PSCI v0.1 function numbers are implementation defined.
20 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
22 * to PSCI v0.1.
25 /* PSCI v0.2 interface */
34 #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
44 #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
[all …]
/openbmc/qemu/linux-headers/linux/
H A Dpsci.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * ARM Power State and Coordination Interface (PSCI) header
5 * This header holds common PSCI defines and macros shared
16 * PSCI v0.1 interface
18 * The PSCI v0.1 function numbers are implementation defined.
20 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
22 * to PSCI v0.1.
25 /* PSCI v0.2 interface */
34 #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
44 #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
[all …]
/openbmc/u-boot/include/linux/
H A Dpsci.h2 * ARM Power State and Coordination Interface (PSCI) header
4 * This header holds common PSCI defines and macros shared
15 * PSCI v0.1 interface
17 * The PSCI v0.1 function numbers are implementation defined.
19 * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
21 * to PSCI v0.1.
24 /* PSCI v0.2 interface */
33 #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
43 #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
49 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 interrupt-parent = <&intc>;
12 #address-cells = <2>;
13 #size-cells = <2>;
18 xo_board: xo-board {
19 compatible = "fixed-clock";
20 clock-frequency = <76800000>;
21 #clock-cells = <0>;
[all …]
/openbmc/linux/drivers/cpuidle/
H A Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
9 #define pr_fmt(fmt) "CPUidle PSCI: " fmt
20 #include <linux/psci.h>
29 #include "cpuidle-psci.h"
56 u32 *states = data->psci_states; in __psci_enter_domain_idle_state()
57 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
63 return -1; in __psci_enter_domain_idle_state()
75 ret = psci_cpu_suspend_enter(state) ? -1 : idx; in __psci_enter_domain_idle_state()
132 dev = per_cpu_ptr(&psci_cpuidle_data, cpu)->dev; in psci_idle_syscore_switch()
[all …]
/openbmc/u-boot/drivers/firmware/
H A Dpsci.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Based on drivers/firmware/psci.c from Linux:
14 #include <linux/arm-smccc.h>
17 #include <linux/psci.h>
19 #define DRIVER_NAME "psci"
21 #define PSCI_METHOD_HVC 1
49 /* No SYSTEM_RESET support for PSCI 0.1 */ in psci_bind()
50 if (device_is_compatible(dev, "arm,psci-0.2") || in psci_bind()
51 device_is_compatible(dev, "arm,psci-1.0")) { in psci_bind()
54 /* bind psci-sysreset optionally */ in psci_bind()
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip05.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip05-d02";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
H A Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/
H A D0043-firmware-psci-Fix-bind_smccc_features-psci-check.patch4 Subject: [PATCH] firmware: psci: Fix bind_smccc_features psci check
6 Message-ID: <20240304144242.11666-2-o451686892@gmail.com> (raw)
7 In-Reply-To: <20240304144242.11666-1-o451686892@gmail.com>
9 According to PSCI specification DEN0022F, PSCI_FEATURES is used to check
12 Signed-off-by: Weizhao Ouyang <o451686892@gmail.com>
13 Signed-off-by: Bence Balogh <bence.balogh@arm.com>
14 Upstream-Status: Submitted [https://lore.kernel.org/all/20240304144242.11666-2-o451686892@gmail.com…
15 ---
16 drivers/firmware/psci.c | 5 ++++-
17 include/linux/arm-smccc.h | 6 ++++++
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap810-ap0-octa-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap810-ap0.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 compatible = "marvell,armada-ap810-octa";
18 compatible = "arm,cortex-a72";
20 enable-method = "psci";
22 cpu1: cpu@1 {
24 compatible = "arm,cortex-a72";
26 enable-method = "psci";
[all …]
/openbmc/u-boot/arch/arm/cpu/armv8/
H A Dpsci.S1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * This file implements LS102X platform PSCI SYSTEM-SUSPEND function
10 #include <asm/psci.h>
12 /* Default PSCI function, return -1, Not Implemented */
20 /* PSCI function and ID table definition*/
27 /* 32 bits PSCI default functions */
73 /* 64 bits PSCI default functions */
100 /* PSCI call is Fast Call(atomic), so mask DAIF */
102 stp x15, xzr, [sp, #-16]!
106 stp x29, x30, [sp, #-16]!
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6755.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&sysirq>;
13 #address-cells = <2>;
14 #size-cells = <2>;
16 psci {
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
[all …]
H A Dmt6779.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/clock/mt6779-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/mt6779-pinfunc.h>
15 interrupt-parent = <&sysirq>;
16 #address-cells = <2>;
17 #size-cells = <2>;
19 psci {
20 compatible = "arm,psci-0.2";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/
H A Dnuma.txt6 1 - Introduction
18 2 - numa-node-id
23 a node id is a 32-bit integer.
26 numa-node-id property which contains the node id of the device.
30 numa-node-id = <0>;
32 /* numa node 1 */
33 numa-node-id = <1>;
36 3 - distance-map
39 The optional device tree node distance-map describes the relative
42 - compatible : Should at least contain "numa-distance-map-v1".
[all …]
/openbmc/linux/arch/arm64/boot/dts/amazon/
H A Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a72";
[all …]
/openbmc/linux/drivers/firmware/psci/
H A Dpsci.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #define pr_fmt(fmt) "psci: " fmt
10 #include <linux/arm-smccc.h>
18 #include <linux/psci.h>
23 #include <uapi/linux/psci.h>
33 * While a 64-bit OS can make calls with SMC32 calling conventions, for some
34 * calls it is necessary to use SMC64 to pass or return 64-bit values.
36 * (native-width) function ID.
47 * a Trusted OS even if it claims to be capable of migration -- doing so will
50 static int resident_cpu = -1;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
[all …]
/openbmc/linux/arch/arm64/kvm/
H A Dpsci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - ARM Ltd
7 #include <linux/arm-smccc.h>
24 #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
38 * same-as WFI (Wait-for-interrupt) emulation. in kvm_psci_vcpu_suspend()
42 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A). in kvm_psci_vcpu_suspend()
44 * Further, we also treat power-down request to be same as in kvm_psci_vcpu_suspend()
45 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2 in kvm_psci_vcpu_suspend()
63 struct kvm *kvm = source_vcpu->kvm; in kvm_psci_vcpu_on()
81 spin_lock(&vcpu->arch.mp_state_lock); in kvm_psci_vcpu_on()
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-t7.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <0x2>;
15 #size-cells = <0x0>;
17 cpu-map {
51 compatible = "arm,cortex-a53";
53 enable-method = "psci";
[all …]

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