xref: /openbmc/u-boot/arch/arm/dts/sun50i-h5.dtsi (revision 1adbf296)
1702a3e57SJagan Teki/*
2*7514ed33SAndre Przywara * Copyright (C) 2016 ARM Ltd.
3702a3e57SJagan Teki *
4702a3e57SJagan Teki * This file is dual-licensed: you can use it either under the terms
5702a3e57SJagan Teki * of the GPL or the X11 license, at your option. Note that this dual
6702a3e57SJagan Teki * licensing only applies to this file, and not this project as a
7702a3e57SJagan Teki * whole.
8702a3e57SJagan Teki *
9*7514ed33SAndre Przywara *  a) This file is free software; you can redistribute it and/or
10702a3e57SJagan Teki *     modify it under the terms of the GNU General Public License as
11702a3e57SJagan Teki *     published by the Free Software Foundation; either version 2 of the
12702a3e57SJagan Teki *     License, or (at your option) any later version.
13702a3e57SJagan Teki *
14*7514ed33SAndre Przywara *     This file is distributed in the hope that it will be useful,
15702a3e57SJagan Teki *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16702a3e57SJagan Teki *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17702a3e57SJagan Teki *     GNU General Public License for more details.
18702a3e57SJagan Teki *
19702a3e57SJagan Teki * Or, alternatively,
20702a3e57SJagan Teki *
21702a3e57SJagan Teki *  b) Permission is hereby granted, free of charge, to any person
22702a3e57SJagan Teki *     obtaining a copy of this software and associated documentation
23702a3e57SJagan Teki *     files (the "Software"), to deal in the Software without
24702a3e57SJagan Teki *     restriction, including without limitation the rights to use,
25702a3e57SJagan Teki *     copy, modify, merge, publish, distribute, sublicense, and/or
26702a3e57SJagan Teki *     sell copies of the Software, and to permit persons to whom the
27702a3e57SJagan Teki *     Software is furnished to do so, subject to the following
28702a3e57SJagan Teki *     conditions:
29702a3e57SJagan Teki *
30702a3e57SJagan Teki *     The above copyright notice and this permission notice shall be
31702a3e57SJagan Teki *     included in all copies or substantial portions of the Software.
32702a3e57SJagan Teki *
33702a3e57SJagan Teki *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34702a3e57SJagan Teki *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35702a3e57SJagan Teki *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36702a3e57SJagan Teki *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37702a3e57SJagan Teki *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38702a3e57SJagan Teki *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39702a3e57SJagan Teki *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40702a3e57SJagan Teki *     OTHER DEALINGS IN THE SOFTWARE.
41702a3e57SJagan Teki */
42702a3e57SJagan Teki
43*7514ed33SAndre Przywara#include <sunxi-h3-h5.dtsi>
44702a3e57SJagan Teki
45702a3e57SJagan Teki/ {
46702a3e57SJagan Teki	cpus {
47*7514ed33SAndre Przywara		#address-cells = <1>;
48*7514ed33SAndre Przywara		#size-cells = <0>;
49*7514ed33SAndre Przywara
50*7514ed33SAndre Przywara		cpu0: cpu@0 {
51702a3e57SJagan Teki			compatible = "arm,cortex-a53", "arm,armv8";
52*7514ed33SAndre Przywara			device_type = "cpu";
53*7514ed33SAndre Przywara			reg = <0>;
54702a3e57SJagan Teki			enable-method = "psci";
55702a3e57SJagan Teki		};
56*7514ed33SAndre Przywara
57702a3e57SJagan Teki		cpu@1 {
58702a3e57SJagan Teki			compatible = "arm,cortex-a53", "arm,armv8";
59*7514ed33SAndre Przywara			device_type = "cpu";
60*7514ed33SAndre Przywara			reg = <1>;
61702a3e57SJagan Teki			enable-method = "psci";
62702a3e57SJagan Teki		};
63*7514ed33SAndre Przywara
64702a3e57SJagan Teki		cpu@2 {
65702a3e57SJagan Teki			compatible = "arm,cortex-a53", "arm,armv8";
66*7514ed33SAndre Przywara			device_type = "cpu";
67*7514ed33SAndre Przywara			reg = <2>;
68702a3e57SJagan Teki			enable-method = "psci";
69702a3e57SJagan Teki		};
70*7514ed33SAndre Przywara
71702a3e57SJagan Teki		cpu@3 {
72702a3e57SJagan Teki			compatible = "arm,cortex-a53", "arm,armv8";
73*7514ed33SAndre Przywara			device_type = "cpu";
74*7514ed33SAndre Przywara			reg = <3>;
75702a3e57SJagan Teki			enable-method = "psci";
76702a3e57SJagan Teki		};
77702a3e57SJagan Teki	};
78702a3e57SJagan Teki
79702a3e57SJagan Teki	psci {
80702a3e57SJagan Teki		compatible = "arm,psci-0.2";
81702a3e57SJagan Teki		method = "smc";
82702a3e57SJagan Teki	};
83702a3e57SJagan Teki
84702a3e57SJagan Teki	timer {
85702a3e57SJagan Teki		compatible = "arm,armv8-timer";
86*7514ed33SAndre Przywara		interrupts = <GIC_PPI 13
87*7514ed33SAndre Przywara				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
88*7514ed33SAndre Przywara			     <GIC_PPI 14
89*7514ed33SAndre Przywara				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
90*7514ed33SAndre Przywara			     <GIC_PPI 11
91*7514ed33SAndre Przywara				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
92*7514ed33SAndre Przywara			     <GIC_PPI 10
93*7514ed33SAndre Przywara				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
94702a3e57SJagan Teki	};
95702a3e57SJagan Teki};
96702a3e57SJagan Teki
978faac094SAntony Antony&ccu {
988faac094SAntony Antony	compatible = "allwinner,sun50i-h5-ccu";
998faac094SAntony Antony};
1008faac094SAntony Antony
101*7514ed33SAndre Przywara&display_clocks {
102*7514ed33SAndre Przywara	compatible = "allwinner,sun50i-h5-de2-clk";
103702a3e57SJagan Teki};
1048faac094SAntony Antony
1058faac094SAntony Antony&mmc0 {
1068faac094SAntony Antony	compatible = "allwinner,sun50i-h5-mmc",
1078faac094SAntony Antony		     "allwinner,sun50i-a64-mmc";
1088faac094SAntony Antony	clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
1098faac094SAntony Antony	clock-names = "ahb", "mmc";
1108faac094SAntony Antony};
1118faac094SAntony Antony
1128faac094SAntony Antony&mmc1 {
1138faac094SAntony Antony	compatible = "allwinner,sun50i-h5-mmc",
1148faac094SAntony Antony		     "allwinner,sun50i-a64-mmc";
1158faac094SAntony Antony	clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
1168faac094SAntony Antony	clock-names = "ahb", "mmc";
1178faac094SAntony Antony};
1188faac094SAntony Antony
1198faac094SAntony Antony&mmc2 {
1208faac094SAntony Antony	compatible = "allwinner,sun50i-h5-emmc",
1218faac094SAntony Antony		     "allwinner,sun50i-a64-emmc";
1228faac094SAntony Antony	clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
1238faac094SAntony Antony	clock-names = "ahb", "mmc";
1248faac094SAntony Antony};
1258faac094SAntony Antony
1268faac094SAntony Antony&pio {
1278faac094SAntony Antony	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
1288faac094SAntony Antony		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
1298faac094SAntony Antony		     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1308faac094SAntony Antony	compatible = "allwinner,sun50i-h5-pinctrl";
1318faac094SAntony Antony};
132