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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
/openbmc/linux/arch/sparc/lib/
H A DPeeCeeI.c1 // SPDX-License-Identifier: GPL-2.0
18 while (count--) in outsb()
27 while (count--) { in outsw()
45 while (count--) { in outsl()
51 /* 2-byte alignment */ in outsl()
52 while (count--) { in outsl()
60 /* Hold three bytes in l each time, grab a byte from l2 */ in outsl()
64 while (count--) { in outsl()
73 /* Hold a byte in l each time, grab 3 bytes from l2 */ in outsl()
76 while (count--) { in outsl()
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-crs328-4c-20s-4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS328-4C-20S-4S+ board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS328-4C-20S-4S+";
25 compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
[all …]
H A Darmada-xp-crs305-1g-4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS305-1G-4S board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS305-1G-4S+";
25 compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
[all …]
H A Darmada-xp-crs326-24g-2s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS326-24G-2S board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS326-24G-2S+";
25 compatible = "mikrotik,crs326-24g-2s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
[all …]
H A Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
38 marvell,ecc-enable;
[all …]
H A Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
[all …]
H A Darmada-xp-openblocks-ax3-4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for OpenBlocks AX3-4 board
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "armada-xp-mv78260.dtsi"
16 model = "PlatHome OpenBlocks AX3-4 board";
17 …compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell…
20 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-385-atl-x530.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 (x530/AT-GS980MX)
9 /dts-v1/;
10 #include "armada-385.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
15 model = "x530/AT-GS980MX";
19 stdout-path = "serial1:115200n8";
32 internal-regs {
34 pinctrl-names = "default";
35 pinctrl-0 = <&i2c0_pins>;
[all …]
H A Darmada-xp-gp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-MV784MP-GP)
6 * Copyright (C) 2013-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
22 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include "armada-xp-mv78460.dtsi"
27 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
[all …]
H A Darmada-xp-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-78460-BP)
6 * Copyright (C) 2012-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
23 /dts-v1/;
24 #include "armada-xp-mv78460.dtsi"
28 …compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370…
31 stdout-path = "serial0:115200n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/reset/
H A Dqcom,pshold.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 A power supply hold (ps-hold) bit is set to power the Qualcomm chipsets.
25 - compatible
26 - reg
31 - |
32 reset-controller@fc4ab000 {
/openbmc/linux/drivers/tty/vt/
H A Dselection.c1 // SPDX-License-Identifier: GPL-2.0
35 /* Don't take this from <ctype.h>: 011-015 on the screen aren't spaces */
48 .start = -1,
54 /* set reverse video on characters s-e of console with selection. */
57 invert_screen(vc_sel.cons, s, e-s+2, true); in highlight()
76 * clear_selection - remove current selection
79 * holding the selection. The caller must hold the console lock.
83 highlight_pointer(-1); /* hide the pointer */ in clear_selection()
84 if (vc_sel.start != -1) { in clear_selection()
86 vc_sel.start = -1; in clear_selection()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-385-atl-x530.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/gpio.h>
4 #include "armada-385.dtsi"
11 stdout-path = "serial0:115200n8";
30 pcie-mem-aperture = <0xa0000000 0x40000000>;
33 eco-button-interrupt {
34 compatible = "atl,eco-button-interrupt";
35 eco-button-gpio = <&gpio0 14 GPIO_ACTIVE_LOW>;
38 board-reset {
40 /* Physical board layout of reset pin is active-low but for the
[all …]
H A Darmada-xp-maxbcm.dts4 * Copyright (C) 2013-2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * This file is dual-licensed: you can use it either under the terms
51 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
58 /dts-v1/;
59 #include <dt-bindings/gpio/gpio.h>
60 #include "armada-xp-mv78460.dtsi"
64 …compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370…
67 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-xp-gp.dts3 * (DB-MV784MP-GP)
5 * Copyright (C) 2013-2014 Marvell
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * This file is dual-licensed: you can use it either under the terms
52 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
59 /dts-v1/;
60 #include <dt-bindings/gpio/gpio.h>
61 #include "armada-xp-mv78460.dtsi"
64 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
[all …]
/openbmc/linux/kernel/futex/
H A Dpi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 if (likely(current->pi_state_cache)) in refill_pi_state_cache()
22 return -ENOMEM; in refill_pi_state_cache()
24 INIT_LIST_HEAD(&pi_state->list); in refill_pi_state_cache()
26 pi_state->owner = NULL; in refill_pi_state_cache()
27 refcount_set(&pi_state->refcount, 1); in refill_pi_state_cache()
28 pi_state->key = FUTEX_KEY_INIT; in refill_pi_state_cache()
30 current->pi_state_cache = pi_state; in refill_pi_state_cache()
37 struct futex_pi_state *pi_state = current->pi_state_cache; in alloc_pi_state()
40 current->pi_state_cache = NULL; in alloc_pi_state()
[all …]
/openbmc/qemu/target/xtensa/
H A Dcpu.c37 #include "hw/qdev-clock.h"
47 cpu->env.pc = value; in xtensa_cpu_set_pc()
54 return cpu->env.pc; in xtensa_cpu_get_pc()
63 cpu->env.pc = data[0]; in xtensa_restore_state_to_opc()
71 return !cpu->env.runstall && cpu->env.pending_irq_level; in xtensa_cpu_has_work()
101 bool dfpu = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
104 if (xcc->parent_phases.hold) { in xtensa_cpu_reset_hold()
105 xcc->parent_phases.hold(obj, type); in xtensa_cpu_reset_hold()
108 env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors]; in xtensa_cpu_reset_hold()
109 env->sregs[LITBASE] &= ~1; in xtensa_cpu_reset_hold()
[all …]
/openbmc/linux/drivers/media/radio/wl128x/
H A Dfmdrv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Common header for all FM driver sub-modules.
18 #include <media/v4l2-ioctl.h>
19 #include <media/v4l2-common.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-ctrls.h>
78 u8 ps[2]; member
83 u8 ps[2]; member
148 /* Will hold the frequency before the jump */
160 * @ text_type: is the text following PS or RT
[all …]
/openbmc/linux/drivers/memory/
H A Dmvebu-devbus.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2013-2014 Marvell
96 dev_err(devbus->dev, "%pOF has no '%s' property\n", in get_timing_param_ps()
101 *ticks = (time_ps + devbus->tick_ps - 1) / devbus->tick_ps; in get_timing_param_ps()
103 dev_dbg(devbus->dev, "%s: %u ps -> 0x%x\n", in get_timing_param_ps()
115 err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width); in devbus_get_timing_params()
117 dev_err(devbus->dev, in devbus_get_timing_params()
118 "%pOF has no 'devbus,bus-width' property\n", in devbus_get_timing_params()
127 if (r->bus_width == 8) { in devbus_get_timing_params()
128 r->bus_width = 0; in devbus_get_timing_params()
[all …]
/openbmc/linux/arch/sparc/include/asm/
H A Dleon_amba.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 *Copyright (C) 2004 Stefan Holst (mail@s-holst.de), Uni-Stuttgart
26 #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
54 /* 0 = hold scalar and counter */
63 * The following defines the bits in the LEON PS/2 Status Registers.
74 * The following defines the bits in the LEON PS/2 Ctrl Registers.
89 #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
114 u32 unused[(0x1000-0x100)/4];
/openbmc/linux/drivers/net/fddi/skfp/
H A Dcfm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
43 #define GO_STATE(x) (smc->mib.fddiSMTCF_State = (x)|AFLAG)
44 #define ACTIONS_DONE() (smc->mib.fddiSMTCF_State &= ~AFLAG)
97 smc->mib.fddiSMTCF_State = ACTIONS(SC0_ISOLATED) ; in cfm_init()
98 smc->r.rm_join = 0 ; in cfm_init()
99 smc->r.rm_loop = 0 ; in cfm_init()
100 smc->y[PA].scrub = 0 ; in cfm_init()
101 smc->y[PB].scrub = 0 ; in cfm_init()
102 smc->y[PA].cem_pst = CEM_PST_DOWN ; in cfm_init()
103 smc->y[PB].cem_pst = CEM_PST_DOWN ; in cfm_init()
[all …]
/openbmc/linux/drivers/md/
H A Ddm-snap-persistent.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2001-2002 Sistina Software (UK) Limited.
4 * Copyright (C) 2006-2008 Red Hat GmbH
9 #include "dm-exception-store.h"
17 #include <linux/dm-io.h>
18 #include <linux/dm-bufio.h>
26 *---------------------------------------------------------------
29 *---------------------------------------------------------------
50 * All on disk structures are in little-endian format. The end
57 * Magic for persistent snapshots: "SnAp" - Feeble isn't it.
[all …]
/openbmc/linux/drivers/infiniband/hw/hfi1/
H A Dverbs.h1 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
3 * Copyright(c) 2015 - 2018 Intel Corporation.
173 #define HFI1_QP_WQE_INVALID ((u32)-1)
186 * This structure is used to hold commonly lookedup and computed values during
221 stats->n_bytes += tlen; in inc_opstats()
222 stats->n_packets++; in inc_opstats()
278 return priv->owner; in iowait_to_qp()
314 return (((int)a) - ((int)b)) << PSN_SHIFT; in cmp_psn()
330 return (((int)a - (int)b) << PSN_SHIFT) >> PSN_SHIFT; in delta_psn()
335 return &((struct hfi1_swqe_priv *)wqe->priv)->tid_req; in wqe_to_tid_req()
[all …]

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