| /openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/ |
| H A D | spectrum_port_range.c | 26 const struct mlxsw_sp_port_range_reg *prr) in mlxsw_sp_port_range_reg_configure() argument
33 mlxsw_reg_pprr_pack(pprr_pl, prr->index); in mlxsw_sp_port_range_reg_configure()
36 mlxsw_reg_pprr_src_set(pprr_pl, prr->range.source); in mlxsw_sp_port_range_reg_configure()
37 mlxsw_reg_pprr_dst_set(pprr_pl, !prr->range.source); in mlxsw_sp_port_range_reg_configure()
40 mlxsw_reg_pprr_port_range_min_set(pprr_pl, prr->range.min); in mlxsw_sp_port_range_reg_configure()
41 mlxsw_reg_pprr_port_range_max_set(pprr_pl, prr->range.max); in mlxsw_sp_port_range_reg_configure()
52 struct mlxsw_sp_port_range_reg *prr; in mlxsw_sp_port_range_reg_create() local
55 prr = kzalloc(sizeof(*prr), GFP_KERNEL); in mlxsw_sp_port_range_reg_create()
56 if (!prr) in mlxsw_sp_port_range_reg_create()
59 prr->range = *range; in mlxsw_sp_port_range_reg_create()
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| /openbmc/u-boot/arch/arm/mach-rmobile/ |
| H A D | cpu_info-rcar.c | 30 const u32 prr = rmobile_get_prr(); in rmobile_get_cpu_rev_integer() local
32 if ((prr & PRR_MASK) == R8A7796_REV_1_1) in rmobile_get_cpu_rev_integer()
35 return ((prr & 0x000000F0) >> 4) + 1; in rmobile_get_cpu_rev_integer()
40 const u32 prr = rmobile_get_prr(); in rmobile_get_cpu_rev_fraction() local
42 if ((prr & PRR_MASK) == R8A7796_REV_1_1) in rmobile_get_cpu_rev_fraction()
45 return prr & 0x0000000F; in rmobile_get_cpu_rev_fraction()
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| H A D | lowlevel_init_ca15.S | 38 ldr r2, =0xFF000044 /* PRR */
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| /openbmc/linux/Documentation/devicetree/bindings/hwinfo/ |
| H A D | renesas,prr.yaml | 4 $id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml#
21 - renesas,prr
34 prr: chipid@ff000044 {
35 compatible = "renesas,prr";
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| /openbmc/linux/Documentation/devicetree/bindings/fpga/ |
| H A D | fpga-region.txt | 39 Partial Reconfiguration Region (PRR)
41 * A PRR is a specific section of an FPGA reserved for reconfiguration.
42 * A base (or static) FPGA image may create a set of PRR's that later may
44 * The size and specific location of each PRR is fixed.
45 * The connections at the edge of each PRR are fixed. The image that is loaded
46 into a PRR must fit and must use a subset of the region's connections.
52 * An FPGA image that is designed to be loaded into a PRR. There may be
53 any number of personas designed to fit into a PRR, but only one at at time
101 a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be
152 base FPGA region. The "Full Reconfiguration to add PRR's" example below shows
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| /openbmc/linux/arch/sh/kernel/cpu/sh4/ |
| H A D | probe.c | 17 unsigned long pvr, prr, cvr; in cpu_probe() local
29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff; in cpu_probe()
106 if (prr == 0x61) in cpu_probe()
108 else if (prr == 0xa1) in cpu_probe()
129 switch (prr) { in cpu_probe()
145 switch (prr) { in cpu_probe()
180 switch (prr) { in cpu_probe()
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| /openbmc/linux/drivers/soc/renesas/ |
| H A D | renesas-soc.c | 18 u32 reg; /* CCCR or PRR, if not in DT */
23 .reg = 0xff000044, /* PRR (Product Register) */
28 .reg = 0xff000044, /* PRR (Product Register) */
33 .reg = 0xfff00044, /* PRR (Product Register) */
59 .reg = 0xff000044, /* PRR (Product Register) */
64 .reg = 0xfff00044, /* PRR (Product Register) */
433 { .compatible = "renesas,prr", .data = &id_prr },
466 /* Try hardcoded CCCR/PRR fallback */ in renesas_soc_init()
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| /openbmc/qemu/target/sh4/ |
| H A D | cpu.c | 171 scc->prr = 0x00000100; in sh7750r_class_init()
188 scc->prr = 0x00000113; in sh7751r_class_init()
205 scc->prr = 0x00000200; in sh7785_class_init()
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| H A D | cpu.h | 227 * @prr: Processor Revision Register
239 uint32_t prr; member
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | r8a779x-u-boot.dtsi | 22 &prr {
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| H A D | r8a77990.dtsi | 417 prr: chipid@fff00044 { label
418 compatible = "renesas,prr";
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| H A D | r8a77970.dtsi | 888 prr: chipid@fff00044 { label
889 compatible = "renesas,prr";
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| H A D | r8a7792.dtsi | 857 prr: chipid@ff000044 { label
858 compatible = "renesas,prr";
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| H A D | r8a77995.dtsi | 974 prr: chipid@fff00044 { label
975 compatible = "renesas,prr";
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| /openbmc/u-boot/arch/arm/mach-rmobile/include/mach/ |
| H A D | rmobile.h | 26 /* PRR CPU IDs */
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| /openbmc/u-boot/board/renesas/ulcb/ |
| H A D | ulcb.c | 89 /* PRR driver is not available yet */ in board_fit_config_name_match()
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| /openbmc/u-boot/board/renesas/salvator-x/ |
| H A D | salvator-x.c | 106 /* PRR driver is not available yet */ in board_fit_config_name_match()
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| /openbmc/linux/Documentation/spi/ |
| H A D | butterfly.rst | 43 (a) flash new firmware that disables SPI (set PRR.2, and disable pullups
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| /openbmc/linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7779.dtsi | 702 prr: chipid@ff000044 { label
703 compatible = "renesas,prr";
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| H A D | r8a7792.dtsi | 881 prr: chipid@ff000044 { label
882 compatible = "renesas,prr";
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| H A D | r8a73a4.dtsi | 718 prr: chipid@ff000044 { label
719 compatible = "renesas,prr";
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| H A D | r8a77470.dtsi | 976 prr: chipid@ff000044 { label
977 compatible = "renesas,prr";
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| /openbmc/linux/arch/sh/mm/ |
| H A D | cache-sh4.c | 386 printk("PVR=%08x CVR=%08x PRR=%08x\n", in sh4_cache_init()
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| /openbmc/linux/drivers/misc/cxl/ |
| H A D | of.c | 262 read_prop_dword(np, "ibm,supports-prr", &val); in cxl_of_read_afu_properties()
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| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77970.dtsi | 1188 prr: chipid@fff00044 { label
1189 compatible = "renesas,prr";
|