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/openbmc/linux/Documentation/infiniband/
H A Dtag_matching.rst5 The MPI standard defines a set of rules, known as tag-matching, for matching
10 * User tag - wild card may be specified by the receiver
15 message envelopes may match, the pair that includes the earliest posted-send
16 and the earliest posted-receive is the pair that must be used to satisfy the
31 1. The Eager protocol- the complete message is sent when the send is
35 2. The Rendezvous Protocol - the sender sends the tag-matching header,
51 pre-posted receive for this arriving message, it is passed to the software and
53 including rendezvous processing, if appropriate, delivering the data to the
54 specified receive buffer. This allows overlapping receive-side MPI tag
57 When a receive-message is posted, the communication library will first check
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/openbmc/linux/Documentation/admin-guide/media/
H A Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
9 The Freescale i.MX5/6 contains an Image Processing Unit (IPU), which
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
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/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dguc_capture_fwif.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright © 2021-2022 Intel Corporation
18 * Book-keeping structure used to track read and write pointers
19 * as we extract error capture data from the GuC-log-buffer's
20 * error-capture region as a stream of dwords.
30 * struct __guc_capture_parsed_output - extracted error capture node
32 * A single unit of extracted error-capture output data grouped together
33 * at an engine-instance level. We keep these nodes in a linked list.
38 * A single set of 3 capture lists: a global-list
39 * an engine-class-list and an engine-instance list.
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
16 processing, single pass security offload and robust traffic management
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
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/openbmc/linux/block/
H A Dblk-pm.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/blk-pm.h>
6 #include "blk-mq.h"
9 * blk_pm_runtime_init - Block layer runtime PM initialization routine
14 * Initialize runtime-PM-related fields for @q and start auto suspend for
15 * @dev. Drivers that want to take advantage of request-based runtime PM
22 * the autosuspend delay is set to -1 to make runtime suspend impossible
31 q->dev = dev; in blk_pm_runtime_init()
32 q->rpm_status = RPM_ACTIVE; in blk_pm_runtime_init()
33 pm_runtime_set_autosuspend_delay(q->dev, -1); in blk_pm_runtime_init()
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/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A Dpipeline.json21 … the frontend, cache miss. This event counts every cycle that the Data Processing Unit (DPU) instr…
24 … the frontend, cache miss. This event counts every cycle that the Data Processing Unit (DPU) instr…
33 "PublicDescription": "No operation issued due to the frontend, pre-decode error",
36 "BriefDescription": "No operation issued due to the frontend, pre-decode error"
51 …on": "No operation issued due to the backend, interlock, or the Vector Processing Unit (VPU). This…
54 …on": "No operation issued due to the backend, interlock, or the Vector Processing Unit (VPU). This…
69 …e event counts for stalls that are caused by missing the cache or where the data is Non-cacheable",
72 …he event counts for stalls that are caused by missing the cache or where the data is Non-cacheable"
/openbmc/phosphor-net-ipmid/
H A Drmcp.hpp13 * confidentiality algorithms will be generated by processing a
14 * pre-defined set of constants using HMAC per [RFC2104], keyed by SIK.
18 * HMAC-block-length pieces of keying material from a single SIK.For the
19 * mandatory confidentiality algorithm AES-CBC-128, processing the
/openbmc/u-boot/include/dm/
H A Duclass-internal.h1 /* SPDX-License-Identifier: GPL-2.0+ */
15 * uclass_find_next_free_req_seq() - Get the next free req_seq number
28 * uclass_get_device_tail() - handle the end of a get_device call
33 * @ret: Error to return. If non-zero then the device is not probed
35 * @return ret, if non-zero, else the result of the device_probe() call
40 * dev_get_uclass_index() - Get uclass and index of device
41 * @dev: - in - Device that we want the uclass/index of
42 * @ucp: - out - A pointer to the uclass the device belongs to
44 * The device is not prepared for use - this is an internal function.
46 * @return the index of the device in the uclass list or -ENODEV if not found.
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/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_vpp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * DOC: Video Post Processing
18 * VPP Handles all the Post Processing after the Scanout from the VIU
21 * - Postblend, Blends the OSD1 only
23 * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and
25 * - Intermediate FIFO with default Amlogic values
29 * - Preblend for video overlay pre-scaling
30 * - OSD2 support for cursor framebuffer
31 * - Video pre-scaling before postblend
32 * - Full Vertical/Horizontal OSD scaling to support TV overscan
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/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dmicrochip,qt1050.txt1 Microchip AT42QT1050 Five-channel Touch Sensor IC
4 one to five keys, dependent on mode. The QT1050 includes all signal processing
11 - compatible: Must be "microchip,qt1050"
12 - reg: The I2C address of the device
13 - interrupts: The sink for the touchpad's IRQ output,
14 see ../interrupt-controller/interrupts.txt
17 - wakeup-source: touch keys can be used as a wakeup source
19 Each button (key) is represented as a sub-node:
25 - linux,code: Keycode to emit.
26 - reg: The key number. Valid values: 0, 1, 2, 3, 4.
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/openbmc/docs/designs/
H A Dpsu-firmware-update.md7 Created: 2019-06-03
20 2. Processing the image to check the version and purpose of the image;
25 - [phosphor-bmc-code-mgmt][2] implements BMC code update, and it supports all
27 - [openpower-pnor-code-mgmt][3] implements BIOS code update, and it only
30 - Both of the above use the same [Software DBus interface][1].
32 For PSU firmware update, it is preferred to re-use the same function for the
50 avoid power loss. This shall be handled by PSU vendor-specific tools, but not in
53 Note: The "vendor-specific" referred below is the PSU vendor-specific.
55 So the below checks are optional and expected to be handled by vendor-specific
67 - When the APIs are invoked;
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/openbmc/u-boot/board/freescale/bsc9131rdb/
H A DREADME2 --------
3 - BSC9131 is integrated device that targets Femto base station market.
5 technologies with MAPLE-B2F baseband acceleration processing elements.
6 - It's MAPLE disabled personality is called 9231.
9 . Power Architecture subsystem including a e500 processor with 256-Kbyte shared
11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
13 Processing (MAPLE-B2F)
14 . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding,
15 Fourier Transforms, UMTS chip rate processing, LTE UP/DL Channel processing,
18 Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix Inversion
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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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/openbmc/linux/arch/loongarch/kernel/
H A Dkprobes.c1 // SPDX-License-Identifier: GPL-2.0-only
15 p->ainsn.insn[0] = *p->addr; in arch_prepare_ss_slot()
16 p->ainsn.insn[1] = KPROBE_SSTEPBP_INSN; in arch_prepare_ss_slot()
17 p->ainsn.restore = (unsigned long)p->addr + LOONGARCH_INSN_SIZE; in arch_prepare_ss_slot()
23 p->ainsn.restore = 0; in arch_prepare_simulate()
31 if ((unsigned long)p->addr & 0x3) in arch_prepare_kprobe()
32 return -EILSEQ; in arch_prepare_kprobe()
35 p->opcode = *p->addr; in arch_prepare_kprobe()
36 insn.word = p->opcode; in arch_prepare_kprobe()
40 return -EINVAL; in arch_prepare_kprobe()
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/openbmc/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_dl.c1 // SPDX-License-Identifier: GPL-2.0+
3 * vsp1_dl.c -- R-Car VSP1 Display List
11 #include <linux/dma-mapping.h>
41 * struct vsp1_dl_ext_header - Extended display list header
43 * @pre_ext_dl_num_cmd: number of pre-extended command bodies to parse
44 * @flags: enables or disables execution of the pre and post command
45 * @pre_ext_dl_plist: start address of pre-extended display list bodies
46 * @post_ext_dl_num_cmd: number of post-extended command bodies to parse
47 * @post_ext_dl_plist: start address of post-extended display list bodies
54 * expecting 32-bit accesses. The flags are appropriate to the whole
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/openbmc/linux/kernel/
H A DKconfig.preempt1 # SPDX-License-Identifier: GPL-2.0-only
29 raw processing power of the kernel, irrespective of scheduling
52 bool "Preemptible Kernel (Low-Latency Desktop)"
71 bool "Fully Preemptible Kernel (Real-Time)"
75 This option turns the kernel into a real-time kernel by replacing
77 preemptible priority-inheritance aware variants, enforcing
79 non-preemptible sections. This makes the kernel, except for very
85 require real-time guarantees.
108 provide a pre-built kernel binary to reduce the number of kernel
115 Interesting if you want the same pre-built kernel should be used for
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/openbmc/linux/include/uapi/linux/
H A Drkisp1-config.h1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) */
16 /* Sensor De-gamma */
32 /* Color Processing */
44 /* Denoise Pre-Filter */
46 /* Denoise Pre-Filter Strength */
129 /* 0-2 for sets 1-3 */
162 * Denoising pre filter
176 * enum rkisp1_cif_isp_version - ISP variants
211 * enum rkisp1_cif_isp_exp_ctrl_autostop - stop modes
221 * enum rkisp1_cif_isp_exp_meas_mode - Exposure measure mode
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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dti,cal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
25 # for DRA72 controllers pre ES2.0
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
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/openbmc/ipmitool/src/plugins/lanplus/
H A DREADME.lanplus33 will be generated by processing a pre-defined set of constants using HMAC
34 per [RFC2104], keyed by sik". And "For the mandatory-to-implement
36 processing the first two (2) constants will generate the require amount of
58 * In the IPMIv2 packet description in table 13-8 of the IPMv2
71 whereas the detailed description in table 22-18 leads us to believe that
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME2 --------
4 Microcell, Picocell, and Enterprise-Femto base station market subsegments.
7 core technologies with MAPLE-B2P baseband acceleration processing elements
9 that handles all required processing layers without the need for an
15 - Power Architecture subsystem including two e500 processors with
16 512-Kbyte shared L2 cache
17 - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
19 - 32 Kbyte of shared M3 memory
20 - The Multi Accelerator Platform Engine for Pico BaseStation Baseband
21 Processing (MAPLE-B2P)
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra210-ahub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 for audio pre-processing, post-processing and a programmable full
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
26 - enum:
27 - nvidia,tegra210-ahub
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/openbmc/linux/drivers/misc/echo/
H A Decho.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * SpanDSP - a series of DSP components for telephony
5 * echo.c - A line echo canceller. This code is being developed
24 This module aims to provide G.168-2002 compliant echo cancellation, to remove
25 electrical echoes (e.g. from 2-4 wire hybrids) from voice calls.
43 varies widely. This is quite easy to fix. If the signal level is normalised -
44 similar to applying AGC - LMS can work as well for a signal of varying
47 other algorithms exist - e.g. RLS (essentially the same as Kalman filtering),
54 high frequency content. Pre-whitening (i.e. filtering the signal to flatten its
57 low complexity filter is adequate for this, so pre-whitening adds little to the
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/openbmc/linux/Documentation/devicetree/bindings/dsp/
H A Dmediatek,mt8186-dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tinghan Shen <tinghan.shen@mediatek.com>
14 advanced pre- and post- audio processing.
19 - mediatek,mt8186-dsp
20 - mediatek,mt8188-dsp
24 - description: Address and size of the DSP config registers
25 - description: Address and size of the DSP SRAM
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/openbmc/openbmc-build-scripts/
H A Drun-unit-test-docker.sh1 #!/bin/bash -xe
6 # and test the input UNIT_TEST_PKG. The docker container will be pre-populated
7 # with the most used OpenBMC repositories (phosphor-dbus-interfaces, sdbusplus,
8 # phosphor-logging, ...). This allows the use of docker caching
11 # docker container will be pre-populated with the latest code from that input
23 # `/usr/share/dbus-1/system.conf`
25 # NO_FORMAT_CODE: Optional, do not run format-code.sh
27 # EXTRA_UNIT_TEST_ARGS: Optional, pass arguments to unit-test.py
28 # INTERACTIVE: Optional, run a bash shell instead of unit-test.py
31 # Trace bash processing. Set -e so when a step fails, we fail the build
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/openbmc/linux/kernel/bpf/
H A Dcgroup_iter.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "../cgroup/cgroup-internal.h" /* cgroup_mutex and cgroup_is_dead */
13 * 1. Walk the descendants of a cgroup in pre-order.
14 * 2. Walk the descendants of a cgroup in post-order.
18 * For walking descendants, cgroup_iter can walk in either pre-order or
19 * post-order. For walking ancestors, the iter walks up from a cgroup to
25 * The prog can check (seq->num == 0) to determine whether this is
28 * do post-processing, such as outputting an epilogue.
59 struct cgroup_iter_priv *p = seq->private; in cgroup_iter_seq_start()
65 if (p->visited_all) in cgroup_iter_seq_start()
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