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/openbmc/u-boot/arch/arm/mach-tegra/
H A Dpinmux-common.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
12 #define pmux_pingrp_isvalid(pin) (((pin) >= 0) && ((pin) < PMUX_PINGRP_COUNT)) argument
95 #define REG(pin) _R(0x3000 + ((pin) * 4)) argument
97 #define MUX_REG(pin) REG(pin) argument
98 #define MUX_SHIFT(pin) 0 argument
100 #define PULL_REG(pin) REG(pin) argument
101 #define PULL_SHIFT(pin) 2 argument
103 #define TRI_REG(pin) REG(pin) argument
104 #define TRI_SHIFT(pin) 4 argument
[all …]
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-ssbi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/pinctrl/pinconf-generic.h>
22 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
25 #include "../pinctrl-utils.h"
59 * struct pm8xxx_pin_data - dynamic configuration for a pin
63 * @mode: operating mode for the pin (input/output)
64 * @open_drain: output buffer configured as open-drain (vs push-pull)
69 * @output_strength: selector of output-strength
70 * @disable: pin disabled / configured as tristate
72 * @inverted: pin logic is inverted
[all …]
H A Dpinctrl-spmi-mpp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
16 #include <linux/pinctrl/pinconf-generic.h>
20 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
23 #include "../pinctrl-utils.h"
28 * Pull Up Values - it indicates whether a pull-up should be
99 /* Qualcomm specific pin configurations */
106 * struct pmic_mpp_pad - keep current MPP settings
109 * @out_value: Cached pin output value.
112 * @paired: Pin operates in paired mode
[all …]
H A Dpinctrl-lpass-lpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
15 #include <linux/pinctrl/pinconf-generic.h>
19 #include "../pinctrl-utils.h"
21 #include "pinctrl-lpass-lpi.h"
41 static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin, in lpi_gpio_read() argument
44 return ioread32(state->tlmm_base + LPI_TLMM_REG_OFFSET * pin + addr); in lpi_gpio_read()
47 static int lpi_gpio_write(struct lpi_pinctrl *state, unsigned int pin, in lpi_gpio_write() argument
48 unsigned int addr, unsigned int val) in lpi_gpio_write() argument
50 iowrite32(val, state->tlmm_base + LPI_TLMM_REG_OFFSET * pin + addr); in lpi_gpio_write()
[all …]
/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Dglobal2_scratch.c1 // SPDX-License-Identifier: GPL-2.0-or-later
45 * mv88e6xxx_g2_scratch_get_bit - get a bit
57 u8 val; in mv88e6xxx_g2_scratch_get_bit() local
60 err = mv88e6xxx_g2_scratch_read(chip, reg, &val); in mv88e6xxx_g2_scratch_get_bit()
64 *set = !!(mask & val); in mv88e6xxx_g2_scratch_get_bit()
70 * mv88e6xxx_g2_scratch_set_bit - set (or clear) a bit
84 u8 val; in mv88e6xxx_g2_scratch_set_bit() local
87 err = mv88e6xxx_g2_scratch_read(chip, reg, &val); in mv88e6xxx_g2_scratch_set_bit()
92 val |= mask; in mv88e6xxx_g2_scratch_set_bit()
94 val &= ~mask; in mv88e6xxx_g2_scratch_set_bit()
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-zevio.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Fabian Vogt <fabian@ritter-vogt.de>
26 …* http://hackspire.unsads.com/wiki/index.php/Memory-mapped_I/O_ports#90000000_-_General_Purpose_I.…
28 * 0x00-0x3F: Section 0
29 * +0x00: Masked interrupt status (read-only)
32 * +0x0C: W: Unmask interrupt (write-only)
35 * +0x18: Input (read-only)
37 * 0x40-0x7F: Section 1
38 * 0x80-0xBF: Section 2
39 * 0xC0-0xFF: Section 3
[all …]
/openbmc/linux/drivers/pinctrl/sprd/
H A Dpinctrl-sprd.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Spreadtrum pin controller driver
4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
20 #include <linux/pinctrl/pinconf-generic.h>
28 #include "../pinctrl-utils.h"
29 #include "pinctrl-sprd.h"
99 * struct sprd_pin: represent one pin's description
100 * @name: pin name
101 * @number: pin number
102 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
[all …]
/openbmc/linux/drivers/gpu/drm/loongson/
H A Dlsdc_i2c.c1 // SPDX-License-Identifier: GPL-2.0+
12 * __lsdc_gpio_i2c_set - set the state of a gpio pin indicated by mask
13 * @mask: gpio pin mask
18 struct lsdc_device *ldev = to_lsdc(li2c->ddev); in __lsdc_gpio_i2c_set()
20 u8 val; in __lsdc_gpio_i2c_set() local
22 spin_lock_irqsave(&ldev->reglock, flags); in __lsdc_gpio_i2c_set()
26 * Setting this pin as input directly, write 1 for input. in __lsdc_gpio_i2c_set()
27 * The external pull-up resistor will pull the level up in __lsdc_gpio_i2c_set()
29 val = readb(li2c->dir_reg); in __lsdc_gpio_i2c_set()
30 val |= mask; in __lsdc_gpio_i2c_set()
[all …]
/openbmc/linux/drivers/pinctrl/pxa/
H A Dpinctrl-pxa2xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Marvell PXA2xx family pin control
15 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-pxa2xx.h"
28 return pctl->ngroups; in pxa2xx_pctrl_get_groups_count()
35 struct pxa_pinctrl_group *group = pctl->groups + tgroup; in pxa2xx_pctrl_get_group_name()
37 return group->name; in pxa2xx_pctrl_get_group_name()
46 struct pxa_pinctrl_group *group = pctl->groups + tgroup; in pxa2xx_pctrl_get_group_pins()
48 *pins = (unsigned *)&group->pin; in pxa2xx_pctrl_get_group_pins()
[all …]
/openbmc/linux/drivers/usb/misc/
H A Dbrcmstb-usb-pinmap.c1 // SPDX-License-Identifier: GPL-2.0
44 u32 val; in pinmap_set() local
46 val = readl(reg); in pinmap_set()
47 val |= mask; in pinmap_set()
48 writel(val, reg); in pinmap_set()
53 u32 val; in pinmap_unset() local
55 val = readl(reg); in pinmap_unset()
56 val &= ~mask; in pinmap_unset()
57 writel(val, reg); in pinmap_unset()
60 static void sync_in_pin(struct in_pin *pin) in sync_in_pin() argument
[all …]
/openbmc/linux/drivers/pinctrl/visconti/
H A Dpinctrl-common.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/pinctrl/pinconf-generic.h>
16 #include "pinctrl-common.h"
19 #include "../pinctrl-utils.h"
42 const struct visconti_desc_pin *pin = &priv->devdata->pins[_pin]; in visconti_pin_config_set() local
46 unsigned int val, set_val, pude_val; in visconti_pin_config_set() local
49 dev_dbg(priv->dev, "%s: pin = %d (%s)\n", __func__, _pin, pin->pin.name); in visconti_pin_config_set()
51 spin_lock_irqsave(&priv->lock, flags); in visconti_pin_config_set()
64 val = readl(priv->base + pin->pudsel_offset); in visconti_pin_config_set()
65 val &= ~BIT(pin->pud_shift); in visconti_pin_config_set()
[all …]
/openbmc/u-boot/drivers/gpio/
H A Daxp_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
5 * X-Powers AXP Power Management ICs gpio driver
14 #include <dm/device-internal.h>
19 static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val);
21 static u8 axp_get_gpio_ctrl_reg(unsigned pin) in axp_get_gpio_ctrl_reg() argument
23 switch (pin) { in axp_get_gpio_ctrl_reg()
36 static int axp_gpio_direction_input(struct udevice *dev, unsigned pin) in axp_gpio_direction_input() argument
40 switch (pin) { in axp_gpio_direction_input()
46 reg = axp_get_gpio_ctrl_reg(pin); in axp_gpio_direction_input()
48 return -EINVAL; in axp_gpio_direction_input()
[all …]
H A Dxilinx_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2013 - 2018 Xilinx, Michal Simek
13 #include <dt-bindings/gpio/gpio.h>
44 max_pins = platdata->bank_max[bank]; in xilinx_gpio_get_bank_pin()
46 debug("%s: found at bank 0x%x pin 0x%x\n", __func__, in xilinx_gpio_get_bank_pin()
52 pin_num -= max_pins; in xilinx_gpio_get_bank_pin()
55 return -EINVAL; in xilinx_gpio_get_bank_pin()
63 int val, ret; in xilinx_gpio_set_value() local
64 u32 bank, pin; in xilinx_gpio_set_value() local
66 ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev); in xilinx_gpio_set_value()
[all …]
H A Dkw_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * arch/arm/plat-orion/gpio.c
9 * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
12 * Dieter Kiermaier dk-arm-linux@gmx.de
24 void __set_direction(unsigned pin, int input) in __set_direction() argument
28 u = readl(GPIO_IO_CONF(pin)); in __set_direction()
30 u |= 1 << (pin & 31); in __set_direction()
32 u &= ~(1 << (pin & 31)); in __set_direction()
33 writel(u, GPIO_IO_CONF(pin)); in __set_direction()
35 u = readl(GPIO_IO_CONF(pin)); in __set_direction()
[all …]
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2011
12 void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val) in sunxi_gpio_set_cfgbank() argument
17 clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset); in sunxi_gpio_set_cfgbank()
20 void sunxi_gpio_set_cfgpin(u32 pin, u32 val) in sunxi_gpio_set_cfgpin() argument
22 u32 bank = GPIO_BANK(pin); in sunxi_gpio_set_cfgpin()
25 sunxi_gpio_set_cfgbank(pio, pin, val); in sunxi_gpio_set_cfgpin()
34 cfg = readl(&pio->cfg[0] + index); in sunxi_gpio_get_cfgbank()
40 int sunxi_gpio_get_cfgpin(u32 pin) in sunxi_gpio_get_cfgpin() argument
42 u32 bank = GPIO_BANK(pin); in sunxi_gpio_get_cfgpin()
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-keembay.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/pinctrl/pinconf-generic.h>
58 #define KEEMBAY_GPIO_REG_OFFSET(pin) ((pin) * 4) argument
61 * struct keembay_mux_desc - Mux properties of each GPIO pin
62 * @mode: Pin mode when operating in this function
63 * @name: Pin function name
83 * struct keembay_gpio_irq - Config of each GPIO Interrupt sources
84 * @source: Interrupt source number (0 - 7)
99 * struct keembay_pinctrl - Intel Keembay pinctrl structure
100 * @pctrl: Pointer to the pin controller device
[all …]
H A Dpinctrl-pistachio.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
27 #define PADS_SCHMITT_EN_REG(pin) (PADS_SCHMITT_EN0 + 0x4 * ((pin) / 32)) argument
28 #define PADS_SCHMITT_EN_BIT(pin) BIT((pin) % 32) argument
31 #define PADS_PU_PD_REG(pin) (PADS_PU_PD0 + 0x4 * ((pin) / 16)) argument
32 #define PADS_PU_PD_SHIFT(pin) (2 * ((pin) % 16)) argument
45 #define PADS_SLEW_RATE_REG(pin) (PADS_SLEW_RATE0 + 0x4 * ((pin) / 32)) argument
46 #define PADS_SLEW_RATE_BIT(pin) BIT((pin) % 32) argument
49 #define PADS_DRIVE_STRENGTH_REG(pin) \ argument
[all …]
H A Dpinctrl-max77620.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MAX77620 pin control driver.
20 #include <linux/pinctrl/pinconf-generic.h>
26 #include "pinctrl-utils.h"
52 .property = "maxim,active-fps-source",
55 .property = "maxim,active-fps-power-up-slot",
58 .property = "maxim,active-fps-power-down-slot",
61 .property = "maxim,suspend-fps-source",
64 .property = "maxim,suspend-fps-power-up-slot",
67 .property = "maxim,suspend-fps-power-down-slot",
[all …]
/openbmc/linux/sound/pci/lola/
H A Dlola_mixer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for Digigram Lola PCI-e boards
18 static int lola_init_pin(struct lola *chip, struct lola_pin *pin, in lola_init_pin() argument
21 unsigned int val; in lola_init_pin() local
24 pin->nid = nid; in lola_init_pin()
25 err = lola_read_param(chip, nid, LOLA_PAR_AUDIO_WIDGET_CAP, &val); in lola_init_pin()
27 dev_err(chip->card->dev, "Can't read wcaps for 0x%x\n", nid); in lola_init_pin()
30 val &= 0x00f00fff; /* test TYPE and bits 0..11 */ in lola_init_pin()
31 if (val == 0x00400200) /* Type = 4, Digital = 1 */ in lola_init_pin()
32 pin->is_analog = false; in lola_init_pin()
[all …]
/openbmc/linux/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c1 // SPDX-License-Identifier: GPL-2.0
28 #include <linux/pinctrl/pinconf-generic.h>
35 #include "../pinctrl-utils.h"
36 #include "pinctrl-stm32.h"
50 /* custom bitfield to backup pin status */
84 unsigned pin; member
149 return function - 1; in stm32_gpio_get_alt()
160 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value()
161 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value()
167 bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK | in stm32_gpio_backup_mode()
[all …]
/openbmc/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.c6 * Maxime Ripard <maxime.ripard@free-electrons.com>
28 #include <linux/pinctrl/pinconf-generic.h>
33 #include <dt-bindings/pinctrl/sun4i-a10.h>
36 #include "pinctrl-sunxi.h"
51 * - Mux config
52 * - Data value
53 * - Drive level
54 * - Pull direction
59 * They take a pin number which is relative to the start of the current device.
62 u32 pin, u32 *reg, u32 *shift, u32 *mask) in sunxi_mux_reg() argument
[all …]
/openbmc/linux/drivers/leds/
H A Dleds-bcm6328.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for BCM6328 memory-mapped LEDs, based on leds-syscon.c
59 * struct bcm6328_led - state container for bcm6328 based LEDs
63 * @pin: LED pin number
72 unsigned long pin; member
98 * bits [31:0] -> LEDs 8-23
99 * bits [47:32] -> LEDs 0-7
100 * bits [63:48] -> unused
102 static unsigned long bcm6328_pin2shift(unsigned long pin) in bcm6328_pin2shift() argument
104 if (pin < 8) in bcm6328_pin2shift()
[all …]
/openbmc/linux/drivers/pinctrl/meson/
H A Dpinctrl-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
14 * The AO bank is special because it belongs to the Always-On power
18 * For each pin controller there are 4 different register ranges that
20 * 1) pin muxing
46 #include <linux/pinctrl/pinconf-generic.h>
56 #include "../pinctrl-utils.h"
57 #include "pinctrl-meson.h"
64 * meson_get_bank() - find the bank containing a given pin
67 * @pin: the pin number
[all …]
/openbmc/linux/drivers/pinctrl/spear/
H A Dpinctrl-plgpio.c27 #define PIN_OFFSET(pin) (pin % MAX_GPIO_PER_REG) argument
28 #define REG_OFFSET(base, reg, pin) (base + reg + (pin / MAX_GPIO_PER_REG) \ argument
59 * p2o: function ptr for pin to offset conversion. This is required only for
60 * machines where mapping b/w pin and offset is not 1-to-1.
61 * o2p: function ptr for offset to pin conversion. This is required only for
62 * machines where mapping b/w pin and offset is not 1-to-1.
72 int (*p2o)(int pin); /* pin_to_offset */
82 static inline u32 is_plgpio_set(struct regmap *regmap, u32 pin, u32 reg) in is_plgpio_set() argument
84 u32 offset = PIN_OFFSET(pin); in is_plgpio_set()
85 u32 reg_off = REG_OFFSET(0, reg, pin); in is_plgpio_set()
[all …]
/openbmc/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-core.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2015-2017 Socionext Inc.
13 #include <linux/pinctrl/pinconf-generic.h>
19 #include "../pinctrl-utils.h"
20 #include "pinctrl-uniphier.h"
49 return priv->socdata->groups_count; in uniphier_pctl_get_groups_count()
57 return priv->socdata->groups[selector].name; in uniphier_pctl_get_group_name()
67 *pins = priv->socdata->groups[selector].pins; in uniphier_pctl_get_group_pins()
68 *num_pins = priv->socdata->groups[selector].num_pins; in uniphier_pctl_get_group_pins()
80 switch (uniphier_pin_get_pull_dir(desc->drv_data)) { in uniphier_pctl_pin_dbg_show()
[all …]

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