13c910ecbSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
26ac73095SBeniamino Galvani /*
36ac73095SBeniamino Galvani * Pin controller and GPIO driver for Amlogic Meson SoCs
46ac73095SBeniamino Galvani *
56ac73095SBeniamino Galvani * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
66ac73095SBeniamino Galvani */
76ac73095SBeniamino Galvani
86ac73095SBeniamino Galvani /*
96ac73095SBeniamino Galvani * The available pins are organized in banks (A,B,C,D,E,X,Y,Z,AO,
10faa246deSCarlo Caione * BOOT,CARD for meson6, X,Y,DV,H,Z,AO,BOOT,CARD for meson8 and
11faa246deSCarlo Caione * X,Y,DV,H,AO,BOOT,CARD,DIF for meson8b) and each bank has a
12faa246deSCarlo Caione * variable number of pins.
136ac73095SBeniamino Galvani *
146ac73095SBeniamino Galvani * The AO bank is special because it belongs to the Always-On power
156ac73095SBeniamino Galvani * domain which can't be powered off; the bank also uses a set of
166ac73095SBeniamino Galvani * registers different from the other banks.
176ac73095SBeniamino Galvani *
18db80f0e1SBeniamino Galvani * For each pin controller there are 4 different register ranges that
19db80f0e1SBeniamino Galvani * control the following properties of the pins:
206ac73095SBeniamino Galvani * 1) pin muxing
216ac73095SBeniamino Galvani * 2) pull enable/disable
226ac73095SBeniamino Galvani * 3) pull up/down
236ac73095SBeniamino Galvani * 4) GPIO direction, output value, input value
246ac73095SBeniamino Galvani *
256ac73095SBeniamino Galvani * In some cases the register ranges for pull enable and pull
266ac73095SBeniamino Galvani * direction are the same and thus there are only 3 register ranges.
276ac73095SBeniamino Galvani *
28e66dd48eSXingyu Chen * Since Meson G12A SoC, the ao register ranges for gpio, pull enable
29e66dd48eSXingyu Chen * and pull direction are the same, so there are only 2 register ranges.
30e66dd48eSXingyu Chen *
316ac73095SBeniamino Galvani * For the pull and GPIO configuration every bank uses a contiguous
326ac73095SBeniamino Galvani * set of bits in the register sets described above; the same register
336ac73095SBeniamino Galvani * can be shared by more banks with different offsets.
346ac73095SBeniamino Galvani *
356ac73095SBeniamino Galvani * In addition to this there are some registers shared between all
366ac73095SBeniamino Galvani * banks that control the IRQ functionality. This feature is not
376ac73095SBeniamino Galvani * supported at the moment by the driver.
386ac73095SBeniamino Galvani */
396ac73095SBeniamino Galvani
406ac73095SBeniamino Galvani #include <linux/device.h>
411c5fb66aSLinus Walleij #include <linux/gpio/driver.h>
426ac73095SBeniamino Galvani #include <linux/init.h>
436ac73095SBeniamino Galvani #include <linux/io.h>
446ac73095SBeniamino Galvani #include <linux/of.h>
456ac73095SBeniamino Galvani #include <linux/of_address.h>
466ac73095SBeniamino Galvani #include <linux/pinctrl/pinconf-generic.h>
476ac73095SBeniamino Galvani #include <linux/pinctrl/pinconf.h>
486ac73095SBeniamino Galvani #include <linux/pinctrl/pinctrl.h>
496ac73095SBeniamino Galvani #include <linux/pinctrl/pinmux.h>
506ac73095SBeniamino Galvani #include <linux/platform_device.h>
51edc5601dSAndy Shevchenko #include <linux/property.h>
526ac73095SBeniamino Galvani #include <linux/regmap.h>
536ac73095SBeniamino Galvani #include <linux/seq_file.h>
546ac73095SBeniamino Galvani
556ac73095SBeniamino Galvani #include "../core.h"
566ac73095SBeniamino Galvani #include "../pinctrl-utils.h"
576ac73095SBeniamino Galvani #include "pinctrl-meson.h"
586ac73095SBeniamino Galvani
59f088ab6dSHyeonki Hong static const unsigned int meson_bit_strides[] = {
60f088ab6dSHyeonki Hong 1, 1, 1, 1, 1, 2, 1
61f088ab6dSHyeonki Hong };
62f088ab6dSHyeonki Hong
636ac73095SBeniamino Galvani /**
646ac73095SBeniamino Galvani * meson_get_bank() - find the bank containing a given pin
656ac73095SBeniamino Galvani *
66db80f0e1SBeniamino Galvani * @pc: the pinctrl instance
676ac73095SBeniamino Galvani * @pin: the pin number
686ac73095SBeniamino Galvani * @bank: the found bank
696ac73095SBeniamino Galvani *
706ac73095SBeniamino Galvani * Return: 0 on success, a negative value on error
716ac73095SBeniamino Galvani */
meson_get_bank(struct meson_pinctrl * pc,unsigned int pin,struct meson_bank ** bank)72db80f0e1SBeniamino Galvani static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
736ac73095SBeniamino Galvani struct meson_bank **bank)
746ac73095SBeniamino Galvani {
756ac73095SBeniamino Galvani int i;
766ac73095SBeniamino Galvani
77db80f0e1SBeniamino Galvani for (i = 0; i < pc->data->num_banks; i++) {
78db80f0e1SBeniamino Galvani if (pin >= pc->data->banks[i].first &&
79db80f0e1SBeniamino Galvani pin <= pc->data->banks[i].last) {
80db80f0e1SBeniamino Galvani *bank = &pc->data->banks[i];
816ac73095SBeniamino Galvani return 0;
826ac73095SBeniamino Galvani }
836ac73095SBeniamino Galvani }
846ac73095SBeniamino Galvani
856ac73095SBeniamino Galvani return -EINVAL;
866ac73095SBeniamino Galvani }
876ac73095SBeniamino Galvani
886ac73095SBeniamino Galvani /**
896ac73095SBeniamino Galvani * meson_calc_reg_and_bit() - calculate register and bit for a pin
906ac73095SBeniamino Galvani *
916ac73095SBeniamino Galvani * @bank: the bank containing the pin
926ac73095SBeniamino Galvani * @pin: the pin number
936ac73095SBeniamino Galvani * @reg_type: the type of register needed (pull-enable, pull, etc...)
946ac73095SBeniamino Galvani * @reg: the computed register offset
956ac73095SBeniamino Galvani * @bit: the computed bit
966ac73095SBeniamino Galvani */
meson_calc_reg_and_bit(struct meson_bank * bank,unsigned int pin,enum meson_reg_type reg_type,unsigned int * reg,unsigned int * bit)976ac73095SBeniamino Galvani static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin,
986ac73095SBeniamino Galvani enum meson_reg_type reg_type,
996ac73095SBeniamino Galvani unsigned int *reg, unsigned int *bit)
1006ac73095SBeniamino Galvani {
1016ac73095SBeniamino Galvani struct meson_reg_desc *desc = &bank->regs[reg_type];
1026ac73095SBeniamino Galvani
103f088ab6dSHyeonki Hong *bit = (desc->bit + pin - bank->first) * meson_bit_strides[reg_type];
104f088ab6dSHyeonki Hong *reg = (desc->reg + (*bit / 32)) * 4;
105f088ab6dSHyeonki Hong *bit &= 0x1f;
1066ac73095SBeniamino Galvani }
1076ac73095SBeniamino Galvani
meson_get_groups_count(struct pinctrl_dev * pcdev)1086ac73095SBeniamino Galvani static int meson_get_groups_count(struct pinctrl_dev *pcdev)
1096ac73095SBeniamino Galvani {
1106ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
1116ac73095SBeniamino Galvani
1126ac73095SBeniamino Galvani return pc->data->num_groups;
1136ac73095SBeniamino Galvani }
1146ac73095SBeniamino Galvani
meson_get_group_name(struct pinctrl_dev * pcdev,unsigned selector)1156ac73095SBeniamino Galvani static const char *meson_get_group_name(struct pinctrl_dev *pcdev,
1166ac73095SBeniamino Galvani unsigned selector)
1176ac73095SBeniamino Galvani {
1186ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
1196ac73095SBeniamino Galvani
1206ac73095SBeniamino Galvani return pc->data->groups[selector].name;
1216ac73095SBeniamino Galvani }
1226ac73095SBeniamino Galvani
meson_get_group_pins(struct pinctrl_dev * pcdev,unsigned selector,const unsigned ** pins,unsigned * num_pins)1236ac73095SBeniamino Galvani static int meson_get_group_pins(struct pinctrl_dev *pcdev, unsigned selector,
1246ac73095SBeniamino Galvani const unsigned **pins, unsigned *num_pins)
1256ac73095SBeniamino Galvani {
1266ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
1276ac73095SBeniamino Galvani
1286ac73095SBeniamino Galvani *pins = pc->data->groups[selector].pins;
1296ac73095SBeniamino Galvani *num_pins = pc->data->groups[selector].num_pins;
1306ac73095SBeniamino Galvani
1316ac73095SBeniamino Galvani return 0;
1326ac73095SBeniamino Galvani }
1336ac73095SBeniamino Galvani
meson_pin_dbg_show(struct pinctrl_dev * pcdev,struct seq_file * s,unsigned offset)1346ac73095SBeniamino Galvani static void meson_pin_dbg_show(struct pinctrl_dev *pcdev, struct seq_file *s,
1356ac73095SBeniamino Galvani unsigned offset)
1366ac73095SBeniamino Galvani {
1376ac73095SBeniamino Galvani seq_printf(s, " %s", dev_name(pcdev->dev));
1386ac73095SBeniamino Galvani }
1396ac73095SBeniamino Galvani
1406ac73095SBeniamino Galvani static const struct pinctrl_ops meson_pctrl_ops = {
1416ac73095SBeniamino Galvani .get_groups_count = meson_get_groups_count,
1426ac73095SBeniamino Galvani .get_group_name = meson_get_group_name,
1436ac73095SBeniamino Galvani .get_group_pins = meson_get_group_pins,
1446ac73095SBeniamino Galvani .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
145d32f7fd3SIrina Tirdea .dt_free_map = pinctrl_utils_free_map,
1466ac73095SBeniamino Galvani .pin_dbg_show = meson_pin_dbg_show,
1476ac73095SBeniamino Galvani };
1486ac73095SBeniamino Galvani
meson_pmx_get_funcs_count(struct pinctrl_dev * pcdev)149ce385aa2SJerome Brunet int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev)
1506ac73095SBeniamino Galvani {
1516ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
1526ac73095SBeniamino Galvani
1536ac73095SBeniamino Galvani return pc->data->num_funcs;
1546ac73095SBeniamino Galvani }
1559c65441eSKevin Hilman EXPORT_SYMBOL_GPL(meson_pmx_get_funcs_count);
1566ac73095SBeniamino Galvani
meson_pmx_get_func_name(struct pinctrl_dev * pcdev,unsigned selector)157ce385aa2SJerome Brunet const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
1586ac73095SBeniamino Galvani unsigned selector)
1596ac73095SBeniamino Galvani {
1606ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
1616ac73095SBeniamino Galvani
1626ac73095SBeniamino Galvani return pc->data->funcs[selector].name;
1636ac73095SBeniamino Galvani }
1649c65441eSKevin Hilman EXPORT_SYMBOL_GPL(meson_pmx_get_func_name);
1656ac73095SBeniamino Galvani
meson_pmx_get_groups(struct pinctrl_dev * pcdev,unsigned selector,const char * const ** groups,unsigned * const num_groups)166ce385aa2SJerome Brunet int meson_pmx_get_groups(struct pinctrl_dev *pcdev, unsigned selector,
1676ac73095SBeniamino Galvani const char * const **groups,
1686ac73095SBeniamino Galvani unsigned * const num_groups)
1696ac73095SBeniamino Galvani {
1706ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
1716ac73095SBeniamino Galvani
1726ac73095SBeniamino Galvani *groups = pc->data->funcs[selector].groups;
1736ac73095SBeniamino Galvani *num_groups = pc->data->funcs[selector].num_groups;
1746ac73095SBeniamino Galvani
1756ac73095SBeniamino Galvani return 0;
1766ac73095SBeniamino Galvani }
1779c65441eSKevin Hilman EXPORT_SYMBOL_GPL(meson_pmx_get_groups);
1786ac73095SBeniamino Galvani
meson_pinconf_set_gpio_bit(struct meson_pinctrl * pc,unsigned int pin,unsigned int reg_type,bool arg)179b22a7f85SJerome Brunet static int meson_pinconf_set_gpio_bit(struct meson_pinctrl *pc,
180b22a7f85SJerome Brunet unsigned int pin,
181b22a7f85SJerome Brunet unsigned int reg_type,
182b22a7f85SJerome Brunet bool arg)
1836ac73095SBeniamino Galvani {
1846ac73095SBeniamino Galvani struct meson_bank *bank;
1856ac73095SBeniamino Galvani unsigned int reg, bit;
186b22a7f85SJerome Brunet int ret;
1876ac73095SBeniamino Galvani
188db80f0e1SBeniamino Galvani ret = meson_get_bank(pc, pin, &bank);
1896ac73095SBeniamino Galvani if (ret)
1906ac73095SBeniamino Galvani return ret;
1916ac73095SBeniamino Galvani
192b22a7f85SJerome Brunet meson_calc_reg_and_bit(bank, pin, reg_type, ®, &bit);
193b22a7f85SJerome Brunet return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
194b22a7f85SJerome Brunet arg ? BIT(bit) : 0);
195b22a7f85SJerome Brunet }
196b22a7f85SJerome Brunet
meson_pinconf_get_gpio_bit(struct meson_pinctrl * pc,unsigned int pin,unsigned int reg_type)197b22a7f85SJerome Brunet static int meson_pinconf_get_gpio_bit(struct meson_pinctrl *pc,
198b22a7f85SJerome Brunet unsigned int pin,
199b22a7f85SJerome Brunet unsigned int reg_type)
200b22a7f85SJerome Brunet {
201b22a7f85SJerome Brunet struct meson_bank *bank;
202b22a7f85SJerome Brunet unsigned int reg, bit, val;
203b22a7f85SJerome Brunet int ret;
204b22a7f85SJerome Brunet
205b22a7f85SJerome Brunet ret = meson_get_bank(pc, pin, &bank);
206b22a7f85SJerome Brunet if (ret)
207b22a7f85SJerome Brunet return ret;
208b22a7f85SJerome Brunet
209b22a7f85SJerome Brunet meson_calc_reg_and_bit(bank, pin, reg_type, ®, &bit);
210b22a7f85SJerome Brunet ret = regmap_read(pc->reg_gpio, reg, &val);
211b22a7f85SJerome Brunet if (ret)
212b22a7f85SJerome Brunet return ret;
213b22a7f85SJerome Brunet
214b22a7f85SJerome Brunet return BIT(bit) & val ? 1 : 0;
215b22a7f85SJerome Brunet }
216b22a7f85SJerome Brunet
meson_pinconf_set_output(struct meson_pinctrl * pc,unsigned int pin,bool out)217b22a7f85SJerome Brunet static int meson_pinconf_set_output(struct meson_pinctrl *pc,
218b22a7f85SJerome Brunet unsigned int pin,
219b22a7f85SJerome Brunet bool out)
220b22a7f85SJerome Brunet {
2212b2dce80SAndy Shevchenko return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_DIR, !out);
222b22a7f85SJerome Brunet }
223b22a7f85SJerome Brunet
meson_pinconf_get_output(struct meson_pinctrl * pc,unsigned int pin)224b22a7f85SJerome Brunet static int meson_pinconf_get_output(struct meson_pinctrl *pc,
225b22a7f85SJerome Brunet unsigned int pin)
226b22a7f85SJerome Brunet {
2272b2dce80SAndy Shevchenko int ret = meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_DIR);
228b22a7f85SJerome Brunet
229b22a7f85SJerome Brunet if (ret < 0)
230b22a7f85SJerome Brunet return ret;
231b22a7f85SJerome Brunet
232b22a7f85SJerome Brunet return !ret;
233b22a7f85SJerome Brunet }
234b22a7f85SJerome Brunet
meson_pinconf_set_drive(struct meson_pinctrl * pc,unsigned int pin,bool high)235b22a7f85SJerome Brunet static int meson_pinconf_set_drive(struct meson_pinctrl *pc,
236b22a7f85SJerome Brunet unsigned int pin,
237b22a7f85SJerome Brunet bool high)
238b22a7f85SJerome Brunet {
2392b2dce80SAndy Shevchenko return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_OUT, high);
240b22a7f85SJerome Brunet }
241b22a7f85SJerome Brunet
meson_pinconf_get_drive(struct meson_pinctrl * pc,unsigned int pin)242b22a7f85SJerome Brunet static int meson_pinconf_get_drive(struct meson_pinctrl *pc,
243b22a7f85SJerome Brunet unsigned int pin)
244b22a7f85SJerome Brunet {
2452b2dce80SAndy Shevchenko return meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_OUT);
246b22a7f85SJerome Brunet }
247b22a7f85SJerome Brunet
meson_pinconf_set_output_drive(struct meson_pinctrl * pc,unsigned int pin,bool high)248b22a7f85SJerome Brunet static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc,
249b22a7f85SJerome Brunet unsigned int pin,
250b22a7f85SJerome Brunet bool high)
251b22a7f85SJerome Brunet {
252b22a7f85SJerome Brunet int ret;
253b22a7f85SJerome Brunet
254b22a7f85SJerome Brunet ret = meson_pinconf_set_output(pc, pin, true);
255b22a7f85SJerome Brunet if (ret)
256b22a7f85SJerome Brunet return ret;
257b22a7f85SJerome Brunet
258b22a7f85SJerome Brunet return meson_pinconf_set_drive(pc, pin, high);
259b22a7f85SJerome Brunet }
260b22a7f85SJerome Brunet
meson_pinconf_disable_bias(struct meson_pinctrl * pc,unsigned int pin)2619959d9a7SGuillaume La Roque static int meson_pinconf_disable_bias(struct meson_pinctrl *pc,
2629959d9a7SGuillaume La Roque unsigned int pin)
2636ac73095SBeniamino Galvani {
2646ac73095SBeniamino Galvani struct meson_bank *bank;
2659959d9a7SGuillaume La Roque unsigned int reg, bit = 0;
2669959d9a7SGuillaume La Roque int ret;
2676ac73095SBeniamino Galvani
2686ac73095SBeniamino Galvani ret = meson_get_bank(pc, pin, &bank);
2696ac73095SBeniamino Galvani if (ret)
2706ac73095SBeniamino Galvani return ret;
2716ac73095SBeniamino Galvani
2722b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit);
2739959d9a7SGuillaume La Roque ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), 0);
2749959d9a7SGuillaume La Roque if (ret)
2759959d9a7SGuillaume La Roque return ret;
2769959d9a7SGuillaume La Roque
2779959d9a7SGuillaume La Roque return 0;
2789959d9a7SGuillaume La Roque }
2799959d9a7SGuillaume La Roque
meson_pinconf_enable_bias(struct meson_pinctrl * pc,unsigned int pin,bool pull_up)2809959d9a7SGuillaume La Roque static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin,
2819959d9a7SGuillaume La Roque bool pull_up)
2829959d9a7SGuillaume La Roque {
2839959d9a7SGuillaume La Roque struct meson_bank *bank;
2849959d9a7SGuillaume La Roque unsigned int reg, bit, val = 0;
2859959d9a7SGuillaume La Roque int ret;
2869959d9a7SGuillaume La Roque
2879959d9a7SGuillaume La Roque ret = meson_get_bank(pc, pin, &bank);
2889959d9a7SGuillaume La Roque if (ret)
2899959d9a7SGuillaume La Roque return ret;
2909959d9a7SGuillaume La Roque
2912b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit);
2929959d9a7SGuillaume La Roque if (pull_up)
2939959d9a7SGuillaume La Roque val = BIT(bit);
2949959d9a7SGuillaume La Roque
2959959d9a7SGuillaume La Roque ret = regmap_update_bits(pc->reg_pull, reg, BIT(bit), val);
2969959d9a7SGuillaume La Roque if (ret)
2979959d9a7SGuillaume La Roque return ret;
2989959d9a7SGuillaume La Roque
2992b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit);
3009959d9a7SGuillaume La Roque ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), BIT(bit));
3019959d9a7SGuillaume La Roque if (ret)
3029959d9a7SGuillaume La Roque return ret;
3039959d9a7SGuillaume La Roque
3049959d9a7SGuillaume La Roque return 0;
3059959d9a7SGuillaume La Roque }
3069959d9a7SGuillaume La Roque
meson_pinconf_set_drive_strength(struct meson_pinctrl * pc,unsigned int pin,u16 drive_strength_ua)3076ea3e3bbSGuillaume La Roque static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc,
3086ea3e3bbSGuillaume La Roque unsigned int pin,
3096ea3e3bbSGuillaume La Roque u16 drive_strength_ua)
3106ea3e3bbSGuillaume La Roque {
3116ea3e3bbSGuillaume La Roque struct meson_bank *bank;
3126ea3e3bbSGuillaume La Roque unsigned int reg, bit, ds_val;
3136ea3e3bbSGuillaume La Roque int ret;
3146ea3e3bbSGuillaume La Roque
3156ea3e3bbSGuillaume La Roque if (!pc->reg_ds) {
3166ea3e3bbSGuillaume La Roque dev_err(pc->dev, "drive-strength not supported\n");
3176ea3e3bbSGuillaume La Roque return -ENOTSUPP;
3186ea3e3bbSGuillaume La Roque }
3196ea3e3bbSGuillaume La Roque
3206ea3e3bbSGuillaume La Roque ret = meson_get_bank(pc, pin, &bank);
3216ea3e3bbSGuillaume La Roque if (ret)
3226ea3e3bbSGuillaume La Roque return ret;
3236ea3e3bbSGuillaume La Roque
3242b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit);
3256ea3e3bbSGuillaume La Roque
3266ea3e3bbSGuillaume La Roque if (drive_strength_ua <= 500) {
3276ea3e3bbSGuillaume La Roque ds_val = MESON_PINCONF_DRV_500UA;
3286ea3e3bbSGuillaume La Roque } else if (drive_strength_ua <= 2500) {
3296ea3e3bbSGuillaume La Roque ds_val = MESON_PINCONF_DRV_2500UA;
3306ea3e3bbSGuillaume La Roque } else if (drive_strength_ua <= 3000) {
3316ea3e3bbSGuillaume La Roque ds_val = MESON_PINCONF_DRV_3000UA;
3326ea3e3bbSGuillaume La Roque } else if (drive_strength_ua <= 4000) {
3336ea3e3bbSGuillaume La Roque ds_val = MESON_PINCONF_DRV_4000UA;
3346ea3e3bbSGuillaume La Roque } else {
3356ea3e3bbSGuillaume La Roque dev_warn_once(pc->dev,
3366ea3e3bbSGuillaume La Roque "pin %u: invalid drive-strength : %d , default to 4mA\n",
3376ea3e3bbSGuillaume La Roque pin, drive_strength_ua);
3386ea3e3bbSGuillaume La Roque ds_val = MESON_PINCONF_DRV_4000UA;
3396ea3e3bbSGuillaume La Roque }
3406ea3e3bbSGuillaume La Roque
3416ea3e3bbSGuillaume La Roque ret = regmap_update_bits(pc->reg_ds, reg, 0x3 << bit, ds_val << bit);
3426ea3e3bbSGuillaume La Roque if (ret)
3436ea3e3bbSGuillaume La Roque return ret;
3446ea3e3bbSGuillaume La Roque
3456ea3e3bbSGuillaume La Roque return 0;
3466ea3e3bbSGuillaume La Roque }
3476ea3e3bbSGuillaume La Roque
meson_pinconf_set(struct pinctrl_dev * pcdev,unsigned int pin,unsigned long * configs,unsigned num_configs)3489959d9a7SGuillaume La Roque static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
3499959d9a7SGuillaume La Roque unsigned long *configs, unsigned num_configs)
3509959d9a7SGuillaume La Roque {
3519959d9a7SGuillaume La Roque struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
3529959d9a7SGuillaume La Roque enum pin_config_param param;
353b22a7f85SJerome Brunet unsigned int arg = 0;
3549959d9a7SGuillaume La Roque int i, ret;
3559959d9a7SGuillaume La Roque
3566ac73095SBeniamino Galvani for (i = 0; i < num_configs; i++) {
3576ac73095SBeniamino Galvani param = pinconf_to_config_param(configs[i]);
3586ac73095SBeniamino Galvani
3596ac73095SBeniamino Galvani switch (param) {
360b22a7f85SJerome Brunet case PIN_CONFIG_DRIVE_STRENGTH_UA:
361b22a7f85SJerome Brunet case PIN_CONFIG_OUTPUT_ENABLE:
362b22a7f85SJerome Brunet case PIN_CONFIG_OUTPUT:
363b22a7f85SJerome Brunet arg = pinconf_to_config_argument(configs[i]);
364b22a7f85SJerome Brunet break;
3656ac73095SBeniamino Galvani
366b22a7f85SJerome Brunet default:
367b22a7f85SJerome Brunet break;
368b22a7f85SJerome Brunet }
369b22a7f85SJerome Brunet
370b22a7f85SJerome Brunet switch (param) {
3716ac73095SBeniamino Galvani case PIN_CONFIG_BIAS_DISABLE:
3729959d9a7SGuillaume La Roque ret = meson_pinconf_disable_bias(pc, pin);
3736ac73095SBeniamino Galvani break;
3746ac73095SBeniamino Galvani case PIN_CONFIG_BIAS_PULL_UP:
3759959d9a7SGuillaume La Roque ret = meson_pinconf_enable_bias(pc, pin, true);
3766ac73095SBeniamino Galvani break;
3776ac73095SBeniamino Galvani case PIN_CONFIG_BIAS_PULL_DOWN:
3789959d9a7SGuillaume La Roque ret = meson_pinconf_enable_bias(pc, pin, false);
3796ac73095SBeniamino Galvani break;
3806ea3e3bbSGuillaume La Roque case PIN_CONFIG_DRIVE_STRENGTH_UA:
381b22a7f85SJerome Brunet ret = meson_pinconf_set_drive_strength(pc, pin, arg);
382b22a7f85SJerome Brunet break;
383b22a7f85SJerome Brunet case PIN_CONFIG_OUTPUT_ENABLE:
384b22a7f85SJerome Brunet ret = meson_pinconf_set_output(pc, pin, arg);
385b22a7f85SJerome Brunet break;
386b22a7f85SJerome Brunet case PIN_CONFIG_OUTPUT:
387b22a7f85SJerome Brunet ret = meson_pinconf_set_output_drive(pc, pin, arg);
3886ac73095SBeniamino Galvani break;
3896ac73095SBeniamino Galvani default:
390b22a7f85SJerome Brunet ret = -ENOTSUPP;
3916ac73095SBeniamino Galvani }
392b22a7f85SJerome Brunet
393b22a7f85SJerome Brunet if (ret)
394b22a7f85SJerome Brunet return ret;
3956ac73095SBeniamino Galvani }
3966ac73095SBeniamino Galvani
3976ac73095SBeniamino Galvani return 0;
3986ac73095SBeniamino Galvani }
3996ac73095SBeniamino Galvani
meson_pinconf_get_pull(struct meson_pinctrl * pc,unsigned int pin)4006ac73095SBeniamino Galvani static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
4016ac73095SBeniamino Galvani {
4026ac73095SBeniamino Galvani struct meson_bank *bank;
4036ac73095SBeniamino Galvani unsigned int reg, bit, val;
4046ac73095SBeniamino Galvani int ret, conf;
4056ac73095SBeniamino Galvani
406db80f0e1SBeniamino Galvani ret = meson_get_bank(pc, pin, &bank);
4076ac73095SBeniamino Galvani if (ret)
4086ac73095SBeniamino Galvani return ret;
4096ac73095SBeniamino Galvani
4102b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit);
4116ac73095SBeniamino Galvani
412db80f0e1SBeniamino Galvani ret = regmap_read(pc->reg_pullen, reg, &val);
4136ac73095SBeniamino Galvani if (ret)
4146ac73095SBeniamino Galvani return ret;
4156ac73095SBeniamino Galvani
4166ac73095SBeniamino Galvani if (!(val & BIT(bit))) {
4176ac73095SBeniamino Galvani conf = PIN_CONFIG_BIAS_DISABLE;
4186ac73095SBeniamino Galvani } else {
4192b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit);
4206ac73095SBeniamino Galvani
421db80f0e1SBeniamino Galvani ret = regmap_read(pc->reg_pull, reg, &val);
4226ac73095SBeniamino Galvani if (ret)
4236ac73095SBeniamino Galvani return ret;
4246ac73095SBeniamino Galvani
4256ac73095SBeniamino Galvani if (val & BIT(bit))
4266ac73095SBeniamino Galvani conf = PIN_CONFIG_BIAS_PULL_UP;
4276ac73095SBeniamino Galvani else
4286ac73095SBeniamino Galvani conf = PIN_CONFIG_BIAS_PULL_DOWN;
4296ac73095SBeniamino Galvani }
4306ac73095SBeniamino Galvani
4316ac73095SBeniamino Galvani return conf;
4326ac73095SBeniamino Galvani }
4336ac73095SBeniamino Galvani
meson_pinconf_get_drive_strength(struct meson_pinctrl * pc,unsigned int pin,u16 * drive_strength_ua)4346ea3e3bbSGuillaume La Roque static int meson_pinconf_get_drive_strength(struct meson_pinctrl *pc,
4356ea3e3bbSGuillaume La Roque unsigned int pin,
4366ea3e3bbSGuillaume La Roque u16 *drive_strength_ua)
4376ea3e3bbSGuillaume La Roque {
4386ea3e3bbSGuillaume La Roque struct meson_bank *bank;
4396ea3e3bbSGuillaume La Roque unsigned int reg, bit;
4406ea3e3bbSGuillaume La Roque unsigned int val;
4416ea3e3bbSGuillaume La Roque int ret;
4426ea3e3bbSGuillaume La Roque
4436ea3e3bbSGuillaume La Roque if (!pc->reg_ds)
4446ea3e3bbSGuillaume La Roque return -ENOTSUPP;
4456ea3e3bbSGuillaume La Roque
4466ea3e3bbSGuillaume La Roque ret = meson_get_bank(pc, pin, &bank);
4476ea3e3bbSGuillaume La Roque if (ret)
4486ea3e3bbSGuillaume La Roque return ret;
4496ea3e3bbSGuillaume La Roque
4502b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit);
4516ea3e3bbSGuillaume La Roque
4526ea3e3bbSGuillaume La Roque ret = regmap_read(pc->reg_ds, reg, &val);
4536ea3e3bbSGuillaume La Roque if (ret)
4546ea3e3bbSGuillaume La Roque return ret;
4556ea3e3bbSGuillaume La Roque
4566ea3e3bbSGuillaume La Roque switch ((val >> bit) & 0x3) {
4576ea3e3bbSGuillaume La Roque case MESON_PINCONF_DRV_500UA:
4586ea3e3bbSGuillaume La Roque *drive_strength_ua = 500;
4596ea3e3bbSGuillaume La Roque break;
4606ea3e3bbSGuillaume La Roque case MESON_PINCONF_DRV_2500UA:
4616ea3e3bbSGuillaume La Roque *drive_strength_ua = 2500;
4626ea3e3bbSGuillaume La Roque break;
4636ea3e3bbSGuillaume La Roque case MESON_PINCONF_DRV_3000UA:
4646ea3e3bbSGuillaume La Roque *drive_strength_ua = 3000;
4656ea3e3bbSGuillaume La Roque break;
4666ea3e3bbSGuillaume La Roque case MESON_PINCONF_DRV_4000UA:
4676ea3e3bbSGuillaume La Roque *drive_strength_ua = 4000;
4686ea3e3bbSGuillaume La Roque break;
4696ea3e3bbSGuillaume La Roque default:
4706ea3e3bbSGuillaume La Roque return -EINVAL;
4716ea3e3bbSGuillaume La Roque }
4726ea3e3bbSGuillaume La Roque
4736ea3e3bbSGuillaume La Roque return 0;
4746ea3e3bbSGuillaume La Roque }
4756ea3e3bbSGuillaume La Roque
meson_pinconf_get(struct pinctrl_dev * pcdev,unsigned int pin,unsigned long * config)4766ac73095SBeniamino Galvani static int meson_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
4776ac73095SBeniamino Galvani unsigned long *config)
4786ac73095SBeniamino Galvani {
4796ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
4806ac73095SBeniamino Galvani enum pin_config_param param = pinconf_to_config_param(*config);
4816ac73095SBeniamino Galvani u16 arg;
4826ea3e3bbSGuillaume La Roque int ret;
4836ac73095SBeniamino Galvani
4846ac73095SBeniamino Galvani switch (param) {
4856ac73095SBeniamino Galvani case PIN_CONFIG_BIAS_DISABLE:
4866ac73095SBeniamino Galvani case PIN_CONFIG_BIAS_PULL_DOWN:
4876ac73095SBeniamino Galvani case PIN_CONFIG_BIAS_PULL_UP:
4886ac73095SBeniamino Galvani if (meson_pinconf_get_pull(pc, pin) == param)
4896ac73095SBeniamino Galvani arg = 1;
4906ac73095SBeniamino Galvani else
4916ac73095SBeniamino Galvani return -EINVAL;
4926ac73095SBeniamino Galvani break;
4936ea3e3bbSGuillaume La Roque case PIN_CONFIG_DRIVE_STRENGTH_UA:
4946ea3e3bbSGuillaume La Roque ret = meson_pinconf_get_drive_strength(pc, pin, &arg);
4956ea3e3bbSGuillaume La Roque if (ret)
4966ea3e3bbSGuillaume La Roque return ret;
4976ea3e3bbSGuillaume La Roque break;
498b22a7f85SJerome Brunet case PIN_CONFIG_OUTPUT_ENABLE:
499b22a7f85SJerome Brunet ret = meson_pinconf_get_output(pc, pin);
500b22a7f85SJerome Brunet if (ret <= 0)
501b22a7f85SJerome Brunet return -EINVAL;
502b22a7f85SJerome Brunet arg = 1;
503b22a7f85SJerome Brunet break;
504b22a7f85SJerome Brunet case PIN_CONFIG_OUTPUT:
505b22a7f85SJerome Brunet ret = meson_pinconf_get_output(pc, pin);
506b22a7f85SJerome Brunet if (ret <= 0)
507b22a7f85SJerome Brunet return -EINVAL;
508b22a7f85SJerome Brunet
509b22a7f85SJerome Brunet ret = meson_pinconf_get_drive(pc, pin);
510b22a7f85SJerome Brunet if (ret < 0)
511b22a7f85SJerome Brunet return -EINVAL;
512b22a7f85SJerome Brunet
513b22a7f85SJerome Brunet arg = ret;
514b22a7f85SJerome Brunet break;
515b22a7f85SJerome Brunet
5166ac73095SBeniamino Galvani default:
5176ac73095SBeniamino Galvani return -ENOTSUPP;
5186ac73095SBeniamino Galvani }
5196ac73095SBeniamino Galvani
5206ac73095SBeniamino Galvani *config = pinconf_to_config_packed(param, arg);
5216ac73095SBeniamino Galvani dev_dbg(pc->dev, "pinconf for pin %u is %lu\n", pin, *config);
5226ac73095SBeniamino Galvani
5236ac73095SBeniamino Galvani return 0;
5246ac73095SBeniamino Galvani }
5256ac73095SBeniamino Galvani
meson_pinconf_group_set(struct pinctrl_dev * pcdev,unsigned int num_group,unsigned long * configs,unsigned num_configs)5266ac73095SBeniamino Galvani static int meson_pinconf_group_set(struct pinctrl_dev *pcdev,
5276ac73095SBeniamino Galvani unsigned int num_group,
5286ac73095SBeniamino Galvani unsigned long *configs, unsigned num_configs)
5296ac73095SBeniamino Galvani {
5306ac73095SBeniamino Galvani struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
5316ac73095SBeniamino Galvani struct meson_pmx_group *group = &pc->data->groups[num_group];
5326ac73095SBeniamino Galvani int i;
5336ac73095SBeniamino Galvani
5346ac73095SBeniamino Galvani dev_dbg(pc->dev, "set pinconf for group %s\n", group->name);
5356ac73095SBeniamino Galvani
5366ac73095SBeniamino Galvani for (i = 0; i < group->num_pins; i++) {
5376ac73095SBeniamino Galvani meson_pinconf_set(pcdev, group->pins[i], configs,
5386ac73095SBeniamino Galvani num_configs);
5396ac73095SBeniamino Galvani }
5406ac73095SBeniamino Galvani
5416ac73095SBeniamino Galvani return 0;
5426ac73095SBeniamino Galvani }
5436ac73095SBeniamino Galvani
meson_pinconf_group_get(struct pinctrl_dev * pcdev,unsigned int group,unsigned long * config)5446ac73095SBeniamino Galvani static int meson_pinconf_group_get(struct pinctrl_dev *pcdev,
5456ac73095SBeniamino Galvani unsigned int group, unsigned long *config)
5466ac73095SBeniamino Galvani {
5471ffbf50bSJerome Brunet return -ENOTSUPP;
5486ac73095SBeniamino Galvani }
5496ac73095SBeniamino Galvani
5506ac73095SBeniamino Galvani static const struct pinconf_ops meson_pinconf_ops = {
5516ac73095SBeniamino Galvani .pin_config_get = meson_pinconf_get,
5526ac73095SBeniamino Galvani .pin_config_set = meson_pinconf_set,
5536ac73095SBeniamino Galvani .pin_config_group_get = meson_pinconf_group_get,
5546ac73095SBeniamino Galvani .pin_config_group_set = meson_pinconf_group_set,
5556ac73095SBeniamino Galvani .is_generic = true,
5566ac73095SBeniamino Galvani };
5576ac73095SBeniamino Galvani
meson_gpio_get_direction(struct gpio_chip * chip,unsigned gpio)558ef1d0bceSMartin Blumenstingl static int meson_gpio_get_direction(struct gpio_chip *chip, unsigned gpio)
559ef1d0bceSMartin Blumenstingl {
560ef1d0bceSMartin Blumenstingl struct meson_pinctrl *pc = gpiochip_get_data(chip);
561ef1d0bceSMartin Blumenstingl int ret;
562ef1d0bceSMartin Blumenstingl
563ef1d0bceSMartin Blumenstingl ret = meson_pinconf_get_output(pc, gpio);
564ef1d0bceSMartin Blumenstingl if (ret < 0)
565ef1d0bceSMartin Blumenstingl return ret;
566ef1d0bceSMartin Blumenstingl
567ef1d0bceSMartin Blumenstingl return ret ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
568ef1d0bceSMartin Blumenstingl }
569ef1d0bceSMartin Blumenstingl
meson_gpio_direction_input(struct gpio_chip * chip,unsigned gpio)5706ac73095SBeniamino Galvani static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
5716ac73095SBeniamino Galvani {
572b22a7f85SJerome Brunet return meson_pinconf_set_output(gpiochip_get_data(chip), gpio, false);
5736ac73095SBeniamino Galvani }
5746ac73095SBeniamino Galvani
meson_gpio_direction_output(struct gpio_chip * chip,unsigned gpio,int value)5756ac73095SBeniamino Galvani static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
5766ac73095SBeniamino Galvani int value)
5776ac73095SBeniamino Galvani {
578b22a7f85SJerome Brunet return meson_pinconf_set_output_drive(gpiochip_get_data(chip),
579b22a7f85SJerome Brunet gpio, value);
5806ac73095SBeniamino Galvani }
5816ac73095SBeniamino Galvani
meson_gpio_set(struct gpio_chip * chip,unsigned gpio,int value)5826ac73095SBeniamino Galvani static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
5836ac73095SBeniamino Galvani {
584b22a7f85SJerome Brunet meson_pinconf_set_drive(gpiochip_get_data(chip), gpio, value);
5856ac73095SBeniamino Galvani }
5866ac73095SBeniamino Galvani
meson_gpio_get(struct gpio_chip * chip,unsigned gpio)5876ac73095SBeniamino Galvani static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
5886ac73095SBeniamino Galvani {
589db80f0e1SBeniamino Galvani struct meson_pinctrl *pc = gpiochip_get_data(chip);
59070e5ecb1SJerome Brunet unsigned int reg, bit, val;
5916ac73095SBeniamino Galvani struct meson_bank *bank;
5926ac73095SBeniamino Galvani int ret;
5936ac73095SBeniamino Galvani
59470e5ecb1SJerome Brunet ret = meson_get_bank(pc, gpio, &bank);
5956ac73095SBeniamino Galvani if (ret)
5966ac73095SBeniamino Galvani return ret;
5976ac73095SBeniamino Galvani
5982b2dce80SAndy Shevchenko meson_calc_reg_and_bit(bank, gpio, MESON_REG_IN, ®, &bit);
599db80f0e1SBeniamino Galvani regmap_read(pc->reg_gpio, reg, &val);
6006ac73095SBeniamino Galvani
6016ac73095SBeniamino Galvani return !!(val & BIT(bit));
6026ac73095SBeniamino Galvani }
6036ac73095SBeniamino Galvani
meson_gpiolib_register(struct meson_pinctrl * pc)6046ac73095SBeniamino Galvani static int meson_gpiolib_register(struct meson_pinctrl *pc)
6056ac73095SBeniamino Galvani {
6069dab1868SCarlo Caione int ret;
6076ac73095SBeniamino Galvani
608db80f0e1SBeniamino Galvani pc->chip.label = pc->data->name;
609db80f0e1SBeniamino Galvani pc->chip.parent = pc->dev;
610*827eb27eSAndy Shevchenko pc->chip.fwnode = pc->fwnode;
611634e40b0SJerome Brunet pc->chip.request = gpiochip_generic_request;
612634e40b0SJerome Brunet pc->chip.free = gpiochip_generic_free;
613f8f0aa00SMartin Blumenstingl pc->chip.set_config = gpiochip_generic_config;
614ef1d0bceSMartin Blumenstingl pc->chip.get_direction = meson_gpio_get_direction;
615db80f0e1SBeniamino Galvani pc->chip.direction_input = meson_gpio_direction_input;
616db80f0e1SBeniamino Galvani pc->chip.direction_output = meson_gpio_direction_output;
617db80f0e1SBeniamino Galvani pc->chip.get = meson_gpio_get;
618db80f0e1SBeniamino Galvani pc->chip.set = meson_gpio_set;
619634e40b0SJerome Brunet pc->chip.base = -1;
620db80f0e1SBeniamino Galvani pc->chip.ngpio = pc->data->num_pins;
621db80f0e1SBeniamino Galvani pc->chip.can_sleep = false;
6226ac73095SBeniamino Galvani
623db80f0e1SBeniamino Galvani ret = gpiochip_add_data(&pc->chip, pc);
6246ac73095SBeniamino Galvani if (ret) {
6256ac73095SBeniamino Galvani dev_err(pc->dev, "can't add gpio chip %s\n",
626db80f0e1SBeniamino Galvani pc->data->name);
627c7fc5fbaSNeil Armstrong return ret;
6286ac73095SBeniamino Galvani }
6296ac73095SBeniamino Galvani
6306ac73095SBeniamino Galvani return 0;
6316ac73095SBeniamino Galvani }
6326ac73095SBeniamino Galvani
6336ac73095SBeniamino Galvani static struct regmap_config meson_regmap_config = {
6346ac73095SBeniamino Galvani .reg_bits = 32,
6356ac73095SBeniamino Galvani .val_bits = 32,
6366ac73095SBeniamino Galvani .reg_stride = 4,
6376ac73095SBeniamino Galvani };
6386ac73095SBeniamino Galvani
meson_map_resource(struct meson_pinctrl * pc,struct device_node * node,char * name)6396ac73095SBeniamino Galvani static struct regmap *meson_map_resource(struct meson_pinctrl *pc,
6406ac73095SBeniamino Galvani struct device_node *node, char *name)
6416ac73095SBeniamino Galvani {
6426ac73095SBeniamino Galvani struct resource res;
6436ac73095SBeniamino Galvani void __iomem *base;
6446ac73095SBeniamino Galvani int i;
6456ac73095SBeniamino Galvani
6466ac73095SBeniamino Galvani i = of_property_match_string(node, "reg-names", name);
6476ac73095SBeniamino Galvani if (of_address_to_resource(node, i, &res))
648fd422964SQianggui Song return NULL;
6496ac73095SBeniamino Galvani
6506ac73095SBeniamino Galvani base = devm_ioremap_resource(pc->dev, &res);
6516ac73095SBeniamino Galvani if (IS_ERR(base))
6526ac73095SBeniamino Galvani return ERR_CAST(base);
6536ac73095SBeniamino Galvani
6546ac73095SBeniamino Galvani meson_regmap_config.max_register = resource_size(&res) - 4;
6556ac73095SBeniamino Galvani meson_regmap_config.name = devm_kasprintf(pc->dev, GFP_KERNEL,
65694f4e54cSRob Herring "%pOFn-%s", node,
6576ac73095SBeniamino Galvani name);
6586ac73095SBeniamino Galvani if (!meson_regmap_config.name)
6596ac73095SBeniamino Galvani return ERR_PTR(-ENOMEM);
6606ac73095SBeniamino Galvani
6616ac73095SBeniamino Galvani return devm_regmap_init_mmio(pc->dev, base, &meson_regmap_config);
6626ac73095SBeniamino Galvani }
6636ac73095SBeniamino Galvani
meson_pinctrl_parse_dt(struct meson_pinctrl * pc)664edc5601dSAndy Shevchenko static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc)
6656ac73095SBeniamino Galvani {
666edc5601dSAndy Shevchenko struct device_node *gpio_np;
667edc5601dSAndy Shevchenko unsigned int chips;
6686ac73095SBeniamino Galvani
669edc5601dSAndy Shevchenko chips = gpiochip_node_count(pc->dev);
670edc5601dSAndy Shevchenko if (!chips) {
671db80f0e1SBeniamino Galvani dev_err(pc->dev, "no gpio node found\n");
6726ac73095SBeniamino Galvani return -EINVAL;
6736ac73095SBeniamino Galvani }
674edc5601dSAndy Shevchenko if (chips > 1) {
675edc5601dSAndy Shevchenko dev_err(pc->dev, "multiple gpio nodes\n");
676edc5601dSAndy Shevchenko return -EINVAL;
677edc5601dSAndy Shevchenko }
6786ac73095SBeniamino Galvani
679*827eb27eSAndy Shevchenko pc->fwnode = gpiochip_node_get_first(pc->dev);
680*827eb27eSAndy Shevchenko gpio_np = to_of_node(pc->fwnode);
6816ac73095SBeniamino Galvani
682db80f0e1SBeniamino Galvani pc->reg_mux = meson_map_resource(pc, gpio_np, "mux");
683fd422964SQianggui Song if (IS_ERR_OR_NULL(pc->reg_mux)) {
6846ac73095SBeniamino Galvani dev_err(pc->dev, "mux registers not found\n");
685fd422964SQianggui Song return pc->reg_mux ? PTR_ERR(pc->reg_mux) : -ENOENT;
6866ac73095SBeniamino Galvani }
6876ac73095SBeniamino Galvani
688db80f0e1SBeniamino Galvani pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
689fd422964SQianggui Song if (IS_ERR_OR_NULL(pc->reg_gpio)) {
6906ac73095SBeniamino Galvani dev_err(pc->dev, "gpio registers not found\n");
691fd422964SQianggui Song return pc->reg_gpio ? PTR_ERR(pc->reg_gpio) : -ENOENT;
6926ac73095SBeniamino Galvani }
6936ac73095SBeniamino Galvani
694e66dd48eSXingyu Chen pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
695e66dd48eSXingyu Chen if (IS_ERR(pc->reg_pull))
696fd422964SQianggui Song pc->reg_pull = NULL;
697e66dd48eSXingyu Chen
698e66dd48eSXingyu Chen pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable");
699e66dd48eSXingyu Chen if (IS_ERR(pc->reg_pullen))
700fd422964SQianggui Song pc->reg_pullen = NULL;
701e66dd48eSXingyu Chen
70264856974SJerome Brunet pc->reg_ds = meson_map_resource(pc, gpio_np, "ds");
70364856974SJerome Brunet if (IS_ERR(pc->reg_ds)) {
70464856974SJerome Brunet dev_dbg(pc->dev, "ds registers not found - skipping\n");
70564856974SJerome Brunet pc->reg_ds = NULL;
70664856974SJerome Brunet }
70764856974SJerome Brunet
708fd422964SQianggui Song if (pc->data->parse_dt)
709fd422964SQianggui Song return pc->data->parse_dt(pc);
710fd422964SQianggui Song
711fd422964SQianggui Song return 0;
712fd422964SQianggui Song }
713fd422964SQianggui Song
meson8_aobus_parse_dt_extra(struct meson_pinctrl * pc)714fd422964SQianggui Song int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc)
715fd422964SQianggui Song {
716fd422964SQianggui Song if (!pc->reg_pull)
717fd422964SQianggui Song return -EINVAL;
718fd422964SQianggui Song
719fd422964SQianggui Song pc->reg_pullen = pc->reg_pull;
720fd422964SQianggui Song
7216ac73095SBeniamino Galvani return 0;
7226ac73095SBeniamino Galvani }
7239c65441eSKevin Hilman EXPORT_SYMBOL_GPL(meson8_aobus_parse_dt_extra);
7246ac73095SBeniamino Galvani
meson_a1_parse_dt_extra(struct meson_pinctrl * pc)725dabad1ffSQianggui Song int meson_a1_parse_dt_extra(struct meson_pinctrl *pc)
726dabad1ffSQianggui Song {
727dabad1ffSQianggui Song pc->reg_pull = pc->reg_gpio;
728dabad1ffSQianggui Song pc->reg_pullen = pc->reg_gpio;
729dabad1ffSQianggui Song pc->reg_ds = pc->reg_gpio;
730dabad1ffSQianggui Song
731dabad1ffSQianggui Song return 0;
732dabad1ffSQianggui Song }
7339c65441eSKevin Hilman EXPORT_SYMBOL_GPL(meson_a1_parse_dt_extra);
734dabad1ffSQianggui Song
meson_pinctrl_probe(struct platform_device * pdev)735277d14ebSJerome Brunet int meson_pinctrl_probe(struct platform_device *pdev)
7366ac73095SBeniamino Galvani {
7376ac73095SBeniamino Galvani struct device *dev = &pdev->dev;
7386ac73095SBeniamino Galvani struct meson_pinctrl *pc;
7396ac73095SBeniamino Galvani int ret;
7406ac73095SBeniamino Galvani
7416ac73095SBeniamino Galvani pc = devm_kzalloc(dev, sizeof(struct meson_pinctrl), GFP_KERNEL);
7426ac73095SBeniamino Galvani if (!pc)
7436ac73095SBeniamino Galvani return -ENOMEM;
7446ac73095SBeniamino Galvani
7456ac73095SBeniamino Galvani pc->dev = dev;
746277d14ebSJerome Brunet pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev);
7476ac73095SBeniamino Galvani
748edc5601dSAndy Shevchenko ret = meson_pinctrl_parse_dt(pc);
7496ac73095SBeniamino Galvani if (ret)
7506ac73095SBeniamino Galvani return ret;
7516ac73095SBeniamino Galvani
7526ac73095SBeniamino Galvani pc->desc.name = "pinctrl-meson";
7536ac73095SBeniamino Galvani pc->desc.owner = THIS_MODULE;
7546ac73095SBeniamino Galvani pc->desc.pctlops = &meson_pctrl_ops;
755ce385aa2SJerome Brunet pc->desc.pmxops = pc->data->pmx_ops;
7566ac73095SBeniamino Galvani pc->desc.confops = &meson_pinconf_ops;
7576ac73095SBeniamino Galvani pc->desc.pins = pc->data->pins;
7586ac73095SBeniamino Galvani pc->desc.npins = pc->data->num_pins;
7596ac73095SBeniamino Galvani
760e649f7ecSLaxman Dewangan pc->pcdev = devm_pinctrl_register(pc->dev, &pc->desc, pc);
761323de9efSMasahiro Yamada if (IS_ERR(pc->pcdev)) {
7626ac73095SBeniamino Galvani dev_err(pc->dev, "can't register pinctrl device");
763323de9efSMasahiro Yamada return PTR_ERR(pc->pcdev);
7646ac73095SBeniamino Galvani }
7656ac73095SBeniamino Galvani
7665b236d0fSWei Yongjun return meson_gpiolib_register(pc);
7676ac73095SBeniamino Galvani }
7689c65441eSKevin Hilman EXPORT_SYMBOL_GPL(meson_pinctrl_probe);
7699c65441eSKevin Hilman
7709c65441eSKevin Hilman MODULE_LICENSE("GPL v2");
771