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/openbmc/linux/Documentation/devicetree/bindings/dvfs/
H A Dperformance-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic performance domains
10 - Sudeep Holla <sudeep.holla@arm.com>
13 This binding is intended for performance management of groups of devices or
14 CPUs that run in the same performance domain. Performance domains must not
15 be confused with power domains. A performance domain is defined by a set
16 of devices that always have to run at the same performance level. For a given
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/openbmc/linux/include/linux/
H A Denergy_model.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct em_perf_state - Performance state of a performance domain
32 * EM_PERF_STATE_INEFFICIENT: The performance state is inefficient. There is
33 * in this em_perf_domain, another performance state with a higher frequency
40 * struct em_perf_domain - Performance domain
41 * @table: List of performance states, in ascending order
42 * @nr_perf_states: Number of performance states
44 * @cpus: Cpumask covering the CPUs of the domain. It's here
45 * for performance reasons to avoid potential cache
49 * In case of CPU device, a "performance domain" represents a group of CPUs
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H A Dscmi_protocol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2018-2021 ARM Ltd.
21 * struct scmi_revision_info - version information structure
30 * @impl_ver: A vendor-specific implementation version.
32 * @sub_vendor_id: A sub-vendor identifier(Null terminated ASCII string)
74 * struct scmi_clk_proto_ops - represents the various operations provided
106 * struct scmi_perf_proto_ops - represents the various operations provided
107 * by SCMI Performance Protocol
109 * @num_domains_get: gets the number of supported performance domains
110 * @info_get: get the information of a performance domain
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek-hw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Yuan <hector.yuan@mediatek.com>
19 const: mediatek,cpufreq-hw
26 each frequency domain. Each entry corresponds to
27 a register bank for each frequency domain present.
29 "#performance-domain-cells":
31 Number of cells in a performance domain specifier.
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H A Dapple,cluster-cpufreq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
15 operating-points-v2 table to define the CPU performance states, with the
16 opp-level property specifying the hardware p-state index for that level.
21 - items:
22 - enum:
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/openbmc/linux/kernel/power/
H A Denergy_model.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2018-2021, Arm ltd.
21 * Mutex serializing the registrations of performance domains and letting
28 return (dev->bus == &cpu_subsys); in _is_cpu_device()
39 snprintf(name, sizeof(name), "ps:%lu", ps->frequency); in em_debug_create_ps()
41 /* Create per-ps directory */ in em_debug_create_ps()
43 debugfs_create_ulong("frequency", 0444, d, &ps->frequency); in em_debug_create_ps()
44 debugfs_create_ulong("power", 0444, d, &ps->power); in em_debug_create_ps()
45 debugfs_create_ulong("cost", 0444, d, &ps->cost); in em_debug_create_ps()
46 debugfs_create_ulong("inefficient", 0444, d, &ps->flags); in em_debug_create_ps()
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/openbmc/u-boot/arch/arm/mach-omap2/omap5/
H A DKconfig6 DRA7xx is an OMAP based SOC with Dual Core A-15s.
13 bool "CompuLab CL-SOM-AM57x"
17 bool "CompuLab CM-T54"
62 expected to specify a pre-computed time using the above option.
71 menu "Voltage Domain OPP selections"
74 prompt "MPU Voltage Domain"
77 Select the Operating Performance Point(OPP) for the MPU voltage
78 domain on DRA7xx & AM57xx SoCs.
89 prompt "DSPEVE Voltage Domain"
91 Select the Operating Performance Point(OPP) for the DSPEVE voltage
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/openbmc/linux/Documentation/power/
H A Denergy-model.rst1 .. SPDX-License-Identifier: GPL-2.0
8 -----------
11 the power consumed by devices at various performance levels, and the kernel
12 subsystems willing to use that information to make energy-aware decisions.
18 each and every client subsystem to re-implement support for each and every
23 The power values might be expressed in micro-Watts or in an 'abstract scale'.
26 can be found in the Energy-Aware Scheduler documentation
27 Documentation/scheduler/sched-energy.rst. For some subsystems like thermal or
30 thus the real micro-Watts might be needed. An example of these requirements can
32 Documentation/driver-api/thermal/power_allocator.rst.
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/openbmc/linux/Documentation/scheduler/
H A Dsched-energy.rst6 ---------------
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
38 performance [inst/s]
39 --------------------
45 -----------
48 while still getting 'good' performance. It is essentially an alternative
49 optimization objective to the current performance-only objective for the
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/openbmc/linux/drivers/acpi/
H A Dprocessor_perflib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * processor_perflib.c - ACPI Processor P-States Library ($Revision: 71 $)
9 * - Added processor hotplug support
25 #define ACPI_PROCESSOR_FILE_PERFORMANCE "performance"
40 * -1 -> cpufreq low level drivers not initialized -> _PSS, etc. not called yet
42 * 0 -> cpufreq low level drivers initialized -> consider _PPC values
43 * 1 -> ignore _PPC totally -> forced by user through boot param
45 static int ignore_ppc = -1;
61 return -EINVAL; in acpi_processor_get_platform_limit()
67 status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc); in acpi_processor_get_platform_limit()
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/openbmc/linux/Documentation/powerpc/
H A Dassociativity.rst6 domains of substantially similar mean performance relative to resources outside
7 of that domain. Resources subsets of a given domain that exhibit better
8 performance relative to each other than relative to other resources subsets
9 are represented as being members of a sub-grouping domain. This performance
17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
23 ------
27 ------
28 With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
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/openbmc/linux/drivers/base/power/
H A Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
35 __routine = genpd->dev_ops.callback; \
54 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
60 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
65 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
70 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
81 __acquires(&genpd->slock) in genpd_lock_spin()
85 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
86 genpd->lock_flags = flags; in genpd_lock_spin()
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
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/openbmc/linux/drivers/soc/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 the low-power state for resources related to the remoteproc
26 resource on a RPM-hardened platform must use this database to get
43 be called qcom-cpr
87 allocate memory from OCMEM based on performance, latency and power
110 Say yes here to support USB-C and battery status on modern Qualcomm
133 purpose of exchanging sector-data between the remote filesystem
142 The RPM Master sleep stats driver provides detailed per-subsystem
144 assess whether all the low-power modes available are entered as
150 tristate "Qualcomm RPM-Hardened (RPMH) Communication"
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/openbmc/linux/drivers/cpufreq/
H A Dscmi-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
11 #include <linux/clk-provider.h>
37 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_get_rate()
41 ret = perf_ops->freq_get(ph, priv->domain_id, &rate, false); in scmi_cpufreq_get_rate()
48 * perf_ops->freq_set is not a synchronous, the actual OPP change will
55 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_set_target()
56 u64 freq = policy->freq_table[index].frequency; in scmi_cpufreq_set_target()
58 return perf_ops->freq_set(ph, priv->domain_id, freq * 1000, false); in scmi_cpufreq_set_target()
64 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_fast_switch()
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/openbmc/linux/drivers/clk/tegra/
H A Dclk-device.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/clk-provider.h>
18 * This driver manages performance state of the core power domain for the
33 struct device *dev = clk_dev->dev; in tegra_clock_set_pd_state()
38 if (opp == ERR_PTR(-ERANGE)) { in tegra_clock_set_pd_state()
43 * need to set up performance state of the power domain and in tegra_clock_set_pd_state()
71 mutex_lock(&clk_dev->lock); in tegra_clock_change_notify()
74 if (cnd->new_rate > cnd->old_rate) in tegra_clock_change_notify()
75 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
79 err = tegra_clock_set_pd_state(clk_dev, cnd->old_rate); in tegra_clock_change_notify()
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/openbmc/linux/include/dt-bindings/power/
H A Dqcom-rpmpd.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* SA8775P Power Domain Indexes */
26 /* SDM670 Power Domain Indexes */
36 /* SDM845 Power Domain Indexes */
47 /* SDX55 Power Domain Indexes */
52 /* SDX65 Power Domain Indexes */
60 /* SM6350 Power Domain Indexes */
68 /* SM6350 Power Domain Indexes */
80 /* SM8150 Power Domain Indexes */
102 /* SM8250 Power Domain Indexes */
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-event_source-devices-events2 /sys/devices/cpu/events/branch-misses
3 /sys/devices/cpu/events/cache-references
4 /sys/devices/cpu/events/cache-misses
5 /sys/devices/cpu/events/stalled-cycles-frontend
6 /sys/devices/cpu/events/branch-instructions
7 /sys/devices/cpu/events/stalled-cycles-backend
9 /sys/devices/cpu/events/cpu-cycles
13 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
15 Description: Generic performance monitoring events
17 A collection of performance monitoring events that may be
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/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt600x-dieX.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 …compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
12 #performance-domain-cells = <0>;
16 …compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
18 #performance-domain-cells = <0>;
22 …compatible = "apple,t6000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
24 #performance-domain-cells = <0>;
27 DIE_NODE(pmgr): power-management@28e080000 {
28 compatible = "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
29 #address-cells = <1>;
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/openbmc/linux/Documentation/admin-guide/pm/
H A Dintel_uncore_frequency_scaling.rst1 .. SPDX-License-Identifier: GPL-2.0
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
17 performance, SoCs have internal algorithms for scaling uncore frequency. These
20 It is possible that users have different expectations of uncore performance and
22 the scaling min/max frequencies via cpufreq sysfs to improve CPU performance.
25 different core and uncore performance at distinct phases and they may want to
27 improve overall performance.
30 ---------------
45 This is a read-only attribute. If users adjust max_freq_khz,
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/openbmc/linux/include/uapi/linux/
H A Disst_if.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 * struct isst_if_platform_info - Define platform information
25 * @mmio_supported: Support of mmio interface for core-power feature
40 * struct isst_if_cpu_map - CPU mapping between logical and physical CPU
53 * struct isst_if_cpu_maps - structure for CPU map IOCTL
67 * struct isst_if_io_reg - Read write PUNIT IO register
84 * struct isst_if_io_regs - structure for IO register commands
99 * struct isst_if_mbox_cmd - Structure to define mail box command
121 * struct isst_if_mbox_cmds - structure for mailbox commands
136 * struct isst_if_msr_cmd - Structure to define msr command
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/openbmc/linux/drivers/soc/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 special additional settings registers for a lot of soc-components.
18 tristate "Rockchip IO domain support"
22 necessary for the io domain setting of the SoC to match the
26 bool "Rockchip generic power domain"
30 Say y here to enable power domain support.
31 In order to meet high performance and low power requirements, a power
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Dapple,pmgr-pwrstate.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
13 - $ref: power-domain.yaml#
18 performance features. This binding describes the device power
22 represents a generic power domain provider, as documented in
23 Documentation/devicetree/bindings/power/power-domain.yaml.
25 represented via power-domains relationships between these nodes.
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/openbmc/linux/Documentation/core-api/
H A Ddma-attributes.rst6 defined in linux/dma-mapping.h.
9 ----------------------
19 ----------------------
22 buffered to improve performance.
29 --------------------------
33 such mapping is non-trivial task and consumes very limited resources
47 ----------------------
50 buffer from CPU domain to device domain. Some advanced use cases might
55 the buffer sharing. The first call transfers a buffer from 'CPU' domain
56 to 'device' domain, what synchronizes CPU caches for the given region
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/openbmc/u-boot/lib/dhry/
H A DKconfig4 Dhrystone is an old benchmark in the public domain that gives a
5 rough idea of CPU performance. This enables a 'dhry' command
6 which runs this benchmark within U-Boot and reports the performance.

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