| /openbmc/u-boot/drivers/gpio/ |
| H A D | adi_gpio2.c | 5 * Copyright 2008-2013 Analog Devices Inc.
7 * Licensed under the GPL-2 or later
30 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; in set_label()
42 printf("adi_gpio2: please provide none-null label\n"); in cmp_label()
47 return -EINVAL; in cmp_label()
65 return -EINVAL; in check_gpio()
68 return -EINVAL; in check_gpio()
76 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); in port_setup()
78 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio); in port_setup()
81 gpio_array[gpio_bank(gpio)]->port_fer_clear = gpio_bit(gpio); in port_setup()
[all …]
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| H A D | at91_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0+
52 writel(mask, &at91_port->puer); in at91_set_port_pullup()
54 writel(mask, &at91_port->pudr); in at91_set_port_pullup()
55 writel(mask, &at91_port->per); in at91_set_port_pullup()
69 * mux the pin to the "GPIO" peripheral role.
78 writel(mask, &at91_port->idr); in at91_set_pio_periph()
80 writel(mask, &at91_port->per); in at91_set_pio_periph()
87 * mux the pin to the "A" internal peripheral role.
96 writel(mask, &at91_port->idr); in at91_set_a_periph()
98 writel(mask, &at91_port->mux.pio2.asr); in at91_set_a_periph()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mc-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a Memory Controller bus.
10 Many Memory Controllers need to add properties to peripheral devices.
13 to be defined in the peripheral node because they are per-peripheral
20 - Marek Vasut <marex@denx.de>
26 bank-width:
32 - reg
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | fsl-imx-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: serial.yaml#
14 - $ref: rs485.yaml#
19 - const: fsl,imx1-uart
20 - const: fsl,imx21-uart
21 - items:
[all …]
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
30 - Cryptography acceleration (SEC)
[all …]
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| /openbmc/linux/include/linux/dma/ |
| H A D | imx-dma.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
14 * This enumerates peripheral types. Used for SDMA.
29 IMX_DMATYPE_EXT, /* External peripheral */
61 return !strcmp(dev_name(chan->device->dev), "ipu-core"); in imx_dma_is_ipu()
66 return !strcmp(chan->device->dev->driver->name, "imx-sdma") || in imx_dma_is_general_purpose()
67 !strcmp(chan->device->dev->driver->name, "imx-dma"); in imx_dma_is_general_purpose()
71 * struct sdma_peripheral_config - SDMA config for audio
78 * @words_per_fifo: numbers of words per FIFO fetch/fill, 1 means
79 * one channel per FIFO, 2 means 2 channels per FIFO..
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
[all …]
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | spi.rst | 1 Serial Peripheral Interface (SPI)
4 SPI is the "Serial Peripheral Interface", widely used with embedded
7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
9 duplex protocol; for each bit shifted out the MOSI line (one per clock)
12 additional chipselect line is usually active-low (nCS); four signals are
13 normally used for each peripheral, plus sometimes an interrupt.
19 peripherals and does not implement such a peripheral itself. (Interfaces
33 board-specific initialization code. A :c:type:`struct spi_driver
46 .. kernel-doc:: include/linux/spi/spi.h
49 .. kernel-doc:: drivers/spi/spi.c
[all …]
|
| H A D | sm501.rst | 15 ----
27 peripheral set as platform devices for the specific drivers.
29 The core re-uses the platform device system as the platform device
31 need to create a new bus-type and the associated code to go with it.
35 ---------
37 Each peripheral has a view of the device which is implicitly narrowed to
38 the specific set of resources that peripheral requires in order to
43 as this is by-far the most resource-sensitive of the on-chip functions.
59 -------------
66 The PCI driver assumes that the PCI card behaves as per the Silicon
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| /openbmc/linux/include/linux/soundwire/ |
| H A D | sdw_amd.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
21 * is invoked. If set, a complete bus reset and re-enumeration will
22 * be performed when the bus restarts. In-band wake interrupts are
57 * struct amd_sdw_manager - amd manager driver context
62 * @reg_mask: register mask structure per manager instance
64 * @amd_sdw_work: peripheral status work queue
67 * @status: peripheral devices status array
74 * @wake_en_mask: wake enable mask per SoundWire manager
|
| /openbmc/linux/include/drm/ |
| H A D | drm_mipi_dsi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
18 /* request ACK from peripheral */
24 * struct mipi_dsi_msg - read/write DSI buffer
49 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
67 * struct mipi_dsi_host_ops - DSI bus operations
99 * struct mipi_dsi_host - DSI host device
124 /* enable hsync-end packets in vsync-pulse and v-porch area */
126 /* disable hfront-porch area */
128 /* disable hback-porch area */
[all …]
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| /openbmc/linux/drivers/spi/ |
| H A D | spi-geni-qcom.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
6 #include <linux/dma-mapping.h>
7 #include <linux/dma/qcom-gpi-dma.h>
16 #include <linux/soc/qcom/geni-se.h>
108 struct geni_se *se = &mas->se; in spi_slv_setup()
110 writel(SPI_SLAVE_EN, se->base + SE_SPI_SLAVE_EN); in spi_slv_setup()
111 writel(GENI_IO_MUX_0_EN, se->base + GENI_OUTPUT_CTRL); in spi_slv_setup()
112 writel(START_TRIGGER, se->base + SE_GENI_CFG_SEQ_START); in spi_slv_setup()
113 dev_dbg(mas->dev, "spi slave setup done\n"); in spi_slv_setup()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/spmi/ |
| H A D | qcom,spmi-pmic-arb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
14 controller with wrapping arbitration logic to allow for multiple on-chip
21 - $ref: spmi.yaml
25 const: qcom,spmi-pmic-arb
29 - items: # V1
30 - description: core registers
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | apple,mca.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 MCA is an I2S transceiver peripheral found on M1 and other Apple chips. It is
15 - Martin Povišer <povik+lin@cutebit.org>
18 - $ref: dai-common.yaml#
23 - enum:
24 - apple,t6000-mca
25 - apple,t8103-mca
26 - apple,t8112-mca
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
|
| H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
|
| H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
|
| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-realtek-otto.c | 1 // SPDX-License-Identifier: GPL-2.0-only
19 * Pin select: (0) "normal", (1) "dedicate peripheral"
20 * Not used on RTL8380/RTL8390, peripheral selection is managed by control bits
21 * in the peripheral registers.
29 /* Two bits per GPIO in IMR registers */
42 * realtek_gpio_ctrl - Realtek Otto GPIO driver data
49 * @bank_read: Read a bank setting as a single 32-bit value
50 * @bank_write: Write a bank setting as a single 32-bit value
53 * The DIR, DATA, and ISR registers consist of four 8-bit port values, packed
54 * into a single 32-bit register. Use @bank_read (@bank_write) to get (assign)
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | brcm,bcm2836-l1-intc.txt | 1 BCM2836 per-CPU interrupt controller
3 The BCM2836 has a per-cpu interrupt controller for the timer, PMU
5 peripheral (GPU) events, which chain to the BCM2835-style interrupt
10 - compatible: Should be "brcm,bcm2836-l1-intc"
11 - reg: Specifies base physical address and size of the
13 - interrupt-controller: Identifies the node as an interrupt controller
14 - #interrupt-cells: Specifies the number of cells needed to encode an
32 compatible = "brcm,bcm2836-l1-intc";
34 interrupt-controller;
35 #interrupt-cells = <2>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
26 0x0: offset size is linked to the peripheral bus width
[all …]
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| H A D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC)
4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
6 - interrupts: Must contain all the per-channel DMA interrupts.
7 - clocks: Must contain an entry for each entry in clock-names.
8 See ../clock/clock-bindings.txt for details.
9 - clock-names: Must include the following entries:
10 - sys: MDC system interface clock.
11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
[all …]
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| /openbmc/linux/Documentation/driver-api/usb/ |
| H A D | gadget.rst | 11 This document presents a Linux-USB "Gadget" kernel mode API, for use
17 - Supports USB 2.0, for high speed devices which can stream data at
18 several dozen megabytes per second.
20 - Handles devices with dozens of endpoints just as well as ones with
21 just two fixed-function ones. Gadget drivers can be written so
24 - Flexible enough to expose more complex USB device capabilities such
28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the
29 Linux-USB host side.
31 - Sharing data structures and API models with the Linux-USB host side
32 API. This helps the OTG support, and looks forward to more-symmetric
[all …]
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| /openbmc/linux/sound/soc/codecs/ |
| H A D | cs35l56-sdw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
26 static int cs35l56_sdw_read_one(struct sdw_slave *peripheral, unsigned int reg, void *buf) in cs35l56_sdw_read_one() argument
30 ret = sdw_nread_no_pm(peripheral, reg, 4, (u8 *)buf); in cs35l56_sdw_read_one()
32 dev_err(&peripheral->dev, "Read failed @%#x:%d\n", reg, ret); in cs35l56_sdw_read_one()
45 struct sdw_slave *peripheral = context; in cs35l56_sdw_read() local
54 return cs35l56_sdw_read_one(peripheral, reg, val_buf); in cs35l56_sdw_read()
57 bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */ in cs35l56_sdw_read()
61 ret = sdw_nread_no_pm(peripheral, reg, bytes, buf8); in cs35l56_sdw_read()
63 dev_err(&peripheral->dev, "Read failed @%#x..%#x:%d\n", in cs35l56_sdw_read()
64 reg, reg + bytes - 1, ret); in cs35l56_sdw_read()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | atmel,at91-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
28 Each column will represent the possible peripheral of the pinctrl
32 Peripheral: 2 ( A and B)
41 For each peripheral/bank we will describe in a u32 if a pin can be
44 Let's take the pioA on peripheral B
45 From the datasheet Table 10-2.
[all …]
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| /openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_spi.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h]
8 * Serial Peripheral Interface (SPI) registers.
27 u32 csr[4]; /* 0x30 Chip Select Register 0-3 */
42 #define AT91_SPI_PS (1 << 1) /* Peripheral Select */
49 #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
54 #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
58 #define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
78 #define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */
82 #define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */
|