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/openbmc/linux/include/linux/
H A Dpeci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2018-2021 Intel Corporation */
13 * Currently we don't support any PECI command over 32 bytes.
21 * struct peci_controller_ops - PECI controller specific methods
22 * @xfer: PECI transfer function
24 * PECI controllers may have different hardware interfaces - the drivers
25 * implementing PECI controllers can use this structure to abstract away those
26 * differences by exposing a common interface for PECI core.
29 int (*xfer)(struct peci_controller *controller, u8 addr, struct peci_request *req);
33 * struct peci_controller - PECI controller
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/openbmc/linux/Documentation/devicetree/bindings/peci/
H A Dpeci-aspeed.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/peci/peci-aspeed.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aspeed PECI Bus
10 - Iwona Winiarska <iwona.winiarska@intel.com>
11 - Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
14 - $ref: peci-controller.yaml#
19 - aspeed,ast2400-peci
20 - aspeed,ast2500-peci
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H A Dnuvoton,npcm-peci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/peci/nuvoton,npcm-peci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton PECI Bus
10 - Tomer Maimon <tmaimon77@gmail.com>
13 - $ref: peci-controller.yaml#
18 - nuvoton,npcm750-peci
19 - nuvoton,npcm845-peci
29 Clock source for PECI controller. Should reference the APB clock.
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H A Dpeci-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/peci/peci-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic for PECI
10 - Iwona Winiarska <iwona.winiarska@intel.com>
13 PECI (Platform Environment Control Interface) is an interface that provides a
19 pattern: "^peci-controller(@.*)?$"
21 cmd-timeout-ms:
28 - |
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/openbmc/linux/Documentation/peci/
H A Dpeci.rst1 .. SPDX-License-Identifier: GPL-2.0-only
7 The Platform Environment Control Interface (PECI) is a communication
9 (e.g. Baseboard Management Controller, BMC).
10 PECI provides services that allow the management controller to
13 controller is acting as a PECI originator and the processor - as
14 a PECI responder.
15 PECI can be used in both single processor and multiple-processor based
19 Intel PECI specification is not released as a dedicated document,
24 PECI Wire
25 ---------
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/openbmc/linux/drivers/peci/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2021 Intel Corporation
10 #include <linux/peci.h>
21 struct peci_controller *controller = to_peci_controller(dev); in peci_controller_dev_release() local
23 mutex_destroy(&controller->bus_lock); in peci_controller_dev_release()
24 ida_free(&peci_controller_ida, controller->id); in peci_controller_dev_release()
25 kfree(controller); in peci_controller_dev_release()
32 int peci_controller_scan_devices(struct peci_controller *controller) in peci_controller_scan_devices() argument
38 ret = peci_device_create(controller, addr); in peci_controller_scan_devices()
49 struct peci_controller *controller; in peci_controller_alloc() local
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 menuconfig PECI config
4 tristate "PECI support"
6 The Platform Environment Control Interface (PECI) is an interface
10 If you are building a Baseboard Management Controller (BMC) kernel
15 will be called peci.
17 if PECI
20 tristate "PECI CPU"
23 This option enables peci-cpu driver for Intel processors. It is
32 will be called peci-cpu.
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H A Ddevice.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2021 Intel Corporation
5 #include <linux/peci.h>
6 #include <linux/peci-cpu.h>
12 * PECI device can be removed using sysfs, but the removal can also happen as
13 * a result of controller being removed.
14 * Mutex is used to protect PECI device from being double-deleted.
29 * PECI device may be in a state where it is unable to return a proper in peci_get_revision()
37 return -EIO; in peci_get_revision()
103 device->info.family = peci_x86_cpu_family(cpu_id); in peci_device_info_init()
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H A Drequest.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/peci.h>
90 return req->rx.buf[0]; in peci_request_data_cc()
94 * peci_request_status() - return -errno based on PECI completion code
95 * @req: the PECI request that contains response data with completion code
97 * It can't be used for Ping(), GetDIB() and GetTemp() - for those commands we
100 * Return: -errno
107 dev_dbg(&req->device->dev, "ret: %#02x\n", cc); in peci_request_status()
115 return -EAGAIN; in peci_request_status()
117 return -EINVAL; in peci_request_status()
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H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/peci.h>
7 #include <linux/peci-cpu.h>
13 * peci_temp_read() - read the maximum die temperature from PECI target device
14 * @device: PECI device to which request is going to be sent
17 * It uses GetTemp PECI command.
38 * peci_pcs_read() - read PCS register
39 * @device: PECI device to which request is going to be sent
44 * It uses RdPkgConfig PECI command.
70 * peci_pci_local_read() - read 32-bit memory location using raw address
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H A Dinternal.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2018-2021 Intel Corporation */
15 /* PECI CPU address range 0x30-0x37 */
67 * struct peci_device_id - PECI device data to match
81 int peci_device_create(struct peci_controller *controller, u8 addr);
88 * struct peci_driver - PECI driver
92 * @id_table: PECI device match table to decide which device to bind
109 * peci_driver_register() - register PECI driver
112 * PECI drivers that don't need to do anything special in module init should
122 * module_peci_driver() - helper macro for registering a modular PECI driver
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
4 peci-y := core.o request.o device.o sysfs.o
5 obj-$(CONFIG_PECI) += peci.o
6 peci-cpu-y := cpu.o
7 obj-$(CONFIG_PECI_CPU) += peci-cpu.o
10 obj-y += controller/
/openbmc/linux/drivers/peci/controller/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 tristate "ASPEED PECI support"
10 This option enables PECI controller driver for ASPEED AST2400,
12 connected to it, and communicate with them using PECI protocol.
18 be called peci-aspeed.
21 tristate "Nuvoton NPCM PECI support"
26 This option enables PECI controller driver for Nuvoton NPCM7XX
28 to it and communicate with them using PECI protocol.
31 Interface (PECI) bus adapter driver on the Nuvoton NPCM SoCs.
34 will be called peci-npcm.
H A Dpeci-npcm.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/peci.h>
19 /* NPCM PECI Registers */
31 /* NPCM_PECI_CTL_STS - 0x00 : Control Register */
38 /* NPCM_PECI_RD_LENGTH - 0x04 : Command Register */
41 /* NPCM_PECI_CMD - 0x10 : Command Register */
44 /* NPCM_PECI_WR_LENGTH - 0x1C : Command Register */
47 /* NPCM_PECI_PDDR - 0x2C : Command Register */
67 struct peci_controller *controller; member
73 static int npcm_peci_xfer(struct peci_controller *controller, u8 addr, struct peci_request *req) in npcm_peci_xfer() argument
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H A Dpeci-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2012-2017 ASPEED Technology Inc.
3 // Copyright (c) 2018-2021 Intel Corporation
10 #include <linux/clk-provider.h>
19 #include <linux/peci.h>
23 /* ASPEED PECI Registers */
124 struct peci_controller *controller; member
144 u32 val = readl(priv->base + ASPEED_PECI_CTRL); in aspeed_peci_controller_enable()
149 writel(val, priv->base + ASPEED_PECI_CTRL); in aspeed_peci_controller_enable()
157 writel(ASPEED_PECI_INT_MASK, priv->base + ASPEED_PECI_INT_STS); in aspeed_peci_init_regs()
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/openbmc/openbmc/meta-quanta/meta-olympus-nuvoton/recipes-phosphor/sensors/
H A Dphosphor-hwmon_%.bbappend1 FILESEXTRAPATHS:prepend:olympus-nuvoton := "${THISDIR}/${PN}:"
6 i2c@82000/power-supply@58 \
22 pwm-fan-controller@103000 \
27 SYSTEMD_ENVIRONMENT_FILE:${PN}:append:olympus-nuvoton = " ${@compose_list(d, 'ENVS', 'ITEMS')}"
29 # PECI
31 peci-0/0-30/peci-cputemp.0 \
32 peci-0/0-31/peci-cputemp.1\
33 peci-0/0-30/peci-dimmtemp.0 \
35 PECIITEMSFMT = "devices/platform/ahb/ahb--apb/f0100000.peci-bus/{0}.conf"
38 SYSTEMD_ENVIRONMENT_FILE:${PN}:append:olympus-nuvoton = " ${@compose_list(d, 'PECIENVS', 'PECIITEMS…
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/openbmc/linux/arch/arm64/boot/dts/nuvoton/
H A Dnuvoton-common-npcm8xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
16 compatible = "simple-bus";
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/openbmc/qemu/include/hw/misc/
H A Daspeed_peci.h2 * Aspeed PECI Controller
7 * file in the top-level directory.
16 #define TYPE_ASPEED_PECI "aspeed.peci"
/openbmc/qemu/hw/misc/
H A Daspeed_peci.c2 * Aspeed PECI Controller
7 * file in the top-level directory.
36 trace_aspeed_peci_raise_interrupt(s->regs[R_PECI_INT_CTRL], status); in aspeed_peci_raise_interrupt()
38 s->regs[R_PECI_INT_STS] = s->regs[R_PECI_INT_CTRL] & status; in aspeed_peci_raise_interrupt()
39 if (!s->regs[R_PECI_INT_STS]) { in aspeed_peci_raise_interrupt()
42 qemu_irq_raise(s->irq); in aspeed_peci_raise_interrupt()
52 "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n", in aspeed_peci_read()
56 data = s->regs[offset >> 2]; in aspeed_peci_read()
71 "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", in aspeed_peci_write()
78 s->regs[R_PECI_INT_STS] &= ~data; in aspeed_peci_write()
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/openbmc/qemu/hw/arm/
H A Daspeed_ast10x0.c7 * the COPYING file in the top-level directory.
14 #include "exec/address-spaces.h"
16 #include "hw/qdev-clock.h"
93 [ASPEED_DEV_I3C] = 102, /* 102 -> 105 */
95 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */
107 return qdev_get_gpio_in(DEVICE(&a->armv7m), sc->irqmap[dev]); in aspeed_soc_ast1030_get_irq()
119 if (sscanf(sc->name, "%7s", socname) != 1) { in aspeed_soc_ast1030_init()
123 object_initialize_child(obj, "armv7m", &a->armv7m, TYPE_ARMV7M); in aspeed_soc_ast1030_init()
125 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in aspeed_soc_ast1030_init()
127 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); in aspeed_soc_ast1030_init()
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H A Daspeed_ast2600.c4 * Copyright (c) 2016-2019, IBM Corporation.
7 * the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
19 #include "target/arm/cpu-qom.h"
96 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
138 [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */
139 [ASPEED_DEV_PCIE] = 167, /* 167 -> 168 */
146 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */
150 [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
158 return qdev_get_gpio_in(DEVICE(&a->a7mpcore), sc->irqmap[dev]); in aspeed_soc_ast2600_get_irq()
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H A Daspeed_ast2400.c10 * the COPYING file in the top-level directory.
18 #include "hw/char/serial-mm.h"
20 #include "qemu/error-report.h"
24 #include "target/arm/cpu-qom.h"
148 return qdev_get_gpio_in(DEVICE(&a->vic), sc->irqmap[dev]); in aspeed_soc_ast2400_get_irq()
160 if (sscanf(sc->name, "%7s", socname) != 1) { in aspeed_ast2400_soc_init()
164 for (i = 0; i < sc->num_cpus; i++) { in aspeed_ast2400_soc_init()
165 object_initialize_child(obj, "cpu[*]", &a->cpu[i], in aspeed_ast2400_soc_init()
169 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); in aspeed_ast2400_soc_init()
170 object_initialize_child(obj, "scu", &s->scu, typename); in aspeed_ast2400_soc_init()
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/openbmc/qemu/docs/system/arm/
H A Dnuvoton.rst1 Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj`…
4 The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are
6 servers. They all feature one or two ARM Cortex-A9 CPU cores, as well as an
11 .. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
13 The NPCM750 SoC has two Cortex-A9 cores and is targeted for the Enterprise
16 - ``npcm750-evb`` Nuvoton NPCM750 Evaluation board
18 The NPCM730 SoC has two Cortex-A9 cores and is targeted for Data Center and
21 - ``quanta-gbs-bmc`` Quanta GBS server BMC
22 - ``quanta-gsj`` Quanta GSJ server BMC
23 - ``kudo-bmc`` Fii USA Kudo server BMC
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/openbmc/linux/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-ma
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/openbmc/entity-manager/
H A DREADME.md14 likely does contain multiple sub-components, but the component itself as a whole
31 of a D-Bus interface definition.
48 components at runtime. The most common of these, fru-device, is included in
49 the Entity-Manager repo, and scans all available I2C buses for IPMI FRU
51 **[peci-pcie](https://github.com/openbmc/peci-pcie):** A daemon that utilizes
53 **[smbios-mdr](https://github.com/openbmc/smbios-md
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