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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dnvidia,tegra194-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
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H A Dnvidia,tegra194-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
26 - nvidia,tegra194-pcie
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H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
26 space, Port Logic Registers (PL), Shadow Config-space Registers,
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3737-0000+p3701-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p3701-0000.dtsi"
8 #include "tegra234-p3737-0000.dtsi"
12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234";
22 stdout-path = "serial0:115200n8";
27 compatible = "nvidia,tegra194-hsuart";
28 reset-names = "serial";
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H A Dtegra234-p3740-0002+p3701-0008.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include "tegra234-p3701-0008.dtsi"
7 #include "tegra234-p3740-0002.dtsi"
11 compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";
19 stdout-path = "serial0:115200n8";
24 compatible = "nvidia,tegra194-hsuart";
25 reset-names = "serial";
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H A Dtegra234-p3768-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 compatible = "nvidia,p3768-0000";
11 stdout-path = "serial0:115200n8";
23 vcc-supply = <&vdd_1v8_sys>;
24 address-width = <8>;
27 read-only;
36 assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>;
37 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
47 usb2-0 {
52 usb2-1 {
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H A Dtegra194-p2972-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
24 #address-cells = <1>;
25 #size-cells = <0>;
31 remote-endpoint = <&xbar_i2s1_ep>;
39 dai-format = "i2s";
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H A Dtegra194-p3509-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
26 remote-endpoint = <&xbar_i2s3_ep>;
34 dai-format = "i2s";
45 #address-cells = <1>;
46 #size-cells = <0>;
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H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-tegra194-p2u.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 & Tegra234 P2U
10 - Thierry Reding <treding@nvidia.com>
14 Speed) each interfacing with 12 and 8 P2U instances respectively.
16 each interfacing with 8, 8 and 8 P2U instances respectively.
17 A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
18 interface and PHY of HSIO/NVHS/GBE bricks. Each P2U instance represents one
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/openbmc/linux/drivers/gpu/drm/ast/
H A Dast_dp501.c1 // SPDX-License-Identifier: GPL-2.0
15 release_firmware(ast->dp501_fw); in ast_release_firmware()
16 ast->dp501_fw = NULL; in ast_release_firmware()
24 ret = request_firmware(&ast->dp501_fw, "ast_dp501_fw.bin", dev->dev); in ast_load_dp501_microcode()
28 return devm_add_action_or_reset(dev->dev, ast_release_firmware, ast); in ast_load_dp501_microcode()
192 if (ast->config_mode != ast_use_p2a) in ast_backup_fw()
213 if (ast->config_mode != ast_use_p2a) in ast_launch_m68k()
219 if (ast->dp501_fw_addr) { in ast_launch_m68k()
220 fw_addr = ast->dp501_fw_addr; in ast_launch_m68k()
223 if (!ast->dp501_fw && in ast_launch_m68k()
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/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Duncore-interconnect.json100 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
102 "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
104 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
109 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
111 "EventName": "UNC_I_MISC0.2ND_RD_INSERT",
113 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
118 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
120 "EventName": "UNC_I_MISC0.2ND_WR_INSERT",
122 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
127 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
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/openbmc/linux/drivers/pci/controller/dwc/
H A Dpcie-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2019-2022 NVIDIA Corporation.
35 #include "pcie-designware.h"
37 #include <soc/tegra/bpmp-abi.h>
45 #define APPL_PINMUX_CLKREQ_OVERRIDE_EN BIT(2)
93 #define APPL_INTR_EN_L1_8_BW_MGT_INT_EN BIT(2)
100 #define APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS BIT(2)
112 #define APPL_INTR_EN_L1_18_CDM_REG_CHK_CMPLT BIT(2)
117 #define APPL_INTR_STATUS_L1_18_CDM_REG_CHK_CMPLT BIT(2)
192 #define AMBA_ERROR_RESPONSE_CRS_OKAY_FFFF0001 2
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/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Duncore-interconnect.json6 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi…
15 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi…
118 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
120 "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
122 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
127 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
129 "EventName": "UNC_I_MISC0.2ND_RD_INSERT",
131 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
136 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
138 "EventName": "UNC_I_MISC0.2ND_WR_INSERT",
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/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Duncore-interconnect.json6 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi…
15 …-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along wi…
118 … "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
120 "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
122 …"PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
127 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
129 "EventName": "UNC_I_MISC0.2ND_RD_INSERT",
131 … "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
136 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
138 "EventName": "UNC_I_MISC0.2ND_WR_INSERT",
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-interconnect.json147 "BriefDescription": "BL Ingress Occupancy - DRS",
169 "BriefDescription": "BL Ingress Occupancy - NCB",
191 "BriefDescription": "BL Ingress Occupancy - NCS",
210 …ny requests behind it in the switch queue will lose ownership and have to re-acquire it later when…
228 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
237 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
246 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
255 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
304 …er of cycles when there are pending write ACK's in the switch but the switch->IRP pipeline is not …
320 …slots. If both slots trigger in a given cycle, the event will increment by 2. You can use edge d…
[all …]
/openbmc/linux/
H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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