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/openbmc/linux/drivers/interconnect/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Qualcomm Network-on-Chip interconnect drivers"
4 depends on ARCH_QCOM
6 Support for Qualcomm's Network-on-Chip interconnect hardware.
13 depends on INTERCONNECT_QCOM
14 depends on QCOM_SMD_RPM
17 This is a driver for the Qualcomm Network-on-Chip on msm8916-based
22 depends on INTERCONNECT_QCOM
23 depends on QCOM_SMD_RPM
26 This is a driver for the Qualcomm Network-on-Chip on msm8939-based
[all …]
/openbmc/u-boot/drivers/usb/host/
H A DKconfig12 ---help---
22 USB controller based on the DesignWare USB3 IP Core.
26 depends on DM_USB
30 USB controller based on the DesignWare USB3 IP Core.
35 depends on ARCH_MVEBU
38 Choose this option to add support for USB 3.0 driver on mvebu
43 bool "Support for PCI-based xHCI USB controller"
44 depends on DM_USB
47 Enables support for the PCI-based xHCI controller.
50 bool "Support for Rockchip on-chip xHCI USB controller"
[all …]
/openbmc/linux/drivers/usb/typec/tcpm/
H A Dfusb302.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
38 * for the current capability offered by the SRC. As FUSB302 chip fires
39 * the BC_LVL interrupt on PD signalings, cc lvl should be handled after
40 * a delay to avoid measuring on PD activities. The delay is slightly
41 * longer than PD_T_PD_DEBPUNCE (10-20ms).
92 /* lock for sharing chip states */
95 /* chip status */
127 static bool fusb302_log_full(struct fusb302_chip *chip) in fusb302_log_full() argument
[all …]
/openbmc/linux/drivers/media/usb/gspca/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 depends on VIDEO_DEV
5 depends on INPUT || INPUT=n
9 on the GSPCA framework.
11 See <file:Documentation/admin-guide/media/gspca-cardlist.rst> for more info.
23 depends on VIDEO_DEV && USB_GSPCA
32 depends on VIDEO_DEV && USB_GSPCA
34 Say Y here if you want support for cameras based on the Conexant chip.
41 depends on VIDEO_DEV && USB_GSPCA
43 Say Y here if you want support for USB cameras based on the cpia
[all …]
/openbmc/u-boot/drivers/tpm/
H A Dtpm2_tis_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on the Linux TIS core interface and U-Boot original SPI TPM driver
10 #include <tpm-v2.h>
17 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_get_desc() local
20 return -ENOSPC; in tpm_tis_get_desc()
24 dev->name, chip->vend_dev & 0xFFFF, in tpm_tis_get_desc()
25 chip->vend_dev >> 16, chip->rid, in tpm_tis_get_desc()
26 (chip->is_open ? "open" : "closed")); in tpm_tis_get_desc()
30 * tpm_tis_check_locality - Check the current TPM locality
39 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_check_locality() local
[all …]
/openbmc/linux/drivers/usb/host/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
9 depends on HAS_IOMEM
11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
14 Enable this option to support this chip in host controller mode.
22 depends on HAS_DMA && HAS_IOMEM
28 module will be called xhci-hcd.
33 depends on TTY
37 you want a TTY serial device based on the xHCI debug capability
42 depends on USB_PCI
43 depends on USB_XHCI_PCI_RENESAS || !USB_XHCI_PCI_RENESAS
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A Dnand_micron.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
15 * corrected by on-die ECC and should be rewritten.
20 * On chips with 8-bit ECC and additional bit can be used to distinguish
24 * ----- ----- ----- -----------
27 * 0 1 0 4 - 6 errors corrected, recommend rewrite
29 * 1 0 0 1 - 3 errors corrected
31 * 1 1 0 7 - 8 errors corrected, recommend rewrite
69 static int micron_nand_setup_read_retry(struct nand_chip *chip, int retry_mode) in micron_nand_setup_read_retry() argument
73 return nand_set_features(chip, ONFI_FEATURE_ADDR_READ_RETRY, feature); in micron_nand_setup_read_retry()
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/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …) and the request was made by the Level-1 Data cache. This is a replacement for what was provided …
17 "Unit": "CPU-M-CF",
21-1 Data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on th…
24 "Unit": "CPU-M-CF",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
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/openbmc/linux/sound/pci/echoaudio/
H A Decho3g_dsp.c3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
31 static int load_asic(struct echoaudio *chip);
32 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode);
33 static int set_digital_mode(struct echoaudio *chip, u8 mode);
34 static int check_asic_status(struct echoaudio *chip);
35 static int set_sample_rate(struct echoaudio *chip, u32 rate);
36 static int set_input_clock(struct echoaudio *chip, u16 clock);
[all …]
/openbmc/u-boot/include/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
20 * For now there are essentially two parts to this file - driver model
28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
35 * struct dm_i2c_chip - information about an i2c chip
37 * An I2C chip is a device on the I2C bus. It sits at a particular address
38 * and normally supports 7-bit or 10-bit addressing.
41 * the chip to examine.
43 * @chip_addr: Chip address on bus
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H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common SPI Interface: Controller-specific definitions
22 #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
46 * struct dm_spi_platdata - platform data for all SPI slaves
50 * dev_get_parent_platdata(slave->dev).
55 * @cs: Chip select number (0..n-1)
68 * struct spi_slave - Representation of a SPI slave
70 * For driver model this is the per-child data used by the SPI bus. It can
71 * be accessed using dev_get_parent_priv() on the slave device. The SPI uclass
78 * controller-specific data.
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/openbmc/linux/drivers/isdn/hardware/mISDN/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 depends on MISDN
10 depends on PCI
12 Enable support for cards with Cologne Chip AG's
13 HFC PCI chip.
16 tristate "Support for HFC multiport cards (HFC-4S/8S/E1)"
17 depends on (PCI || CPM1) && HAS_IOPORT
18 depends on MISDN
20 Enable support for cards with Cologne Chip AG's HFC multiport
21 chip. There are three types of chips that are quite similar,
[all …]
/openbmc/linux/drivers/hte/
H A Dhte.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 NVIDIA Corporation
34 * struct hte_ts_info - Information related to requested timestamp.
73 * struct hte_device - HTE abstract device
79 * @chip: HTE chip providing this HTE device.
89 struct hte_chip *chip; member
109 const struct hte_chip *chip = gdev->chip; in hte_chip_dbgfs_init() local
110 const char *name = chip->name ? chip->name : dev_name(chip->dev); in hte_chip_dbgfs_init()
112 gdev->dbg_root = debugfs_create_dir(name, hte_root); in hte_chip_dbgfs_init()
114 debugfs_create_atomic_t("ts_requested", 0444, gdev->dbg_root, in hte_chip_dbgfs_init()
[all …]
/openbmc/linux/drivers/mtd/maps/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Mapping drivers for chip access"
3 depends on MTD!=n
4 depends on HAS_IOMEM
7 bool "Support non-linear mappings of flash chips"
9 This causes the chip drivers to allow for complicated
14 depends on MTD_CFI || MTD_JEDECPROBE || MTD_ROM || MTD_RAM || MTD_LPDDR
19 the physical address and size of the flash chips on your
21 with config options or at run-time.
28 depends on MTD_PHYSMAP
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/openbmc/linux/drivers/base/regmap/
H A Dregmap-irq.c1 // SPDX-License-Identifier: GPL-2.0
25 const struct regmap_irq_chip *chip; member
55 return &data->chip->irqs[irq]; in irq_to_regmap_irq()
60 struct regmap *map = data->map; in regmap_irq_can_bulk_read_status()
63 * While possible that a user-defined ->get_irq_reg() callback might in regmap_irq_can_bulk_read_status()
67 return data->irq_reg_stride == 1 && map->reg_stride == 1 && in regmap_irq_can_bulk_read_status()
68 data->get_irq_reg == regmap_irq_get_irq_reg_linear && in regmap_irq_can_bulk_read_status()
69 !map->use_single_read; in regmap_irq_can_bulk_read_status()
76 mutex_lock(&d->lock); in regmap_irq_lock()
82 struct regmap *map = d->map; in regmap_irq_sync_unlock()
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A Dfrontend.json47 "BriefDescription": "Number of I-ERAT reloads",
59 "BriefDescription": "IERAT Miss (Not implemented as DI on POWER6)",
71 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for an instru…
72 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
89 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
90 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
95 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
96 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
[all …]
H A Dcache.json5 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
6 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
11 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
12 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
17 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
18 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen…
29 "BriefDescription": "Demand LD - L2 Miss (not L2 hit)",
53 …ata cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to a …
54 …ata cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to ei…
71 "BriefDescription": "Demand LD - L3 Miss (not L2 hit and not L3 hit)",
[all …]
H A Dother.json11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
23 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data …
24 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
36 … got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump w…
41 …"BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a…
42 …urced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump w…
65 …ump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the origi…
66 …(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group…
71 …"BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group…
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/openbmc/linux/kernel/irq/
H A Dchip.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 * This file contains the core interrupt handling code, for irq-chip based
8 * Documentation/core-api/genericirq.rst
29 * Chained handlers should never call action on their IRQ. This default
37 * irq_set_chip - set the irq chip for an irq
39 * @chip: pointer to irq chip description structure
41 int irq_set_chip(unsigned int irq, const struct irq_chip *chip) in irq_set_chip() argument
47 return -EINVAL; in irq_set_chip()
[all …]
/openbmc/linux/sound/soc/mediatek/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "ASoC support for Mediatek MT2701 chip"
8 depends on ARCH_MEDIATEK
18 depends on SND_SOC_MT2701 && I2C
29 depends on SND_SOC_MT2701 && I2C
38 tristate "ASoC support for Mediatek MT6797 chip"
39 depends on ARCH_MEDIATEK
49 depends on SND_SOC_MT6797 && MTK_PMIC_WRAP
58 tristate "ASoC support for Mediatek MT7986 chip"
59 depends on ARCH_MEDIATEK
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A Dtranslation.json15 …data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a dema…
20 "BriefDescription": "Double-Precion or Quad-Precision instruction completed"
25 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the …
35 …o the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as…
60 …the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
75 …to the TLB either shared or modified data from another core's L2/L3 on the same chip due to a inst…
80 …tion cache was reloaded with Shared (S) data from another core's L2 on the same chip due to an ins…
95 …ta cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a dema…
100 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same…
130 "BriefDescription": "Demand LD - L2 Miss (not L2 hit)"
[all …]
/openbmc/linux/drivers/pwm/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2011-2012 Avionic Design GmbH
21 #include <dt-bindings/pwm/pwm.h>
46 return -ENOSPC; in alloc_pwms()
54 static void free_pwms(struct pwm_chip *chip) in free_pwms() argument
56 bitmap_clear(allocated_pwms, chip->base, chip->npwm); in free_pwms()
58 kfree(chip->pwms); in free_pwms()
59 chip->pwms = NULL; in free_pwms()
64 struct pwm_chip *chip; in pwmchip_find_by_name() local
71 list_for_each_entry(chip, &pwm_chips, list) { in pwmchip_find_by_name()
[all …]
/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Dsmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include "chip.h"
13 /* The switch ADDR[4:1] configuration pins define the chip SMI device address
16 * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it
20 * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing
26 * addresses, allowing two to coexist on the same SMI interface.
29 static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip, in mv88e6xxx_smi_direct_read() argument
34 ret = mdiobus_read_nested(chip->bus, dev, reg); in mv88e6xxx_smi_direct_read()
43 static int mv88e6xxx_smi_direct_write(struct mv88e6xxx_chip *chip, in mv88e6xxx_smi_direct_write() argument
48 ret = mdiobus_write_nested(chip->bus, dev, reg, data); in mv88e6xxx_smi_direct_write()
[all …]
/openbmc/linux/drivers/leds/
H A Dleds-an30259a.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Driver for Panasonic AN30259A 3-channel LED driver
24 #define AN30259A_LED_EN(x) BIT((x) - 1)
25 #define AN30259A_LED_SLOPE(x) BIT(((x) - 1) + 4)
27 #define AN30259A_REG_LEDCC(x) (0x03 + ((x) - 1))
30 #define AN30259A_REG_SLOPE(x) (0x06 + ((x) - 1))
34 #define AN30259A_REG_LEDCNT1(x) (0x09 + (4 * ((x) - 1)))
38 #define AN30259A_REG_LEDCNT2(x) (0x0A + (4 * ((x) - 1)))
43 #define AN30259A_REG_LEDCNT3(x) (0x0B + (4 * ((x) - 1)))
47 #define AN30259A_REG_LEDCNT4(x) (0x0C + (4 * ((x) - 1)))
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-zynqmp-modepin.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the ps-mode pin configuration.
16 #include <linux/firmware/xlnx-zynqmp.h>
18 /* 4-bit boot mode pins */
22 * modepin_gpio_get_value - Get the state of the specified pin of GPIO device
23 * @chip: gpio_chip instance to be worked on
28 * Return: 0 if the pin is low, 1 if pin is high, -EINVAL wrong pin configured
31 static int modepin_gpio_get_value(struct gpio_chip *chip, unsigned int pin) in modepin_gpio_get_value() argument
50 * modepin_gpio_set_value - Modify the state of the pin with specified value
51 * @chip: gpio_chip instance to be worked on
[all …]

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