1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include "chip.h"
13 /* The switch ADDR[4:1] configuration pins define the chip SMI device address
16  * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it
20  * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing
26  * addresses, allowing two to coexist on the same SMI interface.
29 static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_direct_read()  argument
34 	ret = mdiobus_read_nested(chip->bus, dev, reg);  in mv88e6xxx_smi_direct_read()
43 static int mv88e6xxx_smi_direct_write(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_direct_write()  argument
48 	ret = mdiobus_write_nested(chip->bus, dev, reg, data);  in mv88e6xxx_smi_direct_write()
55 static int mv88e6xxx_smi_direct_wait(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_direct_wait()  argument
67 		err = mv88e6xxx_smi_direct_read(chip, dev, reg, &data);  in mv88e6xxx_smi_direct_wait()
80 	return -ETIMEDOUT;  in mv88e6xxx_smi_direct_wait()
88 static int mv88e6xxx_smi_dual_direct_read(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_dual_direct_read()  argument
91 	return mv88e6xxx_smi_direct_read(chip, chip->sw_addr + dev, reg, data);  in mv88e6xxx_smi_dual_direct_read()
94 static int mv88e6xxx_smi_dual_direct_write(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_dual_direct_write()  argument
97 	return mv88e6xxx_smi_direct_write(chip, chip->sw_addr + dev, reg, data);  in mv88e6xxx_smi_dual_direct_write()
109 static int mv88e6xxx_smi_indirect_read(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_indirect_read()  argument
114 	err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_read()
123 	err = mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_read()
128 	return mv88e6xxx_smi_direct_read(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_read()
132 static int mv88e6xxx_smi_indirect_write(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_indirect_write()  argument
137 	err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_write()
142 	err = mv88e6xxx_smi_direct_write(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_write()
151 	return mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_write()
155 static int mv88e6xxx_smi_indirect_init(struct mv88e6xxx_chip *chip)  in mv88e6xxx_smi_indirect_init()  argument
157 	/* Ensure that the chip starts out in the ready state. As both  in mv88e6xxx_smi_indirect_init()
158 	 * reads and writes always ensure this on return, they can  in mv88e6xxx_smi_indirect_init()
159 	 * safely depend on the chip not being busy on entry.  in mv88e6xxx_smi_indirect_init()
161 	return mv88e6xxx_smi_direct_wait(chip, chip->sw_addr,  in mv88e6xxx_smi_indirect_init()
171 int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,  in mv88e6xxx_smi_init()  argument
174 	if (chip->info->dual_chip)  in mv88e6xxx_smi_init()
175 		chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops;  in mv88e6xxx_smi_init()
177 		chip->smi_ops = &mv88e6xxx_smi_direct_ops;  in mv88e6xxx_smi_init()
178 	else if (chip->info->multi_chip)  in mv88e6xxx_smi_init()
179 		chip->smi_ops = &mv88e6xxx_smi_indirect_ops;  in mv88e6xxx_smi_init()
181 		return -EINVAL;  in mv88e6xxx_smi_init()
183 	chip->bus = bus;  in mv88e6xxx_smi_init()
184 	chip->sw_addr = sw_addr;  in mv88e6xxx_smi_init()
186 	if (chip->smi_ops->init)  in mv88e6xxx_smi_init()
187 		return chip->smi_ops->init(chip);  in mv88e6xxx_smi_init()