| /openbmc/qemu/docs/system/arm/ |
| H A D | nuvoton.rst | 1 Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj`…
4 The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are
6 servers. They all feature one or two ARM Cortex-A9 CPU cores, as well as an
8 Hyperscale applications. The former is a superset of the latter, so NPCM750 has
11 .. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
13 The NPCM750 SoC has two Cortex-A9 cores and is targeted for the Enterprise
16 - ``npcm750-evb`` Nuvoton NPCM750 Evaluation board
18 The NPCM730 SoC has two Cortex-A9 cores and is targeted for Data Center and
21 - ``quanta-gbs-bmc`` Quanta GBS server BMC
22 - ``quanta-gsj`` Quanta GSJ server BMC
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | nuvoton,npcm-memory-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-memory-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM Memory Controller
10 - Marvin Lin <kflin@nuvoton.com>
11 - Stanley Chu <yschu@nuvoton.com>
14 The Nuvoton BMC SoC supports DDR4 memory with or without ECC (error correction
17 The memory controller supports single bit error correction, double bit error
18 detection (in-line ECC in which a section (1/8th) of the memory device used to
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| /openbmc/linux/arch/arm/boot/dts/nuvoton/ |
| H A D | nuvoton-common-npcm7xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
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| H A D | nuvoton-npcm750-runbmc-olympus.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi"
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Nuvoton npcm750 RunBMC Olympus";
14 compatible = "nuvoton,npcm750";
43 stdout-path = &serial3;
46 memory {
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| H A D | nuvoton-npcm730-kudo.dts | 1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
41 stdout-path = &serial3;
44 memory {
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 compatible = "nuvoton,npcm750-jtag-master";
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| H A D | nuvoton-npcm730-gbs.dts | 1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
74 memory {
78 gpio-keys {
79 compatible = "gpio-keys";
80 sas-cable0 {
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | nuvoton,npcm-fiu.txt | 1 * Nuvoton FLASH Interface Unit (FIU) SPI Controller
14 - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
15 "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
16 - #address-cells : should be 1.
17 - #size-cells : should be 0.
18 - reg : the first contains the register location and length,
19 the second contains the memory mapping address and length
20 - reg-names: Should contain the reg names "control" and "memory"
21 - clocks : phandle of FIU reference clock.
24 - pinctrl-names : a pinctrl state named "default" must be defined.
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | nuvoton,npcm750-clk.txt | 1 * Nuvoton NPCM7XX Clock Controller
3 Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which
10 clk_sysbypck are inputs to the clock controller.
17 dt-bindings/clock/nuvoton,npcm7xx-clock.h
20 Required Properties of clock controller:
22 - compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton
23 Poleg BMC NPCM750
25 - reg: physical base address of the clock controller and length of
26 memory mapped region.
28 - #clock-cells: should be 1.
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | nuvoton,npcm-vcd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nuvoton,npcm-vcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joseph Liu <kwliu@nuvoton.com>
11 - Marvin Lin <kflin@nuvoton.com>
19 - nuvoton,npcm750-vcd
20 - nuvoton,npcm845-vcd
43 memory-region:
49 - compatible
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| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
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| /openbmc/linux/drivers/spi/ |
| H A D | spi-npcm-fiu.c | 1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/spi/spi-mem.h>
107 /* FIU UMA Write Data Bytes 0-3 Register */
113 /* FIU UMA Write Data Bytes 4-7 Register */
119 /* FIU UMA Write Data Bytes 8-11 Register */
125 /* FIU UMA Write Data Bytes 12-15 Register */
131 /* FIU UMA Read Data Bytes 0-3 Register */
137 /* FIU UMA Read Data Bytes 4-7 Register */
143 /* FIU UMA Read Data Bytes 8-11 Register */
149 /* FIU UMA Read Data Bytes 12-15 Register */
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | 8250.yaml | 3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
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| /openbmc/linux/drivers/edac/ |
| H A D | npcm_edac.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #define EDAC_MOD_NAME "npcm-edac"
46 /* memory controller registers */
106 struct priv_data *priv = mci->pvt_info; in handle_ce()
111 pdata = priv->pdata; in handle_ce()
112 regmap_read(npcm_regmap, pdata->ctl_ce_addr_l, &val_l); in handle_ce()
113 if (pdata->chip == NPCM8XX_CHIP) { in handle_ce()
114 regmap_read(npcm_regmap, pdata->ctl_ce_addr_h, &val_h); in handle_ce()
115 val_h &= pdata->ce_addr_h_mask; in handle_ce()
119 regmap_read(npcm_regmap, pdata->ctl_ce_data_l, &val_l); in handle_ce()
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| /openbmc/qemu/hw/arm/ |
| H A D | npcm7xx.c | 21 #include "hw/char/serial-mm.h"
24 #include "hw/qdev-clock.h"
25 #include "hw/qdev-properties.h"
30 #include "target/arm/cpu-qom.h"
62 /* Memory blocks at the end of the address space */
79 * Interrupt lines going into the GIC. This does not include internal Cortex-A9
153 /* Total number of GIC interrupts, including internal Cortex-A9 interrupts. */
171 /* Direct memory-mapped access to SPI0 CS0-1. */
177 /* Direct memory-mapped access to SPI3 CS0-3. */
203 /* Direct memory-mapped access to each SMBus Module. */
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| /openbmc/linux/drivers/hwmon/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
20 sensors-detect script from the lm_sensors package. Read
21 <file:Documentation/hwmon/userspace-tools.rst> for details.
76 with SMpro co-processor.
290 will be called as370-hwmon.
313 will be called axi-fan-control
322 lm-sensors 2.10.1 for proper userspace support.
357 Controller, which provides an accelerometer (Apple Sudden Motion
361 Only Intel-based Apple's computers are supported (MacBook Pro,
368 the laptop to act as a pinball machine-esque joystick.
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| /openbmc/linux/drivers/watchdog/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
228 tristate "Watchdog device controlled through GPIO-line"
233 controlled through GPIO-line.
358 module will be called mlx-wdt.
392 More details: ARM DEN0029B - Server Base System Architecture (SBSA)
461 The Intel Footbridge chip contains a built-in watchdog circuit. Say Y
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| /openbmc/linux/ |
| H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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| H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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| H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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| /openbmc/ |
| D | opengrok1.0.log | 1 2025-03-21 03:00:54.402-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-21 03:00:54.529-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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| D | opengrok2.0.log | 1 2025-03-20 03:00:35.677-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-03-20 03:00:35.795-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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