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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
[all …]
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller Common Properties
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 These properties are common to multiple MMC host controllers. Any host
17 It is possible to assign a fixed index mmcN to an MMC host controller
23 pattern: "^mmc(@.*)?$"
25 "#address-cells":
[all …]
H A Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
4 for MMC, SD and SDIO types of cards.
6 This file documents differences between the core properties in mmc.txt
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
[all …]
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This file documents differences between the core MMC properties described by
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
14 target-path = "/soc/mmc@11230000";
16 bus-width = <8>;
17 max-frequency = <200000000>;
18 cap-mmc-highspeed;
19 mmc-hs200-1_8v;
20 mmc-hs400-1_8v;
21 hs400-ds-delay = <0x14014>;
[all …]
H A Dmt8183-pumpkin.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
28 stdout-path = "serial0:921600n8";
31 reserved-memory {
32 #address-cells = <2>;
33 #size-cells = <2>;
37 compatible = "shared-dma-pool";
[all …]
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
H A Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
26 stdout-path = "serial0:921600n8";
31 compatible = "linaro,optee-tz";
36 gpio-keys {
[all …]
H A Dmt8195-demo.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
14 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
18 compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
25 stdout-path = "serial0:921600n8";
30 compatible = "linaro,optee-tz";
35 gpio-keys {
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-edgeble-neu6a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 compatible = "edgeble,neural-compute-module-6a", "rockchip,rk3588";
13 vcc12v_dcin: vcc12v-dcin-regulator {
14 compatible = "regulator-fixed";
15 regulator-name = "vcc12v_dcin";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <12000000>;
19 regulator-max-microvolt = <12000000>;
24 bus-width = <8>;
[all …]
H A Drk3588s-khadas-edge2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
19 stdout-path = "serial2:1500000n8";
24 bus-width = <8>;
25 no-sdio;
26 no-sd;
27 non-removable;
28 mmc-hs400-1_8v;
[all …]
/openbmc/linux/drivers/mmc/core/
H A Dhost.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/core/host.c
6 * Copyright (C) 2007-2008 Pierre Ossman
9 * MMC host class device management
23 #include <linux/mmc/host.h>
24 #include <linux/mmc/card.h>
25 #include <linux/mmc/slot-gpio.h>
30 #include "slot-gpio.h"
47 if (!host->bus_ops) in mmc_host_class_prepare()
51 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare()
[all …]
/openbmc/linux/include/linux/mmc/
H A Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/include/linux/mmc/host.h
12 #include <linux/fault-inject.h>
14 #include <linux/mmc/core.h>
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/pm.h>
17 #include <linux/dma-direction.h>
18 #include <linux/blk-crypto-profile.h>
141 * ios->clock might be 0. For some controllers, setting 0Hz
151 * 1 for a read-only card
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/sprd,sc9860-clk.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "simple-bus";
18 #address-cells = <2>;
19 #size-cells = <2>;
67 ap-apb {
68 compatible = "simple-bus";
[all …]
/openbmc/u-boot/drivers/mmc/
H A DKconfig1 menu "MMC Host controller Support"
3 config MMC config
4 bool "MMC/SD/SDIO card support"
11 If you want MMC/SD/SDIO support, you should say Y here and
15 bool "support for MMC/SD write operations"
16 depends on MMC
19 Enable write access to MMC and SD Cards
27 bool "Enable MMC controllers using Driver Model"
30 This enables the MultiMediaCard (MMC) uclass which supports MMC and
31 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
[all …]
/openbmc/linux/drivers/mmc/host/
H A Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
10 #include <linux/mmc/mmc.h>
23 #include "sdhci-cqhci.h"
24 #include "sdhci-pltfm.h"
123 #define INVALID_TUNING_PHASE -1
137 /* Max load for eMMC Vdd-io supply */
141 msm_host->var_ops->msm_readl_relaxed(host, offset)
144 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
[all …]
H A Ddw_mmc-exynos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/host.h>
12 #include <linux/mmc/mmc.h>
19 #include "dw_mmc-pltfm.h"
20 #include "dw_mmc-exynos.h"
22 /* Variations in Exynos specific dw-mshc controller */
53 .compatible = "samsung,exynos4210-dw-mshc",
56 .compatible = "samsung,exynos4412-dw-mshc",
59 .compatible = "samsung,exynos5250-dw-mshc",
62 .compatible = "samsung,exynos5420-dw-mshc",
[all …]
H A Drenesas_sdhi_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
26 #include <linux/mmc/host.h>
27 #include <linux/mmc/mmc.h>
28 #include <linux/mmc/slot-gpio.h>
31 #include <linux/pinctrl/pinctrl-state.h>
[all …]
H A Dsdhci-of-esdhc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/dma-mapping.h>
24 #include <linux/mmc/host.h>
25 #include <linux/mmc/mmc.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
71 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
72 { .compatible = "fsl,ls1043a-esdhc", .data = &ls1043a_esdhc_clk},
73 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
74 { .compatible = "fsl,ls1012a-esdhc", .data = &ls1012a_esdhc_clk},
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8994-huawei-angler-rev-101.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2021-2023, Petr Vorel <petr.vorel@gmail.com>
8 /dts-v1/;
15 chassis-type = "handset";
17 qcom,msm-id = <207 0x20000>;
18 qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
19 qcom,board-id = <8026 0>;
26 stdout-path = "serial0:115200n8";
29 reserved-memory {
30 #address-cells = <2>;
[all …]
H A Dqdu1000-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 compatible = "qcom,qdu1000-idp", "qcom,qdu1000";
15 chassis-type = "embedded";
22 stdout-path = "serial0:115200n8";
26 xo_board: xo-board-clk {
27 compatible = "fixed-clock";
28 clock-frequency = <19200000>;
29 #clock-cells = <0>;
[all …]
H A Dsda660-inforce-ifc6560.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
18 chassis-type = "embedded"; /* SBC */
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 key-volup {
36 debounce-interval = <15>;
41 * Until we hook up type-c detection, we
44 extcon_usb: extcon-usb {
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779f0-spider-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 compatible = "renesas,spider-cpu", "renesas,r8a779f0";
24 stdout-path = "serial0:1843200n8";
28 compatible = "gpio-leds";
30 led-7 {
34 function-enumerator = <7>;
37 led-8 {
41 function-enumerator = <8>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-uDPU.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
30 led-power1 {
35 led-power2 {
40 led-network1 {
[all …]

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