| /openbmc/linux/drivers/dma/ |
| H A D | lpc18xx-dmamux.c | 35 struct lpc18xx_dmamux *muxes; member
87 if (dmamux->muxes[mux].busy) { in lpc18xx_dmamux_reserve()
90 mux, mux, dmamux->muxes[mux].value); in lpc18xx_dmamux_reserve()
95 dmamux->muxes[mux].busy = true; in lpc18xx_dmamux_reserve()
96 dmamux->muxes[mux].value = dma_spec->args[1]; in lpc18xx_dmamux_reserve()
100 LPC18XX_DMAMUX_VAL(dmamux->muxes[mux].value, mux)); in lpc18xx_dmamux_reserve()
107 dmamux->muxes[mux].value, mux); in lpc18xx_dmamux_reserve()
109 return &dmamux->muxes[mux]; in lpc18xx_dmamux_reserve()
149 dmamux->muxes = devm_kcalloc(&pdev->dev, dmamux->dma_master_requests, in lpc18xx_dmamux_probe()
152 if (!dmamux->muxes) in lpc18xx_dmamux_probe()
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| /openbmc/linux/Documentation/i2c/ |
| H A D | i2c-topology.rst | 2 I2C muxes and complex topologies
19 Several types of hardware components such as I2C muxes, I2C gates and I2C
39 There are two variants of locking available to I2C muxes, they can be
40 mux-locked or parent-locked muxes.
43 Mux-locked muxes
46 Mux-locked muxes does not lock the entire parent adapter during the
47 full select-transfer-deselect transaction, only the muxes on the parent
48 adapter are locked. Mux-locked muxes are mostly interesting if the
72 2. M1 locks muxes on its parent (the root adapter in this case).
81 8. M1 unlocks muxes on its parent.
[all …]
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| /openbmc/u-boot/drivers/i2c/ |
| H A D | i2c_core.c | 50 * muxes must be programmed in reverse order, starting with the one
112 /* Connect requested bus if behind muxes */ in i2c_mux_set_all()
114 /* Set all muxes along the path to that bus */ in i2c_mux_set_all()
141 /* Disconnect current bus (turn off muxes if any) */ in i2c_mux_disconnect_all()
227 * go to this one. Sets all of the muxes in a proper condition
228 * if that bus is behind muxes.
229 * If previously selected bus is behind the muxes turns off all the
230 * muxes along the path to that bus.
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| /openbmc/linux/drivers/clk/mvebu/ |
| H A D | kirkwood.c | 256 struct clk **muxes; member
282 to_clk_mux(__clk_get_hw(ctrl->muxes[n])); in clk_muxing_get_src()
284 return ctrl->muxes[n]; in clk_muxing_get_src()
307 /* Count, allocate, and register clock muxes */ in kirkwood_clk_muxing_setup()
312 ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *), in kirkwood_clk_muxing_setup()
314 if (WARN_ON(!ctrl->muxes)) in kirkwood_clk_muxing_setup()
318 ctrl->muxes[n] = clk_register_mux(NULL, desc[n].name, in kirkwood_clk_muxing_setup()
322 WARN_ON(IS_ERR(ctrl->muxes[n])); in kirkwood_clk_muxing_setup()
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| /openbmc/linux/Documentation/devicetree/bindings/mux/ |
| H A D | adi,adg792a.txt | 5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
53 * Three parallel muxes with one mux controller, useful e.g. if
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mux.c | 203 const struct mtk_mux *muxes, in mtk_clk_register_muxes() argument
219 const struct mtk_mux *mux = &muxes[i]; in mtk_clk_register_muxes()
242 const struct mtk_mux *mux = &muxes[i]; in mtk_clk_register_muxes()
255 void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num, in mtk_clk_unregister_muxes() argument
264 const struct mtk_mux *mux = &muxes[i - 1]; in mtk_clk_unregister_muxes()
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| H A D | clk-mux.h | 87 const struct mtk_mux *muxes,
92 void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num,
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| /openbmc/qemu/include/hw/misc/ |
| H A D | stm32l4x5_rcc.h | 40 /* Internal muxes that arent't exposed publicly to other peripherals */
49 /* Muxes with a publicly available output */
230 /* Muxes ~= outputs */
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| /openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/ |
| H A D | mediatek,mt8186-sys-clock.yaml | 16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
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| H A D | mediatek,mt8195-sys-clock.yaml | 16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | mediatek,mt8188-sys-clock.yaml | 16 muxes
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
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| H A D | rockchip,rk3588-cru.yaml | 53 for GRF muxes, if missing any muxes present in the GRF will not be
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| H A D | rockchip,rk3399-cru.yaml | 58 for GRF muxes, if missing any muxes present in the GRF will not be
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| /openbmc/linux/Documentation/firmware-guide/acpi/ |
| H A D | i2c-muxes.rst | 4 ACPI I2C Muxes
7 Describing an I2C device hierarchy that includes I2C muxes requires an ACPI
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos850.c | 217 /* List of parent clocks for Muxes in CMU_TOP */
221 /* List of parent clocks for Muxes in CMU_TOP: for CMU_APM */
223 /* List of parent clocks for Muxes in CMU_TOP: for CMU_AUD */
226 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CORE */
237 /* List of parent clocks for Muxes in CMU_TOP: for CMU_G3D */
240 /* List of parent clocks for Muxes in CMU_TOP: for CMU_HSI */
248 /* List of parent clocks for Muxes in CMU_TOP: for CMU_IS */
257 /* List of parent clocks for Muxes in CMU_TOP: for CMU_MFCMSCL */
266 /* List of parent clocks for Muxes in CMU_TOP: for CMU_PERI */
272 /* List of parent clocks for Muxes in CMU_TOP: for CMU_DPU */
[all …]
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| H A D | clk-exynos7.c | 44 /* List of parent clocks for Muxes in CMU_TOPC */
229 /* List of parent clocks for Muxes in CMU_TOP0 */
418 /* List of parent clocks for Muxes in CMU_TOP1 */
592 * List of parent clocks for Muxes in CMU_CCORE
634 /* List of parent clocks for Muxes in CMU_PERIC0 */
703 /* List of parent clocks for Muxes in CMU_PERIC1 */
827 /* List of parent clocks for Muxes in CMU_PERIS */
886 * List of parent clocks for Muxes in CMU_FSYS0
997 * List of parent clocks for Muxes in CMU_FSYS1
1121 /* List of parent clocks for Muxes in CMU_MSCL */
[all …]
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| H A D | clk-exynos7885.c | 165 /* List of parent clocks for Muxes in CMU_TOP: for CMU_CORE */
173 /* List of parent clocks for Muxes in CMU_TOP: for CMU_PERI */
184 /* List of parent clocks for Muxes in CMU_TOP: for CMU_FSYS */
449 /* List of parent clocks for Muxes in CMU_PERI */
611 /* List of parent clocks for Muxes in CMU_CORE */
705 /* List of parent clocks for Muxes in CMU_FSYS */
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| /openbmc/linux/drivers/net/ethernet/mediatek/ |
| H A D | mtk_eth_path.c | 259 /* Setup proper MUXes along the path */ in mtk_gmac_sgmii_path_setup()
273 /* Setup proper MUXes along the path */ in mtk_gmac_gephy_path_setup()
284 /* Setup proper MUXes along the path */ in mtk_gmac_rgmii_path_setup()
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| /openbmc/u-boot/board/avionic-design/common/ |
| H A D | tamonten-ng.c | 81 * Description: setup the MMC muxes, power rails, etc.
86 * NOTE: We don't do mmc-specific pin muxes here. in pin_mux_mmc()
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| /openbmc/u-boot/arch/arm/mach-socfpga/ |
| H A D | system_manager_s10.c | 17 * Configure all the pin muxes
56 * Configure all the pin muxes
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| /openbmc/u-boot/board/nvidia/dalmore/ |
| H A D | dalmore.c | 88 * Description: setup the MMC muxes, power rails, etc.
93 * NOTE: We don't do mmc-specific pin muxes here. in pin_mux_mmc()
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| /openbmc/u-boot/board/nvidia/cardhu/ |
| H A D | cardhu.c | 74 * Description: setup the MMC muxes, power rails, etc.
79 * NOTE: We don't do mmc-specific pin muxes here. in pin_mux_mmc()
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| /openbmc/linux/drivers/comedi/drivers/ni_routing/ |
| H A D | ni_route_values.h | 80 * shares the same register values for the various signal MUXes. It
83 * @register_values: Table of all register values for various signal MUXes on
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| /openbmc/u-boot/board/toradex/colibri_t20/ |
| H A D | colibri_t20.c | 87 * Description: setup the pin muxes/tristate values for the SDMMC(s)
140 * Description: setup the pin muxes/tristate values for the LCD interface)
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| /openbmc/linux/drivers/i2c/ |
| H A D | Kconfig | 72 source "drivers/i2c/muxes/Kconfig"
81 i2c-muxes do.
|