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/openbmc/u-boot/arch/arm/cpu/arm926ejs/armada100/
H A Dtimer.c142 struct armd1mpmu_registers *mpmu = in reset_cpu() local
149 val = readl(&mpmu->aprr); in reset_cpu()
151 writel(val, &mpmu->aprr); in reset_cpu()
154 writel(APBC_APBCLK | APBC_FNCLK | APBC_RST, &mpmu->wdtpcr); in reset_cpu()
155 readl(&mpmu->wdtpcr); in reset_cpu()
156 writel(APBC_APBCLK | APBC_FNCLK, &mpmu->wdtpcr); in reset_cpu()
157 readl(&mpmu->wdtpcr); in reset_cpu()
H A Dcpu.c26 struct armd1mpmu_registers *mpmu = in arch_cpu_init() local
35 writel(0xFFFFFFFF, &mpmu->acgr); in arch_cpu_init()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmarvell,pxa1928.txt5 blocks called APMU, MPMU, and APBC roughly corresponding to internal buses.
11 - "marvell,pxa1928-mpmu" - MPMU controller compatible
H A Dmarvell,mmp2-clock.yaml29 - description: MPMU register region
35 - const: mpmu
65 reg-names = "mpmu", "apmu", "apbc";
H A Dmarvell,pxa168.txt13 "mpmu", "apmu", "apbc". So three reg spaces need to be defined.
H A Dmarvell,pxa910.txt13 "mpmu", "apmu", "apbc", "apbcp". So four reg spaces need to be defined.
/openbmc/u-boot/arch/arm/include/asm/arch-armada100/
H A Darmada100.h33 /* MPMU Clocks */
H A Dcpu.h15 * Main Power Management (MPMU) Registers
/openbmc/linux/drivers/clk/mmp/
H A Dclk-of-pxa1928.c217 pr_err("failed to map mpmu registers\n"); in pxa1928_mpmu_clk_init()
224 CLK_OF_DECLARE(pxa1928_mpmu_clk, "marvell,pxa1928-mpmu", pxa1928_mpmu_clk_init);
H A Dclk-of-pxa910.c279 pr_err("failed to map mpmu registers\n"); in pxa910_clk_init()
H A Dclk-of-pxa168.c310 pr_err("failed to map mpmu registers\n"); in pxa168_clk_init()
H A Dclk-of-mmp2.c530 pr_err("failed to map mpmu registers\n"); in mmp2_clk_init()
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dpxa168.dtsi161 reg-names = "mpmu", "apmu", "apbc";
H A Dpxa910.dtsi172 reg-names = "mpmu", "apmu", "apbc", "apbcp";
H A Dmmp2.dtsi510 reg-names = "mpmu", "apmu", "apbc";
H A Dmmp3.dtsi575 reg-names = "mpmu", "apmu", "apbc";
/openbmc/linux/arch/arm/mach-pxa/
H A Dpxa3xx-regs.h24 * Service Power Management Unit (MPMU)