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/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dmmc-spi-slot.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-spi-slot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC/SD/SDIO slot directly connected to a SPI bus
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 - $ref: mmc-controller.yaml
14 - $ref: /schemas/spi/spi-peripheral-props.yaml
17 The extra properties used by an mmc connected via SPI.
21 const: mmc-spi-slot
[all …]
H A Dcavium-mmc.txt1 * Cavium Octeon & ThunderX MMC controller
3 The highspeed MMC host controller on Caviums SoCs provides an interface
4 for MMC and SD types of memory cards.
10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
[all …]
/openbmc/linux/include/linux/spi/
H A Dmmc_spi.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/spi/spi.h>
11 /* Put this in platform_data of a device being used to manage an MMC/SD
12 * card slot. (Modeled after PXA mmc glue; see that for usage examples.)
14 * REVISIT This is not a spi-specific notion. Any card slot should be
15 * able to handle it. If the MMC core doesn't adopt this kind of notion,
25 /* Capabilities to pass into mmc core (e.g. MMC_CAP_NEEDS_POLL). */
38 extern struct mmc_spi_platform_data *mmc_spi_get_pdata(struct spi_device *spi);
39 extern void mmc_spi_put_pdata(struct spi_device *spi);
/openbmc/u-boot/board/boundary/nitrogen6x/
H A DREADME.mx6qsabrelite1 U-Boot for the Freescale i.MX6q SabreLite board
4 This file contains information for the port of U-Boot to the Freescale
9 --------
11 To build U-Boot for the SabreLite board:
18 --------------------
20 The SabreLite boards boot from the SPI NOR flash. These boards need their SPI
22 board will still boot from SPI NOR, but the loader will in turn request the
23 BootROM to load the U-Boot from SD card.
29 This is provided under a open-source 3-clause BSD license.
31 To following procedure can be used to update the SPI-NOR on the SabreLite
[all …]
/openbmc/linux/arch/arm/mach-omap2/
H A Dboard-n8x0.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap2/board-n8x0.c
5 * Copyright (C) 2005-2009 Nokia Corporation
8 * Modified from mach-omap2/board-generic.c
20 #include <linux/spi/spi.h>
22 #include <linux/mmc/host.h>
23 #include <linux/platform_data/spi-omap2-mcspi.h>
24 #include <linux/platform_data/mmc-omap.h>
28 #include <asm/mach-types.h>
31 #include "mmc.h"
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dusb_a9g20_lpw.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * usb_a9g20_lpw.dts - Device Tree file for Caloa USB A9G20 Low Power board
5 * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
12 compatible = "calao,usb-a9g20-lpw", "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
16 spi1: spi@fffcc000 {
17 cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
19 mmc-slot@0 {
20 compatible = "mmc-spi-slot";
22 voltage-ranges = <3200 3400>;
[all …]
H A Dsama5d3xmb.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
15 mmc0: mmc@f0000000 {
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
19 slot@0 {
21 bus-width = <4>;
22 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
26 spi0: spi@f0004000 {
31 spi-max-frequency = <50000000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/toshiba/
H A Dtmpv7708-visrobo-vrc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
29 mmc-slot@0 {
30 compatible = "mmc-spi-slot";
33 voltage-ranges = <3200 3400>;
34 spi-max-frequency = <12000000>;
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2162a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "LTM4619-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
[all …]
/openbmc/linux/drivers/mmc/host/
H A Dmmc_spi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Access SD/MMC cards through SPI master controllers
7 * (C) Copyright 2006-2007, David Brownell
9 * Hans-Peter Nilsson (hp@axis.com)
18 #include <linux/dma-direction.h>
20 #include <linux/crc-itu-t.h>
23 #include <linux/mmc/host.h>
24 #include <linux/mmc/mmc.h> /* for R1_SPI_* bit values */
25 #include <linux/mmc/slot-gpio.h>
27 #include <linux/spi/spi.h>
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
9 bool "MMC host drivers debugging"
10 depends on MMC != n
13 say N here. This enables MMC host driver debugging. And further
18 tristate "Sunplus SP7021 MMC Controller"
32 platform with a Multimedia Card slot, say Y or M here.
43 Qcom SOCs and MMC, you would probably need this option to get DMA working.
62 If you have a PXA(R) platform with a Multimedia Card slot,
[all …]
H A Dcavium.c2 * Shared part of driver for MMC/SDHC controller on Cavium OCTEON and
9 * Copyright (C) 2012-2017 Cavium Inc.
18 #include <linux/dma-direction.h>
19 #include <linux/dma-mapping.h>
22 #include <linux/mmc/mmc.h>
23 #include <linux/mmc/slot-gpio.h>
32 "MMC Buffer",
33 "MMC Command",
34 "MMC DMA",
35 "MMC Command Error",
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Datmel,at91rm9200-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/atmel,at91rm9200-spi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel SPI device
11 - Tudor Ambarus <tudor.ambarus@linaro.org>
14 - $ref: spi-controller.yaml#
19 - const: atmel,at91rm9200-spi
20 - items:
21 - const: microchip,sam9x60-spi
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/openbmc/linux/arch/powerpc/platforms/83xx/
H A Dmpc832x_rdb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/spi/spi.h>
16 #include <linux/spi/mmc_spi.h>
17 #include <linux/mmc/host.h>
69 prop = of_get_property(np, "cell-index", NULL); in of_fsl_spi_probe()
74 if (prop && !strcmp(prop, "cpu-qe")) in of_fsl_spi_probe()
124 void (*cs_control)(struct spi_device *spi, in fsl_spi_init() argument
127 u32 sysclk = -1; in fsl_spi_init()
130 /* SPI controller is either clocked from QE or SoC clock */ in fsl_spi_init()
132 if (sysclk == -1) { in fsl_spi_init()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dat91sam9x5ek.dtsi2 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
12 model = "Atmel AT91SAM9X5-EK";
17 stdout-path = "serial0:115200n8";
18 u-boot,dm-pre-reloc;
23 mmc0: mmc@f0008000 {
24 pinctrl-0 = <
29 slot@0 {
31 bus-width = <4>;
32 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
36 mmc1: mmc@f000c000 {
[all …]
H A Dsama5d3xmb_cmp.dtsi2 * sama5d3xmb_cmp.dts - Device Tree file for SAMA5D3x CMP mother board
14 u-boot,dm-pre-reloc;
15 stdout-path = &dbgu;
20 mmc0: mmc@f0000000 {
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
24 slot@0 {
26 bus-width = <4>;
27 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
31 spi0: spi@f0004000 {
[all …]
H A Dsama5d3xmb.dtsi2 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
15 u-boot,dm-pre-reloc;
16 stdout-path = &dbgu;
21 mmc0: mmc@f0000000 {
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
25 u-boot,dm-pre-reloc;
26 slot@0 {
28 bus-width = <4>;
29 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
[all …]
H A Dat91-sama5d3_xplained.dts2 * at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board
9 /dts-v1/;
14 compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
17 u-boot,dm-pre-reloc;
18 stdout-path = &dbgu;
31 clock-frequency = <32768>;
35 clock-frequency = <12000000>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinctrl_onewire_tm_default>;
53 mmc0: mmc@f0000000 {
[all …]
/openbmc/u-boot/board/freescale/mx28evk/
H A DREADME4 Supported hardware: MX28EVK rev C and D are supported in U-Boot.
7 --------------------------
9 arch/arm/cpu/arm926ejs/mxs/ - The CPU support code for the Freescale i.MX28
10 arch/arm/include/asm/arch-mxs/ - Header files for the Freescale i.MX28
11 board/freescale/mx28evk/ - MX28EVK board specific files
12 include/configs/mx28evk.h - MX28EVK configuration file
15 ---------------------
19 * Boot Mode Select: 1 0 0 1 (Boot from SD card Slot 0 - U42)
26 To boot MX28EVK from SPI NOR flash, set the boot mode DIP switches as:
36 -------------------
[all …]
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dhifive-unleashed-a00.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 #include "fu540-c000.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pwm/pwm.h>
14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
18 stdout-path = "serial0";
22 timebase-frequency = <RTCCLK_FREQ>;
31 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-khadas-vim3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
22 stdout-path = "serial0:115200n8";
30 adc-keys {
31 compatible = "adc-keys";
32 io-channels = <&saradc 2>;
33 io-channel-names = "buttons";
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dmpc832x_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
33 d-cache-size = <16384>; // L1, 16K
34 i-cache-size = <16384>; // L1, 16K
[all …]
/openbmc/u-boot/board/ti/am335x/
H A DREADME12 - AM335x GP EVM
13 - AM335x EVM SK
14 - Beaglebone White
15 - Beaglebone Black
23 worth noting that aside from things such as NAND or MMC only being
27 - GPIO is only required if DDR3 power is controlled in a way similar to
29 - SPI is only required for SPI flash, or exposing the SPI bus.
32 - I2C, to talk with the PMIC and ensure that we do not run afoul of
48 inserted with the files to write in the first SD slot and that mtdparts
52 Step-1: Building u-boot for NAND boot
[all …]
/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-overdrive-rev-b0.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 /include/ "amd-seattle-soc.dtsi"
12 /include/ "amd-seattle-cpus.dtsi"
16 compatible = "amd,seattle-overdrive", "amd,seattle";
19 stdout-path = &serial0;
23 compatible = "arm,psci-0.2";
30 amd,zlib-support = <1>;
63 compatible = "mmc-spi-slot";
65 spi-max-frequency = <20000000>;
[all …]
/openbmc/linux/arch/sh/boot/dts/
H A Dj2_mimas_v2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
[all …]

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