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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-samsung-k3g.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Galaxy S5 (SM-G900H) device-tree source
8 /dts-v1/;
9 #include <dt-bindings/clock/samsung,s2mps11.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "exynos5422-cpus.dtsi"
16 model = "Samsung Galaxy S5 (SM-G900H)";
20 chassis-type = "handset";
31 fixed-rate-clocks {
[all …]
H A Dexynos5420-galaxy-tab-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
10 /dts-v1/;
12 #include "exynos5420-cpus.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
18 chassis-type = "tablet";
24 * The same hack is also needed to boot exynos4412-i9300 with
27 * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
[all …]
H A Dexynos5422-odroid-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
27 stdout-path = "serial2:115200n8";
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
[all …]
H A Dexynos3250-rinato.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/samsung,s2mps11.h>
22 chassis-type = "watch";
31 stdout-path = &serial_1;
40 compatible = "samsung,secure-firmware";
44 gpio-keys {
[all …]
H A Dexynos5420-arndale-octa.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
32 stdout-path = "serial3:115200n8";
36 compatible = "samsung,secure-firmware";
[all …]
/openbmc/linux/drivers/iio/pressure/
H A Dabp060mg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 - Marcin Malagowski <mrc@bourne.st>
18 #define ABP060MG_NUM_COUNTS (ABP060MG_MAX_COUNTS - ABP060MG_MIN_COUNTS)
34 int min; member
40 [ABP006KG] = { .min = 0, .max = 6000 },
41 [ABP010KG] = { .min = 0, .max = 10000 },
42 [ABP016KG] = { .min = 0, .max = 16000 },
43 [ABP025KG] = { .min = 0, .max = 25000 },
44 [ABP040KG] = { .min = 0, .max = 40000 },
45 [ABP060KG] = { .min = 0, .max = 60000 },
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-evb1-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
15 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588";
23 stdout-path = "serial2:1500000n8";
27 compatible = "pwm-backlight";
28 power-supply = <&vcc12v_dcin>;
32 vcc12v_dcin: vcc12v-dcin-regulator {
33 compatible = "regulator-fixed";
[all …]
H A Drk3588-edgeble-neu6b.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588";
13 vcc12v_dcin: vcc12v-dcin-regulator {
14 compatible = "regulator-fixed";
15 regulator-name = "vcc12v_dcin";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <12000000>;
19 regulator-max-microvolt = <12000000>;
22 vcc5v0_sys: vcc5v0-sys-regulator {
[all …]
H A Drk3568-radxa-cm3i.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/rockchip.h>
16 stdout-path = "serial2:115200n8";
19 gpio-leds {
20 compatible = "gpio-leds";
22 led_user: led-0 {
26 linux,default-trigger = "heartbeat";
27 pinctrl-names = "default";
[all …]
H A Drk3588-rock-5b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
10 compatible = "radxa,rock-5b", "rockchip,rk3588";
19 stdout-path = "serial2:1500000n8";
22 analog-sound {
23 compatible = "audio-graph-card";
24 label = "rk3588-es8316";
34 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
35 pinctrl-names = "default";
[all …]
H A Drk3588s-rock-5a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "radxa,rock-5a", "rockchip,rk3588s";
20 analog-sound {
21 compatible = "audio-graph-card";
22 label = "rk3588-es8316";
35 stdout-path = "serial2:1500000n8";
[all …]
H A Drk3568-fastrhino-r66s.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/soc/rockchip,vop2.h>
13 stdout-path = "serial2:1500000n8";
16 gpio-keys {
17 compatible = "gpio-keys";
[all …]
H A Drk3568-nanopi-r5s.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/soc/rockchip,vop2.h>
24 stdout-path = "serial2:1500000n8";
27 hdmi-con {
28 compatible = "hdmi-connector";
[all …]
H A Drk3588s-indiedroid-nova.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/usb/pd.h>
22 stdout-path = "serial2:1500000n8";
25 sdio_pwrseq: sdio-pwrseq {
26 compatible = "mmc-pwrseq-simple";
27 clock-names = "ext_clock";
29 pinctrl-0 = <&wifi_enable_h>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drockchip,rk806.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sebastian.reichel@collabora.com>
19 - rockchip,rk806
27 gpio-controller: true
29 '#gpio-cells':
32 vcc1-supply:
34 The input supply for dcdc-reg1.
36 vcc2-supply:
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974pro-samsung-klte.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/leds/common.h>
11 chassis-type = "handset";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
26 pinctrl-names = "default";
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-evb-rk808.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3288-evb.dtsi"
8 compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
12 clock-frequency = <400000>;
17 interrupt-parent = <&gpio0>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pmic_int &global_pwroff>;
21 rockchip,system-power-controller;
22 wakeup-source;
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpll.c1 // SPDX-License-Identifier: MIT
24 int (*crtc_compute_clock)(struct intel_atomic_state *state,
26 int (*crtc_get_shared_dpll)(struct intel_atomic_state *state,
32 int min, max; member
41 .dot = { .min = 25000, .max = 350000 },
42 .vco = { .min = 908000, .max = 1512000 },
43 .n = { .min = 2, .max = 16 },
44 .m = { .min = 96, .max = 140 },
45 .m1 = { .min = 18, .max = 26 },
46 .m2 = { .min = 6, .max = 16 },
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998-xiaomi-sagit.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi
10 /dts-v1/;
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
24 /delete-node/ &adsp_mem;
25 /delete-node/ &mpss_mem;
26 /delete-node/ &venus_mem;
27 /delete-node/ &mba_mem;
[all …]
H A Dmsm8998-sony-xperia-yoshino.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
18 qcom,msm-id = <0x124 0x20000>, <0x124 0x20001>; /* 8998v2, v2.1 */
19 qcom,board-id = <8 0>;
23 compatible = "gpio-gate-clock";
24 pinctrl-0 = <&div_clk1>;
25 pinctrl-names = "default";
27 #clock-cells = <0>;
[all …]
H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3399-rock960.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/pwm/pwm.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
11 vcc1v8_s0: vcc1v8-s0 {
12 compatible = "regulator-fixed";
13 regulator-name = "vcc1v8_s0";
14 regulator-min-microvolt = <1800000>;
15 regulator-max-microvolt = <1800000>;
16 regulator-always-on;
19 vcc_sys: vcc-sys {
[all …]
H A Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
9 #include "stm32mp157-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/mfd/st,stpmu1.h>
15 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18 stdout-path = "serial3:115200n8";
25 sd_switch: regulator-sd_switch {
26 compatible = "regulator-gpio";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rtq2208.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alina Yu <alina_yu@richtek.com>
14 multi-configurable synchronous buck converters and two LDOs.
16 Bucks support "regulator-allowed-modes" and "regulator-mode". The former defines the permitted
25 0 - Auto mode for power saving, which reducing the switching frequency at light load condition
27 …1 - FCCM to meet the strict voltage regulation accuracy, which keeping constant switching frequenc…
35 - richtek,rtq2208
43 richtek,mtp-sel-high:
[all …]

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